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[AMDGPU] Use isNullConstant and isOneConstant (NFC)
1 parent 7224749 commit 57390c9

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3 files changed

+9
-16
lines changed

3 files changed

+9
-16
lines changed

llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -81,10 +81,9 @@ static bool isExtractHiElt(SDValue In, SDValue &Out) {
8181
// same register.
8282
static SDValue stripExtractLoElt(SDValue In) {
8383
if (In.getOpcode() == ISD::EXTRACT_VECTOR_ELT) {
84-
if (ConstantSDNode *Idx = dyn_cast<ConstantSDNode>(In.getOperand(1))) {
85-
if (Idx->isZero() && In.getValueSizeInBits() <= 32)
86-
return In.getOperand(0);
87-
}
84+
SDValue Idx = In.getOperand(1);
85+
if (isNullConstant(Idx) && In.getValueSizeInBits() <= 32)
86+
return In.getOperand(0);
8887
}
8988

9089
if (In.getOpcode() == ISD::TRUNCATE) {

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4046,8 +4046,7 @@ static SDValue getAddOneOp(const SDNode *V) {
40464046
if (V->getOpcode() != ISD::ADD)
40474047
return SDValue();
40484048

4049-
auto *C = dyn_cast<ConstantSDNode>(V->getOperand(1));
4050-
return C && C->isOne() ? V->getOperand(0) : SDValue();
4049+
return isOneConstant(V->getOperand(1)) ? V->getOperand(0) : SDValue();
40514050
}
40524051

40534052
SDValue AMDGPUTargetLowering::performMulCombine(SDNode *N,
@@ -4277,8 +4276,7 @@ SDValue AMDGPUTargetLowering::getFFBX_U32(SelectionDAG &DAG,
42774276
SDValue AMDGPUTargetLowering::performCtlz_CttzCombine(const SDLoc &SL, SDValue Cond,
42784277
SDValue LHS, SDValue RHS,
42794278
DAGCombinerInfo &DCI) const {
4280-
ConstantSDNode *CmpRhs = dyn_cast<ConstantSDNode>(Cond.getOperand(1));
4281-
if (!CmpRhs || !CmpRhs->isZero())
4279+
if (!isNullConstant(Cond.getOperand(1)))
42824280
return SDValue();
42834281

42844282
SelectionDAG &DAG = DCI.DAG;

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8643,8 +8643,7 @@ SDValue SITargetLowering::LowerINTRINSIC_VOID(SDValue Op,
86438643
IntrinsicID == Intrinsic::amdgcn_struct_ptr_buffer_load_lds;
86448644
unsigned OpOffset = HasVIndex ? 1 : 0;
86458645
SDValue VOffset = Op.getOperand(5 + OpOffset);
8646-
auto CVOffset = dyn_cast<ConstantSDNode>(VOffset);
8647-
bool HasVOffset = !CVOffset || !CVOffset->isZero();
8646+
bool HasVOffset = !isNullConstant(VOffset);
86488647
unsigned Size = Op->getConstantOperandVal(4);
86498648

86508649
switch (Size) {
@@ -11101,10 +11100,8 @@ SDValue SITargetLowering::performClassCombine(SDNode *N,
1110111100
SDValue Mask = N->getOperand(1);
1110211101

1110311102
// fp_class x, 0 -> false
11104-
if (const ConstantSDNode *CMask = dyn_cast<ConstantSDNode>(Mask)) {
11105-
if (CMask->isZero())
11106-
return DAG.getConstant(0, SDLoc(N), MVT::i1);
11107-
}
11103+
if (isNullConstant(Mask))
11104+
return DAG.getConstant(0, SDLoc(N), MVT::i1);
1110811105

1110911106
if (N->getOperand(0).isUndef())
1111011107
return DAG.getUNDEF(MVT::i1);
@@ -12378,8 +12375,7 @@ SDValue SITargetLowering::performSubCombine(SDNode *N,
1237812375

1237912376
if (LHS.getOpcode() == ISD::USUBO_CARRY) {
1238012377
// sub (usubo_carry x, 0, cc), y => usubo_carry x, y, cc
12381-
auto C = dyn_cast<ConstantSDNode>(LHS.getOperand(1));
12382-
if (!C || !C->isZero())
12378+
if (!isNullConstant(LHS.getOperand(1)))
1238312379
return SDValue();
1238412380
SDValue Args[] = { LHS.getOperand(0), RHS, LHS.getOperand(2) };
1238512381
return DAG.getNode(ISD::USUBO_CARRY, SDLoc(N), LHS->getVTList(), Args);

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