@@ -83,14 +83,14 @@ class LiveRegUnits {
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bool empty () const { return Units.none (); }
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// / Adds register units covered by physical register \p Reg.
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- void addReg (MCPhysReg Reg) {
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+ void addReg (MCRegister Reg) {
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for (MCRegUnit Unit : TRI->regunits (Reg))
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Units.set (Unit);
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}
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// / Adds register units covered by physical register \p Reg that are
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// / part of the lanemask \p Mask.
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- void addRegMasked (MCPhysReg Reg, LaneBitmask Mask) {
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+ void addRegMasked (MCRegister Reg, LaneBitmask Mask) {
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for (MCRegUnitMaskIterator Unit (Reg, TRI); Unit.isValid (); ++Unit) {
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LaneBitmask UnitMask = (*Unit).second ;
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if ((UnitMask & Mask).any ())
@@ -99,7 +99,7 @@ class LiveRegUnits {
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}
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// / Removes all register units covered by physical register \p Reg.
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- void removeReg (MCPhysReg Reg) {
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+ void removeReg (MCRegister Reg) {
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for (MCRegUnit Unit : TRI->regunits (Reg))
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Units.reset (Unit);
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}
@@ -113,7 +113,7 @@ class LiveRegUnits {
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void addRegsInMask (const uint32_t *RegMask);
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// / Returns true if no part of physical register \p Reg is live.
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- bool available (MCPhysReg Reg) const {
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+ bool available (MCRegister Reg) const {
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for (MCRegUnit Unit : TRI->regunits (Reg)) {
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if (Units.test (Unit))
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return false ;
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