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Merge commit '184a13d362e0' from llvm.org/release/11.x into apple/stable/20200714
2 parents 8fd613e + 184a13d commit 594fe43

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-4
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llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -84,11 +84,16 @@ struct IncomingArgHandler : public CallLowering::ValueHandler {
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}
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}
8686

87-
void assignValueToAddress(Register ValVReg, Register Addr, uint64_t Size,
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void assignValueToAddress(Register ValVReg, Register Addr, uint64_t MemSize,
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MachinePointerInfo &MPO, CCValAssign &VA) override {
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MachineFunction &MF = MIRBuilder.getMF();
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91+
// The reported memory location may be wider than the value.
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const LLT RegTy = MRI.getType(ValVReg);
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MemSize = std::min(static_cast<uint64_t>(RegTy.getSizeInBytes()), MemSize);
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auto MMO = MF.getMachineMemOperand(
91-
MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, Size,
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MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, MemSize,
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inferAlignFromPtrInfo(MF, MPO));
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MIRBuilder.buildLoad(ValVReg, Addr, *MMO);
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}

llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-evt-bug47619.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
; RUN: llc -global-isel -mtriple=aarch64-unknown-unknown -stop-after=irtranslator %s -o - | FileCheck %s
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; RUN: llc -global-isel -mtriple=aarch64-unknown-unknown -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s
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; Make sure the i3 %arg8 value is correctly handled. This was trying
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; to use MVT for EVT values passed on the stack and asserting before
@@ -17,7 +17,7 @@ define i3 @bug47619(i64 %arg, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %a
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; CHECK: [[COPY6:%[0-9]+]]:_(s64) = COPY $x6
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; CHECK: [[COPY7:%[0-9]+]]:_(s64) = COPY $x7
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; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
20-
; CHECK: [[LOAD:%[0-9]+]]:_(s3) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load 4 from %fixed-stack.0, align 16)
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; CHECK: [[LOAD:%[0-9]+]]:_(s3) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load 1 from %fixed-stack.0, align 16)
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[LOAD]](s3)
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; CHECK: $w0 = COPY [[ANYEXT]](s32)
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; CHECK: RET_ReallyLR implicit $w0

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