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[PhaseOrdering] Add additional test for switch with GEPs (NFC)
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‎llvm/test/Transforms/PhaseOrdering/switch_different_gep_types.ll

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‎llvm/test/Transforms/PhaseOrdering/switch_with_geps.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
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; RUN: opt -S -passes='default<O1>' < %s | FileCheck %s
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; RUN: opt -S -passes='default<O2>' < %s | FileCheck %s
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; RUN: opt -S -passes='default<O3>' < %s | FileCheck %s
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%"OpKind::Zero" = type { [1 x i32], i32 }
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%"OpKind::One" = type { [1 x i32], i32, i16, [1 x i16] }
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%"OpKind::Two" = type { [1 x i32], i32, i16, i16 }
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%"OpKind::Three" = type { [1 x i32], i32, i16, i16, i16, [1 x i16] }
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; FIXME: The switch should be optimized away.
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define i32 @test(ptr %ptr) {
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; CHECK-LABEL: define i32 @test(
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; CHECK-SAME: ptr nocapture readonly [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: start:
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; CHECK-NEXT: [[T:%.*]] = load i32, ptr [[PTR]], align 4
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; CHECK-NEXT: switch i32 [[T]], label [[DEFAULT:%.*]] [
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; CHECK-NEXT: i32 0, label [[BB4:%.*]]
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; CHECK-NEXT: i32 1, label [[BB5:%.*]]
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; CHECK-NEXT: i32 2, label [[BB6:%.*]]
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; CHECK-NEXT: i32 3, label [[BB7:%.*]]
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; CHECK-NEXT: ]
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; CHECK: default:
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; CHECK-NEXT: unreachable
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; CHECK: bb4:
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; CHECK-NEXT: [[GEP0:%.*]] = getelementptr inbounds %"OpKind::Zero", ptr [[PTR]], i64 0, i32 1
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: bb5:
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds %"OpKind::One", ptr [[PTR]], i64 0, i32 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: bb6:
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds %"OpKind::Two", ptr [[PTR]], i64 0, i32 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: bb7:
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; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds %"OpKind::Three", ptr [[PTR]], i64 0, i32 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[GEP3]], [[BB7]] ], [ [[GEP2]], [[BB6]] ], [ [[GEP1]], [[BB5]] ], [ [[GEP0]], [[BB4]] ]
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; CHECK-NEXT: [[RET:%.*]] = load i32, ptr [[PHI]], align 4
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; CHECK-NEXT: ret i32 [[RET]]
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;
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start:
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%t = load i32, ptr %ptr, align 4
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switch i32 %t, label %default [
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i32 0, label %bb4
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i32 1, label %bb5
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i32 2, label %bb6
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i32 3, label %bb7
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]
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default:
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unreachable
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bb4:
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%gep0 = getelementptr inbounds %"OpKind::Zero", ptr %ptr, i64 0, i32 1
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br label %exit
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bb5:
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%gep1 = getelementptr inbounds %"OpKind::One", ptr %ptr, i64 0, i32 1
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br label %exit
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bb6:
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%gep2 = getelementptr inbounds %"OpKind::Two", ptr %ptr, i64 0, i32 1
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br label %exit
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bb7:
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%gep3 = getelementptr inbounds %"OpKind::Three", ptr %ptr, i64 0, i32 1
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br label %exit
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exit:
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%phi = phi ptr [ %gep3, %bb7 ], [ %gep2, %bb6 ], [ %gep1, %bb5 ], [ %gep0, %bb4 ]
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%ret = load i32, ptr %phi, align 4
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ret i32 %ret
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}
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%X = type { i64, i64, i64, i64, i64, i64 }
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; FIXME: The switch should be optimized away.
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define void @test2(ptr %self, i64 %v, i64 %ix) {
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; CHECK-LABEL: define void @test2(
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; CHECK-SAME: ptr nocapture writeonly [[SELF:%.*]], i64 [[V:%.*]], i64 [[IX:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
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; CHECK-NEXT: start:
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; CHECK-NEXT: switch i64 [[IX]], label [[DEFAULT:%.*]] [
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; CHECK-NEXT: i64 1, label [[BB3:%.*]]
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; CHECK-NEXT: i64 2, label [[BB4:%.*]]
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; CHECK-NEXT: i64 3, label [[BB5:%.*]]
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; CHECK-NEXT: i64 4, label [[BB6:%.*]]
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; CHECK-NEXT: i64 5, label [[BB7:%.*]]
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; CHECK-NEXT: ]
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; CHECK: default:
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; CHECK-NEXT: unreachable
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; CHECK: bb3:
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[X:%.*]], ptr [[SELF]], i64 0, i32 1
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; CHECK-NEXT: br label [[BB8:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds [[X]], ptr [[SELF]], i64 0, i32 2
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; CHECK-NEXT: br label [[BB8]]
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; CHECK: bb5:
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; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds [[X]], ptr [[SELF]], i64 0, i32 3
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; CHECK-NEXT: br label [[BB8]]
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; CHECK: bb6:
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; CHECK-NEXT: [[GEP4:%.*]] = getelementptr inbounds [[X]], ptr [[SELF]], i64 0, i32 4
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; CHECK-NEXT: br label [[BB8]]
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; CHECK: bb7:
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; CHECK-NEXT: [[GEP5:%.*]] = getelementptr inbounds [[X]], ptr [[SELF]], i64 0, i32 5
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; CHECK-NEXT: br label [[BB8]]
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; CHECK: bb8:
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; CHECK-NEXT: [[PTR:%.*]] = phi ptr [ [[GEP5]], [[BB7]] ], [ [[GEP4]], [[BB6]] ], [ [[GEP3]], [[BB5]] ], [ [[GEP2]], [[BB4]] ], [ [[GEP1]], [[BB3]] ]
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; CHECK-NEXT: store i64 [[V]], ptr [[PTR]], align 8
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; CHECK-NEXT: ret void
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;
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start:
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switch i64 %ix, label %default [
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i64 1, label %bb3
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i64 2, label %bb4
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i64 3, label %bb5
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i64 4, label %bb6
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i64 5, label %bb7
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]
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default:
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unreachable
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bb3:
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%gep1 = getelementptr inbounds %X, ptr %self, i64 0, i32 1
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br label %bb8
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bb4:
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%gep2 = getelementptr inbounds %X, ptr %self, i64 0, i32 2
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br label %bb8
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bb5:
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%gep3 = getelementptr inbounds %X, ptr %self, i64 0, i32 3
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br label %bb8
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bb6:
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%gep4 = getelementptr inbounds %X, ptr %self, i64 0, i32 4
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br label %bb8
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bb7:
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%gep5 = getelementptr inbounds %X, ptr %self, i64 0, i32 5
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br label %bb8
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bb8:
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%ptr = phi ptr [ %gep5, %bb7 ], [ %gep4, %bb6 ], [ %gep3, %bb5 ], [ %gep2, %bb4 ], [ %gep1, %bb3 ]
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store i64 %v, ptr %ptr, align 8
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ret void
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}

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