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[RISCV] Add B extension tests to make sure RV64 only instructions aren't accepted in RV32.
Add tests to make sure common instructions are accepted in RV64 and not just RV32. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D95150
1 parent 041f3ee commit 607e5a5

21 files changed

+248
-1
lines changed

‎llvm/test/MC/RISCV/rv32zba-invalid.s

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,3 +6,8 @@ sh1add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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sh2add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
77
# Too few operands
88
sh3add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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slli.uw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
10+
add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
11+
sh1add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
12+
sh2add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
13+
sh3add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbb-invalid.s

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,3 +18,6 @@ max t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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minu t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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# Too few operands
2020
maxu t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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clzw t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
22+
ctzw t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
23+
cpopw t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbbp-invalid.s

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,3 +15,7 @@ rori t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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# Immediate operand out of range
1616
rori t0, t1, 32 # CHECK: :[[@LINE]]:14: error: immediate must be an integer in the range [0, 31]
1717
rori t0, t1, -1 # CHECK: :[[@LINE]]:14: error: immediate must be an integer in the range [0, 31]
18+
rolw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
19+
rorw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
20+
roriw t0, t1, 31 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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roriw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbe-invalid.s

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,3 +4,5 @@
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bdecompress t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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# Too few operands
66
bcompress t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
7+
bdecompressw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
8+
bcompressw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbf-invalid.s

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,3 +2,4 @@
22

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# Too few operands
44
bfp t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
5+
bfpw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbp-invalid.s

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -54,3 +54,16 @@ xperm.n t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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xperm.b t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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# Too few operands
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xperm.h t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
57+
slow t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
58+
srow t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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sloiw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
60+
sroiw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
61+
gorcw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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grevw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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gorciw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
64+
greviw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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shflw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
66+
unshflw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
67+
packw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
68+
packuw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
69+
xperm.w t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbproposedc-invalid.s

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
1-
# RUN: not llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc < %s 2>&1 | FileCheck %s
1+
# RUN: not llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc,+experimental-Zba < %s 2>&1 | FileCheck %s
22

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# Too many operands
44
c.not s0, s1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
55
c.neg s0, s1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
6+
c.zext.w s0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbr-invalid.s

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,3 +12,5 @@ crc32c.b t0, t1, t2 # CHECK: :[[@LINE]]:18: error: invalid operand for instructi
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crc32c.h t0, t1, t2 # CHECK: :[[@LINE]]:18: error: invalid operand for instruction
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# Too many operands
1414
crc32c.w t0, t1, t2 # CHECK: :[[@LINE]]:18: error: invalid operand for instruction
15+
crc32.d t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
16+
crc32c.d t0, t1 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbs-invalid.s

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,3 +28,10 @@ bexti t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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# Immediate operand out of range
2929
bexti t0, t1, 32 # CHECK: :[[@LINE]]:15: error: immediate must be an integer in the range [0, 31]
3030
bexti t0, t1, -1 # CHECK: :[[@LINE]]:15: error: immediate must be an integer in the range [0, 31]
31+
bclrw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
32+
bsetw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
33+
binvw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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bextw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
35+
bclriw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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bsetiw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
37+
binviw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv32zbt-invalid.s

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,3 +13,6 @@ fsri t0, t1, t2 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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# Immediate operand out of range
1414
fsri t0, t1, t2, 32 # CHECK: :[[@LINE]]:18: error: immediate must be an integer in the range [0, 31]
1515
fsri t0, t1, t2, -1 # CHECK: :[[@LINE]]:18: error: immediate must be an integer in the range [0, 31]
16+
fslw t0, t1, t2, t3 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
17+
fsrw t0, t1, t2, t3 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
18+
fsriw t0, t1, t2, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set

‎llvm/test/MC/RISCV/rv64zba-valid.s

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Original file line numberDiff line numberDiff line change
@@ -27,3 +27,12 @@ sh2add.uw t0, t1, t2
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# CHECK-ASM-AND-OBJ: sh3add.uw t0, t1, t2
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# CHECK-ASM: encoding: [0xbb,0x62,0x73,0x20]
2929
sh3add.uw t0, t1, t2
30+
# CHECK-ASM-AND-OBJ: sh1add t0, t1, t2
31+
# CHECK-ASM: encoding: [0xb3,0x22,0x73,0x20]
32+
sh1add t0, t1, t2
33+
# CHECK-ASM-AND-OBJ: sh2add t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x20]
35+
sh2add t0, t1, t2
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# CHECK-ASM-AND-OBJ: sh3add t0, t1, t2
37+
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x20]
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sh3add t0, t1, t2

‎llvm/test/MC/RISCV/rv64zbb-valid.s

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Original file line numberDiff line numberDiff line change
@@ -12,6 +12,33 @@
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# RUN: | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
1414

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# CHECK-ASM-AND-OBJ: clz t0, t1
16+
# CHECK-ASM: encoding: [0x93,0x12,0x03,0x60]
17+
clz t0, t1
18+
# CHECK-ASM-AND-OBJ: ctz t0, t1
19+
# CHECK-ASM: encoding: [0x93,0x12,0x13,0x60]
20+
ctz t0, t1
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# CHECK-ASM-AND-OBJ: cpop t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x23,0x60]
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cpop t0, t1
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# CHECK-ASM-AND-OBJ: sext.b t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x43,0x60]
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sext.b t0, t1
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# CHECK-ASM-AND-OBJ: sext.h t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x53,0x60]
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sext.h t0, t1
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# CHECK-ASM-AND-OBJ: min t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x0a]
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min t0, t1, t2
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# CHECK-ASM-AND-OBJ: minu t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x0a]
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minu t0, t1, t2
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# CHECK-ASM-AND-OBJ: max t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x0a]
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max t0, t1, t2
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# CHECK-ASM-AND-OBJ: maxu t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x0a]
41+
maxu t0, t1, t2
1542
# CHECK-ASM-AND-OBJ: clzw t0, t1
1643
# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x60]
1744
clzw t0, t1

‎llvm/test/MC/RISCV/rv64zbbp-valid.s

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Original file line numberDiff line numberDiff line change
@@ -19,6 +19,27 @@
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# RUN: | llvm-objdump --mattr=+experimental-zbp -d -r - \
2020
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
2121

22+
# CHECK-ASM-AND-OBJ: andn t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x40]
24+
andn t0, t1, t2
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# CHECK-ASM-AND-OBJ: orn t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x40]
27+
orn t0, t1, t2
28+
# CHECK-ASM-AND-OBJ: xnor t0, t1, t2
29+
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x40]
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xnor t0, t1, t2
31+
# CHECK-ASM-AND-OBJ: rol t0, t1, t2
32+
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x60]
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rol t0, t1, t2
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# CHECK-ASM-AND-OBJ: ror t0, t1, t2
35+
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x60]
36+
ror t0, t1, t2
37+
# CHECK-ASM-AND-OBJ: rori t0, t1, 31
38+
# CHECK-ASM: encoding: [0x93,0x52,0xf3,0x61]
39+
rori t0, t1, 31
40+
# CHECK-ASM-AND-OBJ: rori t0, t1, 0
41+
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x60]
42+
rori t0, t1, 0
2243
# CHECK-ASM-AND-OBJ: rolw t0, t1, t2
2344
# CHECK-ASM: encoding: [0xbb,0x12,0x73,0x60]
2445
rolw t0, t1, t2

‎llvm/test/MC/RISCV/rv64zbc-valid.s

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
# With B extension:
2+
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-b -show-encoding \
3+
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
4+
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-b < %s \
5+
# RUN: | llvm-objdump --mattr=+experimental-b -d -r - \
6+
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
7+
8+
# With Bitmanip carry-less multiply extension:
9+
# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbc -show-encoding \
10+
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbc < %s \
12+
# RUN: | llvm-objdump --mattr=+experimental-zbc -d -r - \
13+
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
14+
15+
# CHECK-ASM-AND-OBJ: clmul t0, t1, t2
16+
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x0a]
17+
clmul t0, t1, t2
18+
# CHECK-ASM-AND-OBJ: clmulr t0, t1, t2
19+
# CHECK-ASM: encoding: [0xb3,0x22,0x73,0x0a]
20+
clmulr t0, t1, t2
21+
# CHECK-ASM-AND-OBJ: clmulh t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x32,0x73,0x0a]
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clmulh t0, t1, t2

‎llvm/test/MC/RISCV/rv64zbe-valid.s

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Original file line numberDiff line numberDiff line change
@@ -12,6 +12,12 @@
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# RUN: | llvm-objdump --mattr=+experimental-zbe -d -r - \
1313
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
1414

15+
# CHECK-ASM-AND-OBJ: bdecompress t0, t1, t2
16+
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x48]
17+
bdecompress t0, t1, t2
18+
# CHECK-ASM-AND-OBJ: bcompress t0, t1, t2
19+
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x08]
20+
bcompress t0, t1, t2
1521
# CHECK-ASM-AND-OBJ: bdecompressw t0, t1, t2
1622
# CHECK-ASM: encoding: [0xbb,0x62,0x73,0x48]
1723
bdecompressw t0, t1, t2

‎llvm/test/MC/RISCV/rv64zbf-valid.s

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Original file line numberDiff line numberDiff line change
@@ -12,6 +12,9 @@
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# RUN: | llvm-objdump --mattr=+experimental-zbf -d -r - \
1313
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
1414

15+
# CHECK-ASM-AND-OBJ: bfp t0, t1, t2
16+
# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x48]
17+
bfp t0, t1, t2
1518
# CHECK-ASM-AND-OBJ: bfpw t0, t1, t2
1619
# CHECK-ASM: encoding: [0xbb,0x72,0x73,0x48]
1720
bfpw t0, t1, t2

‎llvm/test/MC/RISCV/rv64zbp-valid.s

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,51 @@
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# RUN: | llvm-objdump --mattr=+experimental-zbp -d -r - \
1313
# RUN: | FileCheck --check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
1414

15+
# CHECK-ASM-AND-OBJ: slo t0, t1, t2
16+
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x20]
17+
slo t0, t1, t2
18+
# CHECK-ASM-AND-OBJ: sro t0, t1, t2
19+
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x20]
20+
sro t0, t1, t2
21+
# CHECK-ASM-AND-OBJ: sloi t0, t1, 0
22+
# CHECK-ASM: encoding: [0x93,0x12,0x03,0x20]
23+
sloi t0, t1, 0
24+
# CHECK-ASM-AND-OBJ: sroi t0, t1, 0
25+
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x20]
26+
sroi t0, t1, 0
27+
# CHECK-ASM-AND-OBJ: gorc t0, t1, t2
28+
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x28]
29+
gorc t0, t1, t2
30+
# CHECK-ASM-AND-OBJ: grev t0, t1, t2
31+
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x68]
32+
grev t0, t1, t2
33+
# CHECK-ASM-AND-OBJ: gorci t0, t1, 0
34+
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x28]
35+
gorci t0, t1, 0
36+
# CHECK-ASM-AND-OBJ: grevi t0, t1, 0
37+
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x68]
38+
grevi t0, t1, 0
39+
# CHECK-ASM-AND-OBJ: shfl t0, t1, t2
40+
# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x08]
41+
shfl t0, t1, t2
42+
# CHECK-ASM-AND-OBJ: unshfl t0, t1, t2
43+
# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x08]
44+
unshfl t0, t1, t2
45+
# CHECK-ASM-AND-OBJ: shfli t0, t1, 0
46+
# CHECK-ASM: encoding: [0x93,0x12,0x03,0x08]
47+
shfli t0, t1, 0
48+
# CHECK-ASM-AND-OBJ: unshfli t0, t1, 0
49+
# CHECK-ASM: encoding: [0x93,0x52,0x03,0x08]
50+
unshfli t0, t1, 0
51+
# CHECK-ASM-AND-OBJ: pack t0, t1, t2
52+
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x08]
53+
pack t0, t1, t2
54+
# CHECK-ASM-AND-OBJ: packu t0, t1, t2
55+
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x48]
56+
packu t0, t1, t2
57+
# CHECK-ASM-AND-OBJ: packh t0, t1, t2
58+
# CHECK-ASM: encoding: [0xb3,0x72,0x73,0x08]
59+
packh t0, t1, t2
1560
# CHECK-ASM-AND-OBJ: slow t0, t1, t2
1661
# CHECK-ASM: encoding: [0xbb,0x12,0x73,0x20]
1762
slow t0, t1, t2
@@ -69,6 +114,15 @@ orc.b t0, t1
69114
# CHECK-OBJ: orc.b t0, t1
70115
# CHECK-ASM: encoding: [0x93,0x52,0x73,0x28]
71116
gorci t0, t1, 7
117+
# CHECK-ASM-AND-OBJ: xperm.n t0, t1, t2
118+
# CHECK-ASM: encoding: [0xb3,0x22,0x73,0x28]
119+
xperm.n t0, t1, t2
120+
# CHECK-ASM-AND-OBJ: xperm.b t0, t1, t2
121+
# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x28]
122+
xperm.b t0, t1, t2
123+
# CHECK-ASM-AND-OBJ: xperm.h t0, t1, t2
124+
# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x28
125+
xperm.h t0, t1, t2
72126
# CHECK-ASM-AND-OBJ: xperm.w t0, t1, t2
73127
# CHECK-ASM: encoding: [0xb3,0x02,0x73,0x28]
74128
xperm.w t0, t1, t2

‎llvm/test/MC/RISCV/rv64zbproposedc-valid.s

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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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77

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# CHECK-ASM-AND-OBJ: c.not s0
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# CHECK-ASM: encoding: [0x01,0x60]
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c.not s0
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# CHECK-ASM-AND-OBJ: c.neg s0
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# CHECK-ASM: encoding: [0x01,0x64]
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c.neg s0
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# CHECK-ASM-AND-OBJ: c.zext.w s0
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# CHECK-ASM: encoding: [0x01,0x68]
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c.zext.w s0

‎llvm/test/MC/RISCV/rv64zbr-valid.s

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,24 @@
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# RUN: | llvm-objdump --mattr=+experimental-zbr -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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# CHECK-ASM-AND-OBJ: crc32.b t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x03,0x61]
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crc32.b t0, t1
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# CHECK-ASM-AND-OBJ: crc32.h t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x13,0x61]
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crc32.h t0, t1
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# CHECK-ASM-AND-OBJ: crc32.w t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x23,0x61]
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crc32.w t0, t1
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# CHECK-ASM-AND-OBJ: crc32c.b t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x83,0x61]
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crc32c.b t0, t1
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# CHECK-ASM-AND-OBJ: crc32c.h t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x93,0x61]
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crc32c.h t0, t1
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# CHECK-ASM-AND-OBJ: crc32c.w t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0xa3,0x61]
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crc32c.w t0, t1
1533
# CHECK-ASM-AND-OBJ: crc32.d t0, t1
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# CHECK-ASM: encoding: [0x93,0x12,0x33,0x61]
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crc32.d t0, t1

‎llvm/test/MC/RISCV/rv64zbs-valid.s

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
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# RUN: | llvm-objdump --mattr=+experimental-zbs -d -r - \
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# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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# CHECK-ASM-AND-OBJ: bclr t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x48]
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bclr t0, t1, t2
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# CHECK-ASM-AND-OBJ: bset t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x28]
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bset t0, t1, t2
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# CHECK-ASM-AND-OBJ: binv t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x12,0x73,0x68]
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binv t0, t1, t2
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# CHECK-ASM-AND-OBJ: bext t0, t1, t2
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# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x48]
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bext t0, t1, t2
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# CHECK-ASM-AND-OBJ: bclri t0, t1, 1
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# CHECK-ASM: encoding: [0x93,0x12,0x13,0x48]
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bclri t0, t1, 1
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# CHECK-ASM-AND-OBJ: bseti t0, t1, 1
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# CHECK-ASM: encoding: [0x93,0x12,0x13,0x28]
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bseti t0, t1, 1
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# CHECK-ASM-AND-OBJ: binvi t0, t1, 1
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# CHECK-ASM: encoding: [0x93,0x12,0x13,0x68]
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binvi t0, t1, 1
36+
# CHECK-ASM-AND-OBJ: bexti t0, t1, 1
37+
# CHECK-ASM: encoding: [0x93,0x52,0x13,0x48]
38+
bexti t0, t1, 1
1539
# CHECK-ASM-AND-OBJ: bclrw t0, t1, t2
1640
# CHECK-ASM: encoding: [0xbb,0x12,0x73,0x48]
1741
bclrw t0, t1, t2

‎llvm/test/MC/RISCV/rv64zbt-valid.s

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,21 @@
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# RUN: | llvm-objdump --mattr=+experimental-zbt -d -r - \
1313
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
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# CHECK-ASM-AND-OBJ: cmix t0, t1, t2, t3
16+
# CHECK-ASM: encoding: [0xb3,0x92,0x63,0xe6]
17+
cmix t0, t1, t2, t3
18+
# CHECK-ASM-AND-OBJ: cmov t0, t1, t2, t3
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# CHECK-ASM: encoding: [0xb3,0xd2,0x63,0xe6]
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cmov t0, t1, t2, t3
21+
# CHECK-ASM-AND-OBJ: fsl t0, t1, t2, t3
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# CHECK-ASM: encoding: [0xb3,0x12,0xc3,0x3d]
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fsl t0, t1, t2, t3
24+
# CHECK-ASM-AND-OBJ: fsr t0, t1, t2, t3
25+
# CHECK-ASM: encoding: [0xb3,0x52,0xc3,0x3d]
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fsr t0, t1, t2, t3
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# CHECK-ASM-AND-OBJ: fsri t0, t1, t2, 0
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# CHECK-ASM: encoding: [0x93,0x52,0x03,0x3c]
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fsri t0, t1, t2, 0
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# CHECK-ASM-AND-OBJ: fslw t0, t1, t2, t3
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# CHECK-ASM: encoding: [0xbb,0x12,0xc3,0x3d]
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fslw t0, t1, t2, t3

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