Skip to content

Commit 609ccbb

Browse files
kazutakahiratakazutakahirata
committed
[PowerPC] Use SDNode::uses (NFC)
1 parent 33af589 commit 609ccbb

File tree

2 files changed

+33
-57
lines changed

2 files changed

+33
-57
lines changed

‎llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

Lines changed: 3 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -6276,9 +6276,7 @@ void PPCDAGToDAGISel::PostprocessISelDAG() {
62766276
// be folded with the isel so that we don't need to materialize a register
62776277
// containing zero.
62786278
bool PPCDAGToDAGISel::AllUsersSelectZero(SDNode *N) {
6279-
for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6280-
UI != UE; ++UI) {
6281-
SDNode *User = *UI;
6279+
for (const SDNode *User : N->uses()) {
62826280
if (!User->isMachineOpcode())
62836281
return false;
62846282
if (User->getMachineOpcode() != PPC::SELECT_I4 &&
@@ -6312,18 +6310,14 @@ bool PPCDAGToDAGISel::AllUsersSelectZero(SDNode *N) {
63126310

63136311
void PPCDAGToDAGISel::SwapAllSelectUsers(SDNode *N) {
63146312
SmallVector<SDNode *, 4> ToReplace;
6315-
for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6316-
UI != UE; ++UI) {
6317-
SDNode *User = *UI;
6313+
for (SDNode *User : N->uses()) {
63186314
assert((User->getMachineOpcode() == PPC::SELECT_I4 ||
63196315
User->getMachineOpcode() == PPC::SELECT_I8) &&
63206316
"Must have all select users");
63216317
ToReplace.push_back(User);
63226318
}
63236319

6324-
for (SmallVector<SDNode *, 4>::iterator UI = ToReplace.begin(),
6325-
UE = ToReplace.end(); UI != UE; ++UI) {
6326-
SDNode *User = *UI;
6320+
for (SDNode *User : ToReplace) {
63276321
SDNode *ResNode =
63286322
CurDAG->getMachineNode(User->getMachineOpcode(), SDLoc(User),
63296323
User->getValueType(0), User->getOperand(0),

‎llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 30 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -2570,9 +2570,8 @@ static bool provablyDisjointOr(SelectionDAG &DAG, const SDValue &N) {
25702570
bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base,
25712571
SDValue &Index,
25722572
SelectionDAG &DAG) const {
2573-
for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end();
2574-
UI != E; ++UI) {
2575-
if (MemSDNode *Memop = dyn_cast<MemSDNode>(*UI)) {
2573+
for (SDNode *U : N->uses()) {
2574+
if (MemSDNode *Memop = dyn_cast<MemSDNode>(U)) {
25762575
if (Memop->getMemoryVT() == MVT::f64) {
25772576
Base = N.getOperand(0);
25782577
Index = N.getOperand(1);
@@ -13205,12 +13204,12 @@ static bool findConsecutiveLoad(LoadSDNode *LD, SelectionDAG &DAG) {
1320513204
if (isConsecutiveLS(ChainLD, LD, VT.getStoreSize(), 1, DAG))
1320613205
return true;
1320713206

13208-
for (SDNode::use_iterator UI = LoadRoot->use_begin(),
13209-
UE = LoadRoot->use_end(); UI != UE; ++UI)
13210-
if (((isa<MemSDNode>(*UI) &&
13211-
cast<MemSDNode>(*UI)->getChain().getNode() == LoadRoot) ||
13212-
UI->getOpcode() == ISD::TokenFactor) && !Visited.count(*UI))
13213-
Queue.push_back(*UI);
13207+
for (SDNode *U : LoadRoot->uses())
13208+
if (((isa<MemSDNode>(U) &&
13209+
cast<MemSDNode>(U)->getChain().getNode() == LoadRoot) ||
13210+
U->getOpcode() == ISD::TokenFactor) &&
13211+
!Visited.count(U))
13212+
Queue.push_back(U);
1321413213
}
1321513214
}
1321613215

@@ -13267,11 +13266,9 @@ SDValue PPCTargetLowering::ConvertSETCCToSubtract(SDNode *N,
1326713266

1326813267
// If all users of SETCC extend its value to a legal integer type
1326913268
// then we replace SETCC with a subtraction
13270-
for (SDNode::use_iterator UI = N->use_begin(),
13271-
UE = N->use_end(); UI != UE; ++UI) {
13272-
if (UI->getOpcode() != ISD::ZERO_EXTEND)
13269+
for (const SDNode *U : N->uses())
13270+
if (U->getOpcode() != ISD::ZERO_EXTEND)
1327313271
return SDValue();
13274-
}
1327513272

1327613273
ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
1327713274
auto OpSize = N->getOperand(0).getValueSizeInBits();
@@ -13448,10 +13445,7 @@ SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
1344813445
if (isa<ConstantSDNode>(Inputs[i]))
1344913446
continue;
1345013447

13451-
for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(),
13452-
UE = Inputs[i].getNode()->use_end();
13453-
UI != UE; ++UI) {
13454-
SDNode *User = *UI;
13448+
for (const SDNode *User : Inputs[i].getNode()->uses()) {
1345513449
if (User != N && !Visited.count(User))
1345613450
return SDValue();
1345713451

@@ -13472,10 +13466,7 @@ SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
1347213466
}
1347313467

1347413468
for (unsigned i = 0, ie = PromOps.size(); i != ie; ++i) {
13475-
for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(),
13476-
UE = PromOps[i].getNode()->use_end();
13477-
UI != UE; ++UI) {
13478-
SDNode *User = *UI;
13469+
for (const SDNode *User : PromOps[i].getNode()->uses()) {
1347913470
if (User != N && !Visited.count(User))
1348013471
return SDValue();
1348113472

@@ -13660,10 +13651,7 @@ SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
1366013651
if (isa<ConstantSDNode>(Inputs[i]))
1366113652
continue;
1366213653

13663-
for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(),
13664-
UE = Inputs[i].getNode()->use_end();
13665-
UI != UE; ++UI) {
13666-
SDNode *User = *UI;
13654+
for (SDNode *User : Inputs[i].getNode()->uses()) {
1366713655
if (User != N && !Visited.count(User))
1366813656
return SDValue();
1366913657

@@ -13685,10 +13673,7 @@ SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
1368513673
}
1368613674

1368713675
for (unsigned i = 0, ie = PromOps.size(); i != ie; ++i) {
13688-
for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(),
13689-
UE = PromOps[i].getNode()->use_end();
13690-
UI != UE; ++UI) {
13691-
SDNode *User = *UI;
13676+
for (SDNode *User : PromOps[i].getNode()->uses()) {
1369213677
if (User != N && !Visited.count(User))
1369313678
return SDValue();
1369413679

@@ -15383,36 +15368,33 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
1538315368
APInt::getAllOnes(Bits /* alignment */)
1538415369
.zext(Add.getScalarValueSizeInBits()))) {
1538515370
SDNode *BasePtr = Add->getOperand(0).getNode();
15386-
for (SDNode::use_iterator UI = BasePtr->use_begin(),
15387-
UE = BasePtr->use_end();
15388-
UI != UE; ++UI) {
15389-
if (UI->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
15390-
cast<ConstantSDNode>(UI->getOperand(0))->getZExtValue() ==
15391-
IID) {
15371+
for (SDNode *U : BasePtr->uses()) {
15372+
if (U->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
15373+
cast<ConstantSDNode>(U->getOperand(0))->getZExtValue() == IID) {
1539215374
// We've found another LVSL/LVSR, and this address is an aligned
1539315375
// multiple of that one. The results will be the same, so use the
1539415376
// one we've just found instead.
1539515377

15396-
return SDValue(*UI, 0);
15378+
return SDValue(U, 0);
1539715379
}
1539815380
}
1539915381
}
1540015382

1540115383
if (isa<ConstantSDNode>(Add->getOperand(1))) {
1540215384
SDNode *BasePtr = Add->getOperand(0).getNode();
15403-
for (SDNode::use_iterator UI = BasePtr->use_begin(),
15404-
UE = BasePtr->use_end(); UI != UE; ++UI) {
15405-
if (UI->getOpcode() == ISD::ADD &&
15406-
isa<ConstantSDNode>(UI->getOperand(1)) &&
15385+
for (SDNode *U : BasePtr->uses()) {
15386+
if (U->getOpcode() == ISD::ADD &&
15387+
isa<ConstantSDNode>(U->getOperand(1)) &&
1540715388
(cast<ConstantSDNode>(Add->getOperand(1))->getZExtValue() -
15408-
cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) %
15409-
(1ULL << Bits) == 0) {
15410-
SDNode *OtherAdd = *UI;
15411-
for (SDNode::use_iterator VI = OtherAdd->use_begin(),
15412-
VE = OtherAdd->use_end(); VI != VE; ++VI) {
15413-
if (VI->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
15414-
cast<ConstantSDNode>(VI->getOperand(0))->getZExtValue() == IID) {
15415-
return SDValue(*VI, 0);
15389+
cast<ConstantSDNode>(U->getOperand(1))->getZExtValue()) %
15390+
(1ULL << Bits) ==
15391+
0) {
15392+
SDNode *OtherAdd = U;
15393+
for (SDNode *V : OtherAdd->uses()) {
15394+
if (V->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
15395+
cast<ConstantSDNode>(V->getOperand(0))->getZExtValue() ==
15396+
IID) {
15397+
return SDValue(V, 0);
1541615398
}
1541715399
}
1541815400
}

0 commit comments

Comments
 (0)