1
+ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1
2
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
2
3
3
4
define <8 x i8 > @tbl1_8b (<16 x i8 > %A , <8 x i8 > %B ) nounwind {
4
- ; CHECK: tbl1_8b
5
- ; CHECK: tbl.8b
5
+ ; CHECK-LABEL: tbl1_8b:
6
+ ; CHECK: // %bb.0:
7
+ ; CHECK-NEXT: tbl.8b v0, { v0 }, v1
8
+ ; CHECK-NEXT: ret
6
9
%tmp3 = call <8 x i8 > @llvm.aarch64.neon.tbl1.v8i8 (<16 x i8 > %A , <8 x i8 > %B )
7
10
ret <8 x i8 > %tmp3
8
11
}
9
12
10
13
define <16 x i8 > @tbl1_16b (<16 x i8 > %A , <16 x i8 > %B ) nounwind {
11
- ; CHECK: tbl1_16b
12
- ; CHECK: tbl.16b
14
+ ; CHECK-LABEL: tbl1_16b:
15
+ ; CHECK: // %bb.0:
16
+ ; CHECK-NEXT: tbl.16b v0, { v0 }, v1
17
+ ; CHECK-NEXT: ret
13
18
%tmp3 = call <16 x i8 > @llvm.aarch64.neon.tbl1.v16i8 (<16 x i8 > %A , <16 x i8 > %B )
14
19
ret <16 x i8 > %tmp3
15
20
}
16
21
17
22
define <8 x i8 > @tbl2_8b (<16 x i8 > %A , <16 x i8 > %B , <8 x i8 > %C ) {
18
- ; CHECK: tbl2_8b
19
- ; CHECK: tbl.8b
23
+ ; CHECK-LABEL: tbl2_8b:
24
+ ; CHECK: // %bb.0:
25
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
26
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
27
+ ; CHECK-NEXT: tbl.8b v0, { v0, v1 }, v2
28
+ ; CHECK-NEXT: ret
20
29
%tmp3 = call <8 x i8 > @llvm.aarch64.neon.tbl2.v8i8 (<16 x i8 > %A , <16 x i8 > %B , <8 x i8 > %C )
21
30
ret <8 x i8 > %tmp3
22
31
}
23
32
24
33
define <16 x i8 > @tbl2_16b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C ) {
25
- ; CHECK: tbl2_16b
26
- ; CHECK: tbl.16b
34
+ ; CHECK-LABEL: tbl2_16b:
35
+ ; CHECK: // %bb.0:
36
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
37
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
38
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1 }, v2
39
+ ; CHECK-NEXT: ret
27
40
%tmp3 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C )
28
41
ret <16 x i8 > %tmp3
29
42
}
30
43
31
44
define <8 x i8 > @tbl3_8b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <8 x i8 > %D ) {
32
- ; CHECK: tbl3_8b
33
- ; CHECK: tbl.8b
45
+ ; CHECK-LABEL: tbl3_8b:
46
+ ; CHECK: // %bb.0:
47
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
48
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
49
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
50
+ ; CHECK-NEXT: tbl.8b v0, { v0, v1, v2 }, v3
51
+ ; CHECK-NEXT: ret
34
52
%tmp3 = call <8 x i8 > @llvm.aarch64.neon.tbl3.v8i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <8 x i8 > %D )
35
53
ret <8 x i8 > %tmp3
36
54
}
37
55
38
56
define <16 x i8 > @tbl3_16b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D ) {
39
- ; CHECK: tbl3_16b
40
- ; CHECK: tbl.16b
57
+ ; CHECK-LABEL: tbl3_16b:
58
+ ; CHECK: // %bb.0:
59
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2
60
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2
61
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2
62
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1, v2 }, v3
63
+ ; CHECK-NEXT: ret
41
64
%tmp3 = call <16 x i8 > @llvm.aarch64.neon.tbl3.v16i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D )
42
65
ret <16 x i8 > %tmp3
43
66
}
44
67
45
68
define <8 x i8 > @tbl4_8b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <8 x i8 > %E ) {
46
- ; CHECK: tbl4_8b
47
- ; CHECK: tbl.8b
69
+ ; CHECK-LABEL: tbl4_8b:
70
+ ; CHECK: // %bb.0:
71
+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
72
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
73
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
74
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
75
+ ; CHECK-NEXT: tbl.8b v0, { v0, v1, v2, v3 }, v4
76
+ ; CHECK-NEXT: ret
48
77
%tmp3 = call <8 x i8 > @llvm.aarch64.neon.tbl4.v8i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <8 x i8 > %E )
49
78
ret <8 x i8 > %tmp3
50
79
}
51
80
52
81
define <16 x i8 > @tbl4_16b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <16 x i8 > %E ) {
53
- ; CHECK: tbl4_16b
54
- ; CHECK: tbl.16b
82
+ ; CHECK-LABEL: tbl4_16b:
83
+ ; CHECK: // %bb.0:
84
+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
85
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
86
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
87
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3
88
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1, v2, v3 }, v4
89
+ ; CHECK-NEXT: ret
55
90
%tmp3 = call <16 x i8 > @llvm.aarch64.neon.tbl4.v16i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <16 x i8 > %E )
56
91
ret <16 x i8 > %tmp3
57
92
}
58
93
94
+ ; CHECK-LABEL: .LCPI8_0:
95
+ ; CHECK-NEXT: .byte 0 // 0x0
96
+ ; CHECK-NEXT: .byte 4 // 0x4
97
+ ; CHECK-NEXT: .byte 8 // 0x8
98
+ ; CHECK-NEXT: .byte 12 // 0xc
99
+ ; CHECK-NEXT: .byte 16 // 0x10
100
+ ; CHECK-NEXT: .byte 20 // 0x14
101
+ ; CHECK-NEXT: .byte 24 // 0x18
102
+ ; CHECK-NEXT: .byte 28 // 0x1c
103
+ ; CHECK-NEXT: .byte 255 // 0xff
104
+ ; CHECK-NEXT: .byte 255 // 0xff
105
+ ; CHECK-NEXT: .byte 255 // 0xff
106
+ ; CHECK-NEXT: .byte 255 // 0xff
107
+ ; CHECK-NEXT: .byte 255 // 0xff
108
+ ; CHECK-NEXT: .byte 255 // 0xff
109
+ ; CHECK-NEXT: .byte 255 // 0xff
110
+ ; CHECK-NEXT: .byte 255 // 0xff
111
+
112
+ define <16 x i8 > @shuffled_tbl2_to_tbl4 (<16 x i8 > %a , <16 x i8 > %b , <16 x i8 > %c , <16 x i8 > %d ) {
113
+ ; CHECK-LABEL: shuffled_tbl2_to_tbl4:
114
+ ; CHECK: // %bb.0:
115
+ ; CHECK-NEXT: adrp x8, .LCPI8_0
116
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
117
+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q2_q3 def $q2_q3
118
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
119
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q2_q3 def $q2_q3
120
+ ; CHECK-NEXT: ldr q4, [x8, :lo12:.LCPI8_0]
121
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1 }, v4
122
+ ; CHECK-NEXT: tbl.16b v1, { v2, v3 }, v4
123
+ ; CHECK-NEXT: mov.d v0[1], v1[0]
124
+ ; CHECK-NEXT: ret
125
+ %t1 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %a , <16 x i8 > %b , <16 x i8 > <i8 0 , i8 4 , i8 8 , i8 12 , i8 16 , i8 20 , i8 24 , i8 28 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 >)
126
+ %t2 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %c , <16 x i8 > %d , <16 x i8 > <i8 0 , i8 4 , i8 8 , i8 12 , i8 16 , i8 20 , i8 24 , i8 28 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 >)
127
+ %s = shufflevector <16 x i8 > %t1 , <16 x i8 > %t2 , <16 x i32 > <i32 0 , i32 1 , i32 2 , i32 3 , i32 4 , i32 5 , i32 6 , i32 7 , i32 16 , i32 17 , i32 18 , i32 19 , i32 20 , i32 21 , i32 22 , i32 23 >
128
+ ret <16 x i8 > %s
129
+ }
130
+
131
+ define <16 x i8 > @shuffled_tbl2_to_tbl4_incompatible_shuffle (<16 x i8 > %a , <16 x i8 > %b , <16 x i8 > %c , <16 x i8 > %d ) {
132
+ ; CHECK-LABEL: shuffled_tbl2_to_tbl4_incompatible_shuffle:
133
+ ; CHECK: // %bb.0:
134
+ ; CHECK-NEXT: adrp x8, .LCPI9_0
135
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
136
+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q2_q3 def $q2_q3
137
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
138
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q2_q3 def $q2_q3
139
+ ; CHECK-NEXT: ldr q4, [x8, :lo12:.LCPI9_0]
140
+ ; CHECK-NEXT: adrp x8, .LCPI9_1
141
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1 }, v4
142
+ ; CHECK-NEXT: tbl.16b v1, { v2, v3 }, v4
143
+ ; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI9_1]
144
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1 }, v2
145
+ ; CHECK-NEXT: ret
146
+ %t1 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %a , <16 x i8 > %b , <16 x i8 > <i8 0 , i8 4 , i8 8 , i8 12 , i8 16 , i8 20 , i8 24 , i8 28 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 >)
147
+ %t2 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %c , <16 x i8 > %d , <16 x i8 > <i8 0 , i8 4 , i8 8 , i8 12 , i8 16 , i8 20 , i8 24 , i8 28 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 >)
148
+ %s = shufflevector <16 x i8 > %t1 , <16 x i8 > %t2 , <16 x i32 > <i32 0 , i32 1 , i32 21 , i32 3 , i32 4 , i32 5 , i32 6 , i32 7 , i32 16 , i32 17 , i32 18 , i32 19 , i32 20 , i32 21 , i32 22 , i32 23 >
149
+ ret <16 x i8 > %s
150
+ }
151
+
152
+ define <16 x i8 > @shuffled_tbl2_to_tbl4_incompatible_tbl2_mask1 (<16 x i8 > %a , <16 x i8 > %b , <16 x i8 > %c , <16 x i8 > %d ) {
153
+ ; CHECK-LABEL: shuffled_tbl2_to_tbl4_incompatible_tbl2_mask1:
154
+ ; CHECK: // %bb.0:
155
+ ; CHECK-NEXT: adrp x8, .LCPI10_0
156
+ ; CHECK-NEXT: adrp x9, .LCPI10_1
157
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
158
+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q2_q3 def $q2_q3
159
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
160
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q2_q3 def $q2_q3
161
+ ; CHECK-NEXT: ldr q4, [x8, :lo12:.LCPI10_0]
162
+ ; CHECK-NEXT: adrp x8, .LCPI10_2
163
+ ; CHECK-NEXT: ldr q5, [x9, :lo12:.LCPI10_1]
164
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1 }, v4
165
+ ; CHECK-NEXT: tbl.16b v1, { v2, v3 }, v5
166
+ ; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI10_2]
167
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1 }, v2
168
+ ; CHECK-NEXT: ret
169
+ %t1 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %a , <16 x i8 > %b , <16 x i8 > <i8 0 , i8 4 , i8 8 , i8 12 , i8 16 , i8 20 , i8 24 , i8 28 , i8 0 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 >)
170
+ %t2 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %c , <16 x i8 > %d , <16 x i8 > <i8 0 , i8 4 , i8 8 , i8 12 , i8 16 , i8 20 , i8 24 , i8 28 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 >)
171
+ %s = shufflevector <16 x i8 > %t1 , <16 x i8 > %t2 , <16 x i32 > <i32 0 , i32 1 , i32 21 , i32 3 , i32 4 , i32 5 , i32 6 , i32 7 , i32 16 , i32 17 , i32 18 , i32 19 , i32 20 , i32 21 , i32 22 , i32 23 >
172
+ ret <16 x i8 > %s
173
+ }
174
+
175
+ define <16 x i8 > @shuffled_tbl2_to_tbl4_incompatible_tbl2_mask2 (<16 x i8 > %a , <16 x i8 > %b , <16 x i8 > %c , <16 x i8 > %d ) {
176
+ ; CHECK-LABEL: shuffled_tbl2_to_tbl4_incompatible_tbl2_mask2:
177
+ ; CHECK: // %bb.0:
178
+ ; CHECK-NEXT: adrp x8, .LCPI11_0
179
+ ; CHECK-NEXT: adrp x9, .LCPI11_1
180
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1
181
+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q2_q3 def $q2_q3
182
+ ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1
183
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q2_q3 def $q2_q3
184
+ ; CHECK-NEXT: ldr q4, [x8, :lo12:.LCPI11_0]
185
+ ; CHECK-NEXT: adrp x8, .LCPI11_2
186
+ ; CHECK-NEXT: ldr q5, [x9, :lo12:.LCPI11_1]
187
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1 }, v4
188
+ ; CHECK-NEXT: tbl.16b v1, { v2, v3 }, v5
189
+ ; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI11_2]
190
+ ; CHECK-NEXT: tbl.16b v0, { v0, v1 }, v2
191
+ ; CHECK-NEXT: ret
192
+ %t1 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %a , <16 x i8 > %b , <16 x i8 > <i8 0 , i8 4 , i8 8 , i8 12 , i8 16 , i8 20 , i8 24 , i8 28 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 >)
193
+ %t2 = call <16 x i8 > @llvm.aarch64.neon.tbl2.v16i8 (<16 x i8 > %c , <16 x i8 > %d , <16 x i8 > <i8 0 , i8 4 , i8 8 , i8 12 , i8 16 , i8 20 , i8 24 , i8 28 , i8 0 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 , i8 -1 >)
194
+ %s = shufflevector <16 x i8 > %t1 , <16 x i8 > %t2 , <16 x i32 > <i32 0 , i32 1 , i32 21 , i32 3 , i32 4 , i32 5 , i32 6 , i32 7 , i32 16 , i32 17 , i32 18 , i32 19 , i32 20 , i32 21 , i32 22 , i32 23 >
195
+ ret <16 x i8 > %s
196
+ }
197
+
59
198
declare <8 x i8 > @llvm.aarch64.neon.tbl1.v8i8 (<16 x i8 >, <8 x i8 >) nounwind readnone
60
199
declare <16 x i8 > @llvm.aarch64.neon.tbl1.v16i8 (<16 x i8 >, <16 x i8 >) nounwind readnone
61
200
declare <8 x i8 > @llvm.aarch64.neon.tbl2.v8i8 (<16 x i8 >, <16 x i8 >, <8 x i8 >) nounwind readnone
@@ -66,57 +205,91 @@ declare <8 x i8> @llvm.aarch64.neon.tbl4.v8i8(<16 x i8>, <16 x i8>, <16 x i8>, <
66
205
declare <16 x i8 > @llvm.aarch64.neon.tbl4.v16i8 (<16 x i8 >, <16 x i8 >, <16 x i8 >, <16 x i8 >, <16 x i8 >) nounwind readnone
67
206
68
207
define <8 x i8 > @tbx1_8b (<8 x i8 > %A , <16 x i8 > %B , <8 x i8 > %C ) nounwind {
69
- ; CHECK: tbx1_8b
70
- ; CHECK: tbx.8b
208
+ ; CHECK-LABEL: tbx1_8b:
209
+ ; CHECK: // %bb.0:
210
+ ; CHECK-NEXT: tbx.8b v0, { v1 }, v2
211
+ ; CHECK-NEXT: ret
71
212
%tmp3 = call <8 x i8 > @llvm.aarch64.neon.tbx1.v8i8 (<8 x i8 > %A , <16 x i8 > %B , <8 x i8 > %C )
72
213
ret <8 x i8 > %tmp3
73
214
}
74
215
75
216
define <16 x i8 > @tbx1_16b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C ) nounwind {
76
- ; CHECK: tbx1_16b
77
- ; CHECK: tbx.16b
217
+ ; CHECK-LABEL: tbx1_16b:
218
+ ; CHECK: // %bb.0:
219
+ ; CHECK-NEXT: tbx.16b v0, { v1 }, v2
220
+ ; CHECK-NEXT: ret
78
221
%tmp3 = call <16 x i8 > @llvm.aarch64.neon.tbx1.v16i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C )
79
222
ret <16 x i8 > %tmp3
80
223
}
81
224
82
225
define <8 x i8 > @tbx2_8b (<8 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <8 x i8 > %D ) {
83
- ; CHECK: tbx2_8b
84
- ; CHECK: tbx.8b
226
+ ; CHECK-LABEL: tbx2_8b:
227
+ ; CHECK: // %bb.0:
228
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q1_q2 def $q1_q2
229
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q1_q2 def $q1_q2
230
+ ; CHECK-NEXT: tbx.8b v0, { v1, v2 }, v3
231
+ ; CHECK-NEXT: ret
85
232
%tmp3 = call <8 x i8 > @llvm.aarch64.neon.tbx2.v8i8 (<8 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <8 x i8 > %D )
86
233
ret <8 x i8 > %tmp3
87
234
}
88
235
89
236
define <16 x i8 > @tbx2_16b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D ) {
90
- ; CHECK: tbx2_16b
91
- ; CHECK: tbx.16b
237
+ ; CHECK-LABEL: tbx2_16b:
238
+ ; CHECK: // %bb.0:
239
+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q1_q2 def $q1_q2
240
+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q1_q2 def $q1_q2
241
+ ; CHECK-NEXT: tbx.16b v0, { v1, v2 }, v3
242
+ ; CHECK-NEXT: ret
92
243
%tmp3 = call <16 x i8 > @llvm.aarch64.neon.tbx2.v16i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D )
93
244
ret <16 x i8 > %tmp3
94
245
}
95
246
96
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define <8 x i8 > @tbx3_8b (<8 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <8 x i8 > %E ) {
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- ; CHECK: tbx3_8b
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- ; CHECK: tbx.8b
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+ ; CHECK-LABEL: tbx3_8b:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q1_q2_q3 def $q1_q2_q3
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+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q1_q2_q3 def $q1_q2_q3
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+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q1_q2_q3 def $q1_q2_q3
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+ ; CHECK-NEXT: tbx.8b v0, { v1, v2, v3 }, v4
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+ ; CHECK-NEXT: ret
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%tmp3 = call <8 x i8 > @llvm.aarch64.neon.tbx3.v8i8 (< 8 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <8 x i8 > %E )
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ret <8 x i8 > %tmp3
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}
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define <16 x i8 > @tbx3_16b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <16 x i8 > %E ) {
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- ; CHECK: tbx3_16b
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- ; CHECK: tbx.16b
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+ ; CHECK-LABEL: tbx3_16b:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q1_q2_q3 def $q1_q2_q3
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+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q1_q2_q3 def $q1_q2_q3
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+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q1_q2_q3 def $q1_q2_q3
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+ ; CHECK-NEXT: tbx.16b v0, { v1, v2, v3 }, v4
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+ ; CHECK-NEXT: ret
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%tmp3 = call <16 x i8 > @llvm.aarch64.neon.tbx3.v16i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <16 x i8 > %E )
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ret <16 x i8 > %tmp3
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}
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define <8 x i8 > @tbx4_8b (<8 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <16 x i8 > %E , <8 x i8 > %F ) {
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- ; CHECK: tbx4_8b
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- ; CHECK: tbx.8b
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+ ; CHECK-LABEL: tbx4_8b:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: // kill: def $q4 killed $q4 killed $q1_q2_q3_q4 def $q1_q2_q3_q4
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+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q1_q2_q3_q4 def $q1_q2_q3_q4
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+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q1_q2_q3_q4 def $q1_q2_q3_q4
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+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q1_q2_q3_q4 def $q1_q2_q3_q4
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+ ; CHECK-NEXT: tbx.8b v0, { v1, v2, v3, v4 }, v5
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+ ; CHECK-NEXT: ret
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%tmp3 = call <8 x i8 > @llvm.aarch64.neon.tbx4.v8i8 (<8 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <16 x i8 > %E , <8 x i8 > %F )
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ret <8 x i8 > %tmp3
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}
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define <16 x i8 > @tbx4_16b (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <16 x i8 > %E , <16 x i8 > %F ) {
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- ; CHECK: tbx4_16b
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- ; CHECK: tbx.16b
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+ ; CHECK-LABEL: tbx4_16b:
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+ ; CHECK: // %bb.0:
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+ ; CHECK-NEXT: // kill: def $q4 killed $q4 killed $q1_q2_q3_q4 def $q1_q2_q3_q4
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+ ; CHECK-NEXT: // kill: def $q3 killed $q3 killed $q1_q2_q3_q4 def $q1_q2_q3_q4
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+ ; CHECK-NEXT: // kill: def $q2 killed $q2 killed $q1_q2_q3_q4 def $q1_q2_q3_q4
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+ ; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q1_q2_q3_q4 def $q1_q2_q3_q4
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+ ; CHECK-NEXT: tbx.16b v0, { v1, v2, v3, v4 }, v5
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+ ; CHECK-NEXT: ret
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%tmp3 = call <16 x i8 > @llvm.aarch64.neon.tbx4.v16i8 (<16 x i8 > %A , <16 x i8 > %B , <16 x i8 > %C , <16 x i8 > %D , <16 x i8 > %E , <16 x i8 > %F )
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ret <16 x i8 > %tmp3
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}
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