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ARMAsmBackend: Use fixupNeedsRelaxationAdvanced. NFC
This prepares for the upcoming change to simplify relocation recording in MCAssembler. While both MCAssembler::fixupNeedsRelaxation and MCAssembler::handleFixup call evaluateFixup and use shouldForceRelocation, the shouldForceRelocation logic is not supposed to be needed by MCAssembler::fixupNeedsRelaxation. The ARM special cases for interworking branches (https://reviews.llvm.org/D33436 and https://reviews.llvm.org/D33898) break the assumption. Switch to fixupNeedsRelaxationAdvanced and explicitly test the conditions.
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+34
-16
lines changed

2 files changed

+34
-16
lines changed

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Lines changed: 30 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -335,8 +335,34 @@ const char *ARMAsmBackend::reasonForFixupRelaxation(const MCFixup &Fixup,
335335
return nullptr;
336336
}
337337

338-
bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
339-
uint64_t Value) const {
338+
static bool needsInterworking(const MCAssembler &Asm, const MCSymbol *Sym,
339+
unsigned FixupKind) {
340+
// Create relocations for unconditional branches to function symbols with
341+
// different execution mode in ELF binaries.
342+
if (!Sym || !Sym->isELF())
343+
return false;
344+
unsigned Type = cast<MCSymbolELF>(Sym)->getType();
345+
if ((Type == ELF::STT_FUNC || Type == ELF::STT_GNU_IFUNC)) {
346+
if (Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_uncondbranch))
347+
return true;
348+
if (!Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_thumb_br ||
349+
FixupKind == ARM::fixup_arm_thumb_bl ||
350+
FixupKind == ARM::fixup_t2_condbranch ||
351+
FixupKind == ARM::fixup_t2_uncondbranch))
352+
return true;
353+
}
354+
return false;
355+
}
356+
357+
bool ARMAsmBackend::fixupNeedsRelaxationAdvanced(
358+
const MCAssembler &Asm, const MCRelaxableFragment &, const MCFixup &Fixup,
359+
const MCValue &Target, uint64_t Value, bool Resolved, bool) const {
360+
const MCSymbol *Sym = Target.getAddSym();
361+
if (needsInterworking(Asm, Sym, Fixup.getTargetKind()))
362+
return true;
363+
364+
if (!Resolved)
365+
return true;
340366
return reasonForFixupRelaxation(Fixup, Value);
341367
}
342368

@@ -973,18 +999,8 @@ bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
973999
}
9741000
// Create relocations for unconditional branches to function symbols with
9751001
// different execution mode in ELF binaries.
976-
if (Sym && Sym->isELF()) {
977-
unsigned Type = cast<MCSymbolELF>(Sym)->getType();
978-
if ((Type == ELF::STT_FUNC || Type == ELF::STT_GNU_IFUNC)) {
979-
if (Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_uncondbranch))
980-
return true;
981-
if (!Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_thumb_br ||
982-
FixupKind == ARM::fixup_arm_thumb_bl ||
983-
FixupKind == ARM::fixup_t2_condbranch ||
984-
FixupKind == ARM::fixup_t2_uncondbranch))
985-
return true;
986-
}
987-
}
1002+
if (needsInterworking(Asm, Sym, Fixup.getTargetKind()))
1003+
return true;
9881004
// We must always generate a relocation for BL/BLX instructions if we have
9891005
// a symbol to reference, as the linker relies on knowing the destination
9901006
// symbol's thumb-ness to get interworking right.

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,10 @@ class ARMAsmBackend : public MCAsmBackend {
5454
const char *reasonForFixupRelaxation(const MCFixup &Fixup,
5555
uint64_t Value) const;
5656

57-
bool fixupNeedsRelaxation(const MCFixup &Fixup,
58-
uint64_t Value) const override;
57+
bool fixupNeedsRelaxationAdvanced(const MCAssembler &,
58+
const MCRelaxableFragment &,
59+
const MCFixup &, const MCValue &, uint64_t,
60+
bool, bool) const override;
5961

6062
void relaxInstruction(MCInst &Inst,
6163
const MCSubtargetInfo &STI) const override;

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