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[CodeGen][DebugInfo] Append OP_deref when converting an EntryValue dbg.declare
When we convert an EntryValue dbg.declare into an entry of the MF side table, we currently copy its DIExpression as is, and rely on subsequent layers to "know" that this expression is implicitly indirect. This is bad because it adds an implicit assumption to the IR representation, and requires subsequent layers to know about this assumption. This also limits the reusability of this table: what if, in the future, we want to use this table for dbg.values? This patch changes existing behavior so that the entities converting dbg_declares explicitly add an OP_deref when converting EntryValue dbg.declares. Differential Revision: https://reviews.llvm.org/D158437 (cherry picked from commit 8841709)
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5 files changed

+9
-5
lines changed

5 files changed

+9
-5
lines changed

llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1573,7 +1573,7 @@ void DwarfDebug::collectVariableInfoFromMFTable(
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if (VI.inStackSlot())
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RegVar->initializeMMI(VI.Expr, VI.getStackSlot());
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else {
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MachineLocation MLoc(VI.getEntryValueRegister(), /*IsIndirect*/ true);
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MachineLocation MLoc(VI.getEntryValueRegister(), /*IsIndirect*/ false);
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auto LocEntry = DbgValueLocEntry(MLoc);
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RegVar->initializeDbgValue(DbgValueLoc(VI.Expr, LocEntry));
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}

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1939,6 +1939,8 @@ bool IRTranslator::translateIfEntryValueArgument(
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if (!PhysReg)
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return false;
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// Append an op deref to account for the fact that this is a dbg_declare.
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Expr = DIExpression::append(Expr, dwarf::DW_OP_deref);
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MF->setVariableDbgInfo(DebugInst.getVariable(), Expr, *PhysReg,
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DebugInst.getDebugLoc());
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return true;

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1357,6 +1357,8 @@ static bool processIfEntryValueDbgDeclare(FunctionLoweringInfo &FuncInfo,
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// Find the corresponding livein physical register to this argument.
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for (auto [PhysReg, VirtReg] : FuncInfo.RegInfo->liveins())
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if (VirtReg == ArgVReg) {
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// Append an op deref to account for the fact that this is a dbg_declare.
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Expr = DIExpression::append(Expr, dwarf::DW_OP_deref);
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FuncInfo.MF->setVariableDbgInfo(Var, Expr, PhysReg, DbgLoc);
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LLVM_DEBUG(dbgs() << "processDbgDeclare: setVariableDbgInfo Var=" << *Var
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<< ", Expr=" << *Expr << ", MCRegister=" << PhysReg

llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,11 @@
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; RUN: llc -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s
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; CHECK: void @foo
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; CHECK-NEXT: dbg.declare(metadata {{.*}}, metadata ![[VAR:.*]], metadata ![[EXPR:.*]]), !dbg ![[LOC:.*]]
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; CHECK-NEXT: dbg.declare(metadata {{.*}}, metadata ![[VAR:.*]], metadata !DIExpression([[EXPR:.*]])), !dbg ![[LOC:.*]]
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; CHECK: entry_values:
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; CHECK-NEXT: entry-value-register: '$x22', debug-info-variable: '![[VAR]]', debug-info-expression: '![[EXPR]]',
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; CHECK-NEXT: entry-value-register: '$x22', debug-info-variable: '![[VAR]]', debug-info-expression: '!DIExpression([[EXPR]], DW_OP_deref)',
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; CHECK-NEXT: debug-info-location: '![[LOC]]
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; CHECK-NEXT: entry-value-register: '$x22', debug-info-variable: '![[VAR]]', debug-info-expression: '![[EXPR]]'
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; CHECK-NEXT: entry-value-register: '$x22', debug-info-variable: '![[VAR]]', debug-info-expression: '!DIExpression([[EXPR]], DW_OP_deref)'
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; CHECK-NEXT: debug-info-location: '![[LOC]]
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; CHECK-NOT: DBG_VALUE

llvm/test/DebugInfo/AArch64/dbg-entry-value-swiftasync.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ stack:
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- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
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stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true }
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entry_values:
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- { entry-value-register: '$x22', debug-info-variable: '!10', debug-info-expression: '!DIExpression(DW_OP_LLVM_entry_value, 1)',
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- { entry-value-register: '$x22', debug-info-variable: '!10', debug-info-expression: '!DIExpression(DW_OP_LLVM_entry_value, 1, DW_OP_deref)',
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debug-info-location: '!12' }
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body: |
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bb.0 (%ir-block.0):

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