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[AArch64] Add test checking for which Apple CPUs SelectOpt is enabled.
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=arm64-apple-macosx -O3 -early-ifcvt-limit=0 -select-opti-loop-cycle-gain-threshold=2 -select-opti-loop-gradient-gain-threshold=10 -mcpu=apple-a7 -o - %s | FileCheck %s
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; RUN: llc -mtriple=arm64-apple-macosx -O3 -early-ifcvt-limit=0 -select-opti-loop-cycle-gain-threshold=2 -select-opti-loop-gradient-gain-threshold=10 -mcpu=apple-m1 -o - %s | FileCheck %s
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; RUN: llc -mtriple=arm64-apple-macosx -O3 -early-ifcvt-limit=0 -select-opti-loop-cycle-gain-threshold=2 -select-opti-loop-gradient-gain-threshold=10 -mcpu=apple-m2 -o - %s | FileCheck %s
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; RUN: llc -mtriple=arm64-apple-macosx -O3 -early-ifcvt-limit=0 -select-opti-loop-cycle-gain-threshold=2 -select-opti-loop-gradient-gain-threshold=10 -mcpu=apple-m3 -o - %s | FileCheck %s
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; RUN: llc -mtriple=arm64-apple-macosx -O3 -early-ifcvt-limit=0 -select-opti-loop-cycle-gain-threshold=2 -select-opti-loop-gradient-gain-threshold=10 -mcpu=apple-m4 -o - %s | FileCheck %s
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define void @test_select_opt(ptr %dst, ptr %src, i64 %j.start, i64 %p, i64 %i.start) {
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; CHECK-LABEL: test_select_opt:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: add x8, x2, #1
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; CHECK-NEXT: LBB0_1: ; %loop
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; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr x9, [x1, x4, lsl #3]
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; CHECK-NEXT: ldr x10, [x1, x2, lsl #3]
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; CHECK-NEXT: cmp x9, x10
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; CHECK-NEXT: cset w9, lo
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; CHECK-NEXT: cinc x2, x2, lo
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; CHECK-NEXT: sub x9, x4, x9
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; CHECK-NEXT: str x2, [x0, x9, lsl #3]
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; CHECK-NEXT: mov x4, x2
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; CHECK-NEXT: subs x8, x8, #1
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; CHECK-NEXT: b.ne LBB0_1
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; CHECK-NEXT: ; %bb.2: ; %exit
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; CHECK-NEXT: ret
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%j = phi i64 [ %j.start, %entry ], [ %j.next, %loop ]
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%i = phi i64 [ %i.start, %entry ], [ %j.next, %loop ]
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%gep.i = getelementptr inbounds ptr, ptr %src, i64 %i
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%l.i = load ptr, ptr %gep.i, align 8
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%gep.j = getelementptr inbounds ptr, ptr %src, i64 %j
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%l.j = load ptr, ptr %gep.j, align 8
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%cmp3 = icmp ult ptr %l.i, %l.j
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%dec = zext i1 %cmp3 to i64
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%dec.i = sext i1 %cmp3 to i64
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%j.next = add nsw i64 %j, %dec
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%i.next = add nsw i64 %i, %dec.i
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%gep.dst = getelementptr inbounds ptr, ptr %dst, i64 %i.next
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store i64 %j.next, ptr %gep.dst, align 8
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%iv.next = add i64 %iv, 1
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%ec = icmp eq i64 %iv, %j.start
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br i1 %ec, label %exit, label %loop
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exit:
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ret void
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}

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