Skip to content

Commit 69bdfb0

Browse files
committed
[IR] Clean up dead instructions after simplifying a conditional branch
Change BasicBlock::removePredecessor to optionally return a vector of instructions which might be dead. Use this in ConstantFoldTerminator to delete them if they are dead. Reapply with a bug fix: don't drop the "!KeepOneInputPHIs" argument when removePredecessor calls PHINode::removeIncomingValue. Differential Revision: https://reviews.llvm.org/D80206
1 parent 3d5f7c8 commit 69bdfb0

File tree

4 files changed

+88
-73
lines changed

4 files changed

+88
-73
lines changed

llvm/include/llvm/IR/BasicBlock.h

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
#include "llvm/IR/Instruction.h"
2323
#include "llvm/IR/SymbolTableListTraits.h"
2424
#include "llvm/IR/Value.h"
25+
#include "llvm/IR/ValueHandle.h"
2526
#include "llvm/Support/CBindingWrapping.h"
2627
#include "llvm/Support/Casting.h"
2728
#include "llvm/Support/Compiler.h"
@@ -376,7 +377,13 @@ class BasicBlock final : public Value, // Basic blocks are data objects also
376377
/// If \p KeepOneInputPHIs is true then don't remove PHIs that are left with
377378
/// zero or one incoming values, and don't simplify PHIs with all incoming
378379
/// values the same.
379-
void removePredecessor(BasicBlock *Pred, bool KeepOneInputPHIs = false);
380+
///
381+
/// If \p MaybeDeadInstrs is not nullptr then whenever we drop a reference to
382+
/// an instruction, append it to the vector. The caller should check whether
383+
/// these instructions are now trivially dead, and if so delete them.
384+
void
385+
removePredecessor(BasicBlock *Pred, bool KeepOneInputPHIs = false,
386+
SmallVectorImpl<WeakTrackingVH> *MaybeDeadInstrs = nullptr);
380387

381388
bool canSplitPredecessors() const;
382389

llvm/lib/IR/BasicBlock.cpp

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -323,8 +323,13 @@ iterator_range<BasicBlock::phi_iterator> BasicBlock::phis() {
323323
/// If \p KeepOneInputPHIs is true then don't remove PHIs that are left with
324324
/// zero or one incoming values, and don't simplify PHIs with all incoming
325325
/// values the same.
326-
void BasicBlock::removePredecessor(BasicBlock *Pred,
327-
bool KeepOneInputPHIs) {
326+
///
327+
/// If \p MaybeDeadInstrs is not nullptr then whenever we drop a reference to
328+
/// an instruction, append it to the vector. The caller should check whether
329+
/// these instructions are now trivially dead, and if so delete them.
330+
void BasicBlock::removePredecessor(
331+
BasicBlock *Pred, bool KeepOneInputPHIs,
332+
SmallVectorImpl<WeakTrackingVH> *MaybeDeadInstrs) {
328333
// Use hasNUsesOrMore to bound the cost of this assertion for complex CFGs.
329334
assert((hasNUsesOrMore(16) ||
330335
find(pred_begin(this), pred_end(this), Pred) != pred_end(this)) &&
@@ -338,7 +343,11 @@ void BasicBlock::removePredecessor(BasicBlock *Pred,
338343
// Update all PHI nodes.
339344
for (iterator II = begin(); isa<PHINode>(II);) {
340345
PHINode *PN = cast<PHINode>(II++);
341-
PN->removeIncomingValue(Pred, !KeepOneInputPHIs);
346+
Value *V = PN->removeIncomingValue(Pred, !KeepOneInputPHIs);
347+
if (MaybeDeadInstrs) {
348+
if (auto *I = dyn_cast<Instruction>(V))
349+
MaybeDeadInstrs->push_back(I);
350+
}
342351
if (!KeepOneInputPHIs) {
343352
// If we have a single predecessor, removeIncomingValue erased the PHI
344353
// node itself.

llvm/lib/Transforms/Utils/Local.cpp

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -126,8 +126,11 @@ bool llvm::ConstantFoldTerminator(BasicBlock *BB, bool DeleteDeadConditions,
126126
BasicBlock *OldDest = Cond->getZExtValue() ? Dest2 : Dest1;
127127

128128
// Let the basic block know that we are letting go of it. Based on this,
129-
// it will adjust it's PHI nodes.
130-
OldDest->removePredecessor(BB);
129+
// it will adjust its PHI nodes.
130+
SmallVector<WeakTrackingVH, 8> MaybeDeadInstrs;
131+
OldDest->removePredecessor(BB, false, &MaybeDeadInstrs);
132+
RecursivelyDeleteTriviallyDeadInstructionsPermissive(MaybeDeadInstrs,
133+
TLI);
131134

132135
// Replace the conditional branch with an unconditional one.
133136
Builder.CreateBr(Destination);
@@ -470,8 +473,8 @@ bool llvm::RecursivelyDeleteTriviallyDeadInstructionsPermissive(
470473
MemorySSAUpdater *MSSAU) {
471474
unsigned S = 0, E = DeadInsts.size(), Alive = 0;
472475
for (; S != E; ++S) {
473-
auto *I = cast<Instruction>(DeadInsts[S]);
474-
if (!isInstructionTriviallyDead(I)) {
476+
auto *I = dyn_cast<Instruction>(DeadInsts[S]);
477+
if (!I || !isInstructionTriviallyDead(I)) {
475478
DeadInsts[S] = nullptr;
476479
++Alive;
477480
}

llvm/test/Transforms/PGOProfile/chr.ll

Lines changed: 61 additions & 65 deletions
Original file line numberDiff line numberDiff line change
@@ -448,34 +448,33 @@ define i32 @test_chr_5(i32* %i, i32 %sum0) !prof !14 {
448448
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
449449
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 15
450450
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 15
451-
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
452-
; CHECK: bb0:
453-
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 85
454-
; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 173
451+
; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
452+
; CHECK: bb1:
453+
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 173
455454
; CHECK-NEXT: br label [[BB3:%.*]]
456455
; CHECK: entry.split.nonchr:
457-
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 255
458-
; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
459-
; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
456+
; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 255
457+
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
458+
; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
460459
; CHECK: bb0.nonchr:
461-
; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 1
462-
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
463-
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[SUM0]], 42
464-
; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM0]], i32 [[TMP9]], !prof !16
465-
; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 2
466-
; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
467-
; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[SUM1_NONCHR]], 43
468-
; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP11]], i32 [[SUM1_NONCHR]], i32 [[TMP12]], !prof !16
469-
; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[TMP0]], 4
470-
; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0
471-
; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[TMP0]], 8
472-
; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
473-
; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP16]], i32 44, i32 88
460+
; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 1
461+
; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
462+
; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM0]], 42
463+
; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP7]], i32 [[SUM0]], i32 [[TMP8]], !prof !16
464+
; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP0]], 2
465+
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
466+
; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[SUM1_NONCHR]], 43
467+
; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP10]], i32 [[SUM1_NONCHR]], i32 [[TMP11]], !prof !16
468+
; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[TMP0]], 4
469+
; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 0
470+
; CHECK-NEXT: [[TMP14:%.*]] = and i32 [[TMP0]], 8
471+
; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i32 [[TMP14]], 0
472+
; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP15]], i32 44, i32 88
474473
; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
475-
; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP14]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
474+
; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP13]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
476475
; CHECK-NEXT: br label [[BB3]]
477476
; CHECK: bb3:
478-
; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP4]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
477+
; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP3]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
479478
; CHECK-NEXT: ret i32 [[SUM6]]
480479
;
481480
entry:
@@ -548,34 +547,33 @@ define i32 @test_chr_5_1(i32* %i, i32 %sum0) !prof !14 {
548547
; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 11
549548
; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 11
550549
; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP2]]
551-
; CHECK-NEXT: br i1 [[TMP5]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
552-
; CHECK: bb0:
553-
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[SUM0]], 85
554-
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[SUM0]], 173
550+
; CHECK-NEXT: br i1 [[TMP5]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
551+
; CHECK: bb1:
552+
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[SUM0]], 173
555553
; CHECK-NEXT: br label [[BB3:%.*]]
556554
; CHECK: entry.split.nonchr:
557-
; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[TMP0]], 255
558-
; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 0
559-
; CHECK-NEXT: br i1 [[TMP9]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
555+
; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 255
556+
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
557+
; CHECK-NEXT: br i1 [[TMP8]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
560558
; CHECK: bb0.nonchr:
561-
; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 1
562-
; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
563-
; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[SUM0]], 42
564-
; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP11]], i32 [[SUM0]], i32 [[TMP12]], !prof !16
565-
; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[TMP0]], 2
566-
; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0
567-
; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[SUM1_NONCHR]], 43
568-
; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP14]], i32 [[SUM1_NONCHR]], i32 [[TMP15]], !prof !16
569-
; CHECK-NEXT: [[TMP16:%.*]] = and i32 [[SUM0]], 4
570-
; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[TMP16]], 0
571-
; CHECK-NEXT: [[TMP18:%.*]] = and i32 [[TMP0]], 8
572-
; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i32 [[TMP18]], 0
573-
; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP19]], i32 44, i32 88
559+
; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP0]], 1
560+
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
561+
; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[SUM0]], 42
562+
; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP10]], i32 [[SUM0]], i32 [[TMP11]], !prof !16
563+
; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[TMP0]], 2
564+
; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 0
565+
; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[SUM1_NONCHR]], 43
566+
; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP13]], i32 [[SUM1_NONCHR]], i32 [[TMP14]], !prof !16
567+
; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[SUM0]], 4
568+
; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
569+
; CHECK-NEXT: [[TMP17:%.*]] = and i32 [[TMP0]], 8
570+
; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP17]], 0
571+
; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP18]], i32 44, i32 88
574572
; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
575-
; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP17]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
573+
; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP16]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
576574
; CHECK-NEXT: br label [[BB3]]
577575
; CHECK: bb3:
578-
; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP7]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
576+
; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP6]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
579577
; CHECK-NEXT: ret i32 [[SUM6]]
580578
;
581579
entry:
@@ -649,10 +647,9 @@ define i32 @test_chr_6(i32* %i, i32* %j, i32 %sum0) !prof !14 {
649647
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I0]], 10
650648
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 10
651649
; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[V10]]
652-
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
653-
; CHECK: bb0:
654-
; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43
655-
; CHECK-NEXT: [[V13:%.*]] = add i32 [[SUM0]], 131
650+
; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
651+
; CHECK: bb1:
652+
; CHECK-NEXT: [[V13:%.*]] = add i32 [[SUM0:%.*]], 131
656653
; CHECK-NEXT: br label [[BB3:%.*]]
657654
; CHECK: entry.split.nonchr:
658655
; CHECK-NEXT: [[V1:%.*]] = and i32 [[I0]], 255
@@ -672,7 +669,7 @@ define i32 @test_chr_6(i32* %i, i32* %j, i32 %sum0) !prof !14 {
672669
; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[V10_NONCHR]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
673670
; CHECK-NEXT: br label [[BB3]]
674671
; CHECK: bb3:
675-
; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[V13]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
672+
; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[V13]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
676673
; CHECK-NEXT: ret i32 [[SUM6]]
677674
;
678675
entry:
@@ -1737,28 +1734,27 @@ define i32 @test_chr_19(i32* %i, i32 %sum0) !prof !14 {
17371734
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
17381735
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 9
17391736
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 9
1740-
; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
1741-
; CHECK: bb0:
1742-
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 85
1743-
; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 173
1737+
; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
1738+
; CHECK: bb1:
1739+
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 173
17441740
; CHECK-NEXT: br label [[BB3:%.*]]
17451741
; CHECK: entry.split.nonchr:
1746-
; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 255
1747-
; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
1748-
; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
1742+
; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 255
1743+
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
1744+
; CHECK-NEXT: br i1 [[TMP5]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
17491745
; CHECK: bb0.nonchr:
1750-
; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 1
1751-
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
1752-
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[SUM0]], 85
1753-
; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM0]], i32 [[TMP9]], !prof !16
1754-
; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 8
1755-
; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
1756-
; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP11]], i32 44, i32 88
1746+
; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 1
1747+
; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
1748+
; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM0]], 85
1749+
; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP7]], i32 [[SUM0]], i32 [[TMP8]], !prof !16
1750+
; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP0]], 8
1751+
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP9]], 0
1752+
; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP10]], i32 44, i32 88
17571753
; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
1758-
; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
1754+
; CHECK-NEXT: [[SUM5_NONCHR:%.*]] = select i1 [[TMP7]], i32 [[SUM2_NONCHR]], i32 [[SUM4_NONCHR]], !prof !16
17591755
; CHECK-NEXT: br label [[BB3]]
17601756
; CHECK: bb3:
1761-
; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP4]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
1757+
; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP3]], [[BB1]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM5_NONCHR]], [[BB0_NONCHR]] ]
17621758
; CHECK-NEXT: ret i32 [[SUM6]]
17631759
;
17641760
entry:

0 commit comments

Comments
 (0)