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[AArch64][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local
Similar to X86 D73230 & 46788a2 With this change, we can set dso_local in clang's -fpic -fno-semantic-interposition mode, for default visibility external linkage non-ifunc-non-COMDAT definitions. For such dso_local definitions, variable access/taking the address of a function/calling a function will go through a local alias to avoid GOT/PLT. Note: the 'S' inline assembly constraint refers to an absolute symbolic address or a label reference (D46745). Differential Revision: https://reviews.llvm.org/D101872
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6 files changed

+141
-42
lines changed

6 files changed

+141
-42
lines changed

‎llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -589,7 +589,7 @@ void AsmPrinter::PrintSpecial(const MachineInstr *MI, raw_ostream &OS,
589589

590590
void AsmPrinter::PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS) {
591591
assert(MO.isGlobal() && "caller should check MO.isGlobal");
592-
getSymbol(MO.getGlobal())->print(OS, MAI);
592+
getSymbolPreferLocal(*MO.getGlobal())->print(OS, MAI);
593593
printOffset(MO.getOffset(), OS);
594594
}
595595

‎llvm/lib/Target/AArch64/AArch64MCInstLower.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ AArch64MCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const {
3939
unsigned TargetFlags = MO.getTargetFlags();
4040
const Triple &TheTriple = Printer.TM.getTargetTriple();
4141
if (!TheTriple.isOSBinFormatCOFF())
42-
return Printer.getSymbol(GV);
42+
return Printer.getSymbolPreferLocal(*GV);
4343

4444
assert(TheTriple.isOSWindows() &&
4545
"Windows is the only supported COFF target");

‎llvm/test/CodeGen/AArch64/basic-pic.ll

Lines changed: 0 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -22,33 +22,3 @@ define i32* @get_globalvaraddr() {
2222

2323
ret i32* @var
2424
}
25-
26-
@hiddenvar = hidden global i32 0
27-
28-
define i32 @get_hiddenvar() {
29-
; CHECK-LABEL: get_hiddenvar:
30-
31-
%val = load i32, i32* @hiddenvar
32-
; CHECK: adrp x[[HI:[0-9]+]], hiddenvar
33-
; CHECK: ldr w0, [x[[HI]], :lo12:hiddenvar]
34-
35-
ret i32 %val
36-
}
37-
38-
define i32* @get_hiddenvaraddr() {
39-
; CHECK-LABEL: get_hiddenvaraddr:
40-
41-
%val = load i32, i32* @hiddenvar
42-
; CHECK: adrp [[HI:x[0-9]+]], hiddenvar
43-
; CHECK: add x0, [[HI]], :lo12:hiddenvar
44-
45-
ret i32* @hiddenvar
46-
}
47-
48-
define void()* @get_func() {
49-
; CHECK-LABEL: get_func:
50-
51-
ret void()* bitcast(void()*()* @get_func to void()*)
52-
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:get_func
53-
; CHECK: ldr x0, [x[[GOTHI]], :got_lo12:get_func]
54-
}

‎llvm/test/CodeGen/AArch64/elf-globals-static.ll

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -78,16 +78,6 @@ define i64* @test_addr() {
7878
; CHECK-FAST: add x0, [[HIREG]], :lo12:var64
7979
}
8080

81-
@hiddenvar = hidden global i32 0, align 4
82-
@protectedvar = protected global i32 0, align 4
83-
84-
define i32 @test_vis() {
85-
%lhs = load i32, i32* @hiddenvar, align 4
86-
%rhs = load i32, i32* @protectedvar, align 4
87-
%ret = add i32 %lhs, %rhs
88-
ret i32 %ret
89-
}
90-
9181
@var_default = external dso_local global [2 x i32]
9282

9383
define i32 @test_default_align() {

‎llvm/test/CodeGen/AArch64/elf-preemption.ll

Lines changed: 114 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,114 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc -mtriple=aarch64 -relocation-model=static < %s | FileCheck %s --check-prefixes=CHECK,STATIC
3+
; RUN: llc -mtriple=aarch64 -relocation-model=pic < %s | FileCheck %s --check-prefixes=CHECK,PIC
4+
5+
@preemptable_var = dso_preemptable global i32 42
6+
define i32* @get_preemptable_var() nounwind {
7+
; CHECK-LABEL: get_preemptable_var:
8+
; CHECK: // %bb.0:
9+
; CHECK-NEXT: adrp x0, :got:preemptable_var
10+
; CHECK-NEXT: ldr x0, [x0, :got_lo12:preemptable_var]
11+
; CHECK-NEXT: ret
12+
ret i32* @preemptable_var
13+
}
14+
15+
@dsolocal_var = dso_local global i32 42
16+
define i32* @get_dsolocal_var() nounwind {
17+
; STATIC-LABEL: get_dsolocal_var:
18+
; STATIC: // %bb.0:
19+
; STATIC-NEXT: adrp x0, dsolocal_var
20+
; STATIC-NEXT: add x0, x0, :lo12:dsolocal_var
21+
; STATIC-NEXT: ret
22+
;
23+
; PIC-LABEL: get_dsolocal_var:
24+
; PIC: // %bb.0:
25+
; PIC-NEXT: adrp x0, .Ldsolocal_var$local
26+
; PIC-NEXT: add x0, x0, :lo12:.Ldsolocal_var$local
27+
; PIC-NEXT: ret
28+
ret i32* @dsolocal_var
29+
}
30+
31+
@weak_dsolocal_var = weak dso_local global i32 42
32+
define i32* @get_weak_dsolocal_var() nounwind {
33+
; CHECK-LABEL: get_weak_dsolocal_var:
34+
; CHECK: // %bb.0:
35+
; CHECK-NEXT: adrp x0, weak_dsolocal_var
36+
; CHECK-NEXT: add x0, x0, :lo12:weak_dsolocal_var
37+
; CHECK-NEXT: ret
38+
ret i32* @weak_dsolocal_var
39+
}
40+
41+
@hidden_var = hidden global i32 42
42+
define i32* @get_hidden_var() nounwind {
43+
; CHECK-LABEL: get_hidden_var:
44+
; CHECK: // %bb.0:
45+
; CHECK-NEXT: adrp x0, hidden_var
46+
; CHECK-NEXT: add x0, x0, :lo12:hidden_var
47+
; CHECK-NEXT: ret
48+
ret i32* @hidden_var
49+
}
50+
51+
@protected_var = protected global i32 42
52+
define i32* @get_protected_var() nounwind {
53+
; CHECK-LABEL: get_protected_var:
54+
; CHECK: // %bb.0:
55+
; CHECK-NEXT: adrp x0, protected_var
56+
; CHECK-NEXT: add x0, x0, :lo12:protected_var
57+
; CHECK-NEXT: ret
58+
ret i32* @protected_var
59+
}
60+
61+
define dso_preemptable void()* @preemptable_func() nounwind {
62+
; CHECK-LABEL: preemptable_func:
63+
; CHECK: // %bb.0:
64+
; CHECK-NEXT: adrp x0, :got:preemptable_func
65+
; CHECK-NEXT: ldr x0, [x0, :got_lo12:preemptable_func]
66+
; CHECK-NEXT: ret
67+
ret void()* bitcast(void()*()* @preemptable_func to void()*)
68+
}
69+
70+
define dso_local void()* @dsolocal_func() nounwind {
71+
; STATIC-LABEL: dsolocal_func:
72+
; STATIC: // %bb.0:
73+
; STATIC-NEXT: adrp x0, dsolocal_func
74+
; STATIC-NEXT: add x0, x0, :lo12:dsolocal_func
75+
; STATIC-NEXT: ret
76+
;
77+
; PIC-LABEL: dsolocal_func:
78+
; PIC: .Ldsolocal_func$local:
79+
; PIC-NEXT: // %bb.0:
80+
; PIC-NEXT: adrp x0, .Ldsolocal_func$local
81+
; PIC-NEXT: add x0, x0, :lo12:.Ldsolocal_func$local
82+
; PIC-NEXT: ret
83+
ret void()* bitcast(void()*()* @dsolocal_func to void()*)
84+
}
85+
86+
define weak dso_local void()* @weak_dsolocal_func() nounwind {
87+
; CHECK-LABEL: weak_dsolocal_func:
88+
; CHECK: // %bb.0:
89+
; CHECK-NEXT: adrp x0, weak_dsolocal_func
90+
; CHECK-NEXT: add x0, x0, :lo12:weak_dsolocal_func
91+
; CHECK-NEXT: ret
92+
ret void()* bitcast(void()*()* @weak_dsolocal_func to void()*)
93+
}
94+
95+
;; bl .Ldsolocal_func$local either resolves to a constant at assembly time
96+
;; or produces a relocation which can potentially cause a veneer.
97+
define dso_local void @call_dsolocal_func() nounwind {
98+
; STATIC-LABEL: call_dsolocal_func:
99+
; STATIC: // %bb.0:
100+
; STATIC-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
101+
; STATIC-NEXT: bl dsolocal_func
102+
; STATIC-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
103+
; STATIC-NEXT: ret
104+
;
105+
; PIC-LABEL: call_dsolocal_func:
106+
; PIC: .Lcall_dsolocal_func$local:
107+
; PIC-NEXT: // %bb.0:
108+
; PIC-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
109+
; PIC-NEXT: bl .Ldsolocal_func$local
110+
; PIC-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
111+
; PIC-NEXT: ret
112+
call void()* @dsolocal_func()
113+
ret void
114+
}

‎llvm/test/CodeGen/AArch64/semantic-interposition-asm.ll

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc -mtriple=aarch64 -relocation-model=pic < %s | FileCheck %s
3+
4+
;; Test that we use the local alias for dso_local globals in inline assembly.
5+
6+
@gv0 = dso_local global i32 0
7+
@gv1 = dso_preemptable global i32 1
8+
9+
define i32 @load() nounwind {
10+
; CHECK-LABEL: load:
11+
; CHECK: // %bb.0: // %entry
12+
; CHECK-NEXT: //APP
13+
; CHECK-NEXT: adrp x0, .Lgv0$local
14+
; CHECK-NEXT: ldr w0, [x0, :lo12:.Lgv0$local]
15+
; CHECK-NEXT: adrp x8, gv1
16+
; CHECK-NEXT: ldr w8, [x8, :lo12:gv1]
17+
; CHECK-NEXT: add x0, x8, x0
18+
; CHECK-NEXT: //NO_APP
19+
; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0
20+
; CHECK-NEXT: ret
21+
entry:
22+
%0 = tail call i64 asm "adrp $0, $1\0Aldr ${0:w}, [$0, :lo12:$1]\0Aadrp x8, $2\0Aldr w8, [x8, :lo12:$2]\0Aadd $0,x8,$0", "=r,S,S,~{x8}"(i32* nonnull @gv0, i32* nonnull @gv1)
23+
%conv = trunc i64 %0 to i32
24+
ret i32 %conv
25+
}

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