Skip to content

Commit 6e0e926

Browse files
author
esmeyi
committed
[PowerPC] Converts to comparison against zero even when the optimization
 doesn't happened in peephole optimizer. Summary: Converting a comparison against 1 or -1 into a comparison against 0 can exploit record-form instructions for comparison optimization. The conversion will happen only when a record-form instruction can be used to replace the comparison during the peephole optimizer (see function optimizeCompareInstr). In post-RA, we also want to optimize the comparison by using the record form (see D131873) and it requires additional dataflow analysis to reliably find uses of the CR register set. It's reasonable to common the conversion for both peephole optimizer and post-RA optimizer. Converting to comparison against zero even when the optimization doesn't happened in peephole optimizer may create additional opportunities for the post-RA optimization. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D131374
1 parent 5279e11 commit 6e0e926

File tree

10 files changed

+59
-53
lines changed

10 files changed

+59
-53
lines changed

‎llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2538,7 +2538,12 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
25382538
else
25392539
return false;
25402540

2541-
PredsToUpdate.push_back(std::make_pair(&(UseMI->getOperand(0)), Pred));
2541+
// Convert the comparison and its user to a compare against zero with the
2542+
// appropriate predicate on the branch. Zero comparison might provide
2543+
// optimization opportunities post-RA (see optimization in
2544+
// PPCPreEmitPeephole.cpp).
2545+
UseMI->getOperand(0).setImm(Pred);
2546+
CmpInstr.getOperand(2).setImm(0);
25422547
}
25432548

25442549
// Search for Sub.

‎llvm/test/CodeGen/PowerPC/common-chain.ll

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -35,8 +35,8 @@
3535
define i64 @two_chain_same_offset_succ(i8* %p, i64 %offset, i64 %base1, i64 %n) {
3636
; CHECK-LABEL: two_chain_same_offset_succ:
3737
; CHECK: # %bb.0: # %entry
38-
; CHECK-NEXT: cmpdi r6, 1
39-
; CHECK-NEXT: blt cr0, .LBB0_4
38+
; CHECK-NEXT: cmpdi r6, 0
39+
; CHECK-NEXT: ble cr0, .LBB0_4
4040
; CHECK-NEXT: # %bb.1: # %for.body.preheader
4141
; CHECK-NEXT: sldi r7, r4, 1
4242
; CHECK-NEXT: mtctr r6
@@ -140,9 +140,9 @@ for.body: ; preds = %entry, %for.body
140140
define i64 @not_perfect_chain_all_same_offset_fail(i8* %p, i64 %offset, i64 %base1, i64 %n) {
141141
; CHECK-LABEL: not_perfect_chain_all_same_offset_fail:
142142
; CHECK: # %bb.0: # %entry
143-
; CHECK-NEXT: cmpdi r6, 1
143+
; CHECK-NEXT: cmpdi r6, 0
144144
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
145-
; CHECK-NEXT: blt cr0, .LBB1_4
145+
; CHECK-NEXT: ble cr0, .LBB1_4
146146
; CHECK-NEXT: # %bb.1: # %for.body.preheader
147147
; CHECK-NEXT: sldi r7, r4, 1
148148
; CHECK-NEXT: sldi r9, r4, 2
@@ -245,8 +245,8 @@ for.body: ; preds = %entry, %for.body
245245
define i64 @no_enough_elements_fail(i8* %p, i64 %offset, i64 %base1, i64 %n) {
246246
; CHECK-LABEL: no_enough_elements_fail:
247247
; CHECK: # %bb.0: # %entry
248-
; CHECK-NEXT: cmpdi r6, 1
249-
; CHECK-NEXT: blt cr0, .LBB2_4
248+
; CHECK-NEXT: cmpdi r6, 0
249+
; CHECK-NEXT: ble cr0, .LBB2_4
250250
; CHECK-NEXT: # %bb.1: # %for.body.preheader
251251
; CHECK-NEXT: sldi r7, r4, 1
252252
; CHECK-NEXT: mtctr r6
@@ -333,8 +333,8 @@ for.body: ; preds = %entry, %for.body
333333
define i64 @no_reuseable_offset_fail(i8* %p, i64 %offset, i64 %base1, i64 %n) {
334334
; CHECK-LABEL: no_reuseable_offset_fail:
335335
; CHECK: # %bb.0: # %entry
336-
; CHECK-NEXT: cmpdi r6, 1
337-
; CHECK-NEXT: blt cr0, .LBB3_4
336+
; CHECK-NEXT: cmpdi r6, 0
337+
; CHECK-NEXT: ble cr0, .LBB3_4
338338
; CHECK-NEXT: # %bb.1: # %for.body.preheader
339339
; CHECK-NEXT: sldi r9, r4, 3
340340
; CHECK-NEXT: mtctr r6
@@ -440,11 +440,11 @@ for.body: ; preds = %entry, %for.body
440440
define i64 @not_same_offset_fail(i8* %p, i64 %offset, i64 %base1, i64 %n) {
441441
; CHECK-LABEL: not_same_offset_fail:
442442
; CHECK: # %bb.0: # %entry
443-
; CHECK-NEXT: cmpdi r6, 1
443+
; CHECK-NEXT: cmpdi r6, 0
444444
; CHECK-NEXT: std r28, -32(r1) # 8-byte Folded Spill
445445
; CHECK-NEXT: std r29, -24(r1) # 8-byte Folded Spill
446446
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
447-
; CHECK-NEXT: blt cr0, .LBB4_3
447+
; CHECK-NEXT: ble cr0, .LBB4_3
448448
; CHECK-NEXT: # %bb.1: # %for.body.preheader
449449
; CHECK-NEXT: mulli r11, r4, 10
450450
; CHECK-NEXT: sldi r8, r4, 2
@@ -564,8 +564,8 @@ for.body: ; preds = %entry, %for.body
564564
define i64 @two_chain_different_offsets_succ(i8* %p, i64 %offset, i64 %base1, i64 %n) {
565565
; CHECK-LABEL: two_chain_different_offsets_succ:
566566
; CHECK: # %bb.0: # %entry
567-
; CHECK-NEXT: cmpdi r6, 1
568-
; CHECK-NEXT: blt cr0, .LBB5_4
567+
; CHECK-NEXT: cmpdi r6, 0
568+
; CHECK-NEXT: ble cr0, .LBB5_4
569569
; CHECK-NEXT: # %bb.1: # %for.body.preheader
570570
; CHECK-NEXT: sldi r8, r4, 2
571571
; CHECK-NEXT: add r7, r5, r4
@@ -666,8 +666,8 @@ for.body: ; preds = %entry, %for.body
666666
define i64 @two_chain_two_bases_succ(i8* %p, i64 %offset, i64 %base1, i64 %base2, i64 %n) {
667667
; CHECK-LABEL: two_chain_two_bases_succ:
668668
; CHECK: # %bb.0: # %entry
669-
; CHECK-NEXT: cmpdi r7, 1
670-
; CHECK-NEXT: blt cr0, .LBB6_4
669+
; CHECK-NEXT: cmpdi r7, 0
670+
; CHECK-NEXT: ble cr0, .LBB6_4
671671
; CHECK-NEXT: # %bb.1: # %for.body.preheader
672672
; CHECK-NEXT: add r6, r6, r4
673673
; CHECK-NEXT: add r5, r5, r4
@@ -751,7 +751,7 @@ for.body: ; preds = %entry, %for.body
751751
define signext i32 @spill_reduce_succ(double* %input1, double* %input2, double* %output, i64 %m, i64 %inc1, i64 %inc2, i64 %inc3, i64 %inc4, i64 %inc) {
752752
; CHECK-LABEL: spill_reduce_succ:
753753
; CHECK: # %bb.0: # %entry
754-
; CHECK-NEXT: cmpdi r6, 1
754+
; CHECK-NEXT: cmpdi r6, 0
755755
; CHECK-NEXT: std r14, -144(r1) # 8-byte Folded Spill
756756
; CHECK-NEXT: std r15, -136(r1) # 8-byte Folded Spill
757757
; CHECK-NEXT: std r16, -128(r1) # 8-byte Folded Spill
@@ -774,7 +774,7 @@ define signext i32 @spill_reduce_succ(double* %input1, double* %input2, double*
774774
; CHECK-NEXT: std r9, -160(r1) # 8-byte Folded Spill
775775
; CHECK-NEXT: std r8, -176(r1) # 8-byte Folded Spill
776776
; CHECK-NEXT: std r7, -168(r1) # 8-byte Folded Spill
777-
; CHECK-NEXT: blt cr0, .LBB7_7
777+
; CHECK-NEXT: ble cr0, .LBB7_7
778778
; CHECK-NEXT: # %bb.1: # %for.body.preheader
779779
; CHECK-NEXT: sldi r6, r6, 2
780780
; CHECK-NEXT: li r7, 1

‎llvm/test/CodeGen/PowerPC/f128-aggregates.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -545,7 +545,7 @@ define fp128 @sum_float128(i32 signext %count, ...) {
545545
; CHECK: # %bb.0: # %entry
546546
; CHECK-NEXT: std r4, 40(r1)
547547
; CHECK-NEXT: addis r4, r2, .LCPI17_0@toc@ha
548-
; CHECK-NEXT: cmpwi r3, 1
548+
; CHECK-NEXT: cmpwi r3, 0
549549
; CHECK-NEXT: std r5, 48(r1)
550550
; CHECK-NEXT: addi r4, r4, .LCPI17_0@toc@l
551551
; CHECK-NEXT: std r6, 56(r1)
@@ -554,7 +554,7 @@ define fp128 @sum_float128(i32 signext %count, ...) {
554554
; CHECK-NEXT: lxv v2, 0(r4)
555555
; CHECK-NEXT: std r9, 80(r1)
556556
; CHECK-NEXT: std r10, 88(r1)
557-
; CHECK-NEXT: bltlr cr0
557+
; CHECK-NEXT: blelr cr0
558558
; CHECK-NEXT: # %bb.1: # %if.end
559559
; CHECK-NEXT: addi r3, r1, 40
560560
; CHECK-NEXT: addi r4, r1, 72
@@ -569,7 +569,7 @@ define fp128 @sum_float128(i32 signext %count, ...) {
569569
; CHECK-BE: # %bb.0: # %entry
570570
; CHECK-BE-NEXT: std r4, 56(r1)
571571
; CHECK-BE-NEXT: addis r4, r2, .LCPI17_0@toc@ha
572-
; CHECK-BE-NEXT: cmpwi r3, 1
572+
; CHECK-BE-NEXT: cmpwi r3, 0
573573
; CHECK-BE-NEXT: std r5, 64(r1)
574574
; CHECK-BE-NEXT: addi r4, r4, .LCPI17_0@toc@l
575575
; CHECK-BE-NEXT: std r6, 72(r1)
@@ -578,7 +578,7 @@ define fp128 @sum_float128(i32 signext %count, ...) {
578578
; CHECK-BE-NEXT: lxv v2, 0(r4)
579579
; CHECK-BE-NEXT: std r9, 96(r1)
580580
; CHECK-BE-NEXT: std r10, 104(r1)
581-
; CHECK-BE-NEXT: bltlr cr0
581+
; CHECK-BE-NEXT: blelr cr0
582582
; CHECK-BE-NEXT: # %bb.1: # %if.end
583583
; CHECK-BE-NEXT: addi r3, r1, 56
584584
; CHECK-BE-NEXT: addi r4, r1, 88
@@ -599,7 +599,7 @@ define fp128 @sum_float128(i32 signext %count, ...) {
599599
; CHECK-P8-NEXT: std r0, 16(r1)
600600
; CHECK-P8-NEXT: stdu r1, -64(r1)
601601
; CHECK-P8-NEXT: addis r11, r2, .LCPI17_0@toc@ha
602-
; CHECK-P8-NEXT: cmpwi r3, 1
602+
; CHECK-P8-NEXT: cmpwi r3, 0
603603
; CHECK-P8-NEXT: std r4, 104(r1)
604604
; CHECK-P8-NEXT: std r5, 112(r1)
605605
; CHECK-P8-NEXT: std r6, 120(r1)
@@ -610,7 +610,7 @@ define fp128 @sum_float128(i32 signext %count, ...) {
610610
; CHECK-P8-NEXT: std r9, 144(r1)
611611
; CHECK-P8-NEXT: std r10, 152(r1)
612612
; CHECK-P8-NEXT: xxswapd v3, vs0
613-
; CHECK-P8-NEXT: blt cr0, .LBB17_2
613+
; CHECK-P8-NEXT: ble cr0, .LBB17_2
614614
; CHECK-P8-NEXT: # %bb.1: # %if.end
615615
; CHECK-P8-NEXT: addi r30, r1, 104
616616
; CHECK-P8-NEXT: lxvd2x vs0, 0, r30

‎llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -793,8 +793,8 @@ define i64 @test_ds_cross_basic_blocks(i8* %0, i32 signext %1) {
793793
define float @test_ds_float(i8* %0, i32 signext %1) {
794794
; CHECK-LABEL: test_ds_float:
795795
; CHECK: # %bb.0:
796-
; CHECK-NEXT: cmpwi r4, 1
797-
; CHECK-NEXT: blt cr0, .LBB7_4
796+
; CHECK-NEXT: cmpwi r4, 0
797+
; CHECK-NEXT: ble cr0, .LBB7_4
798798
; CHECK-NEXT: # %bb.1:
799799
; CHECK-NEXT: clrldi r4, r4, 32
800800
; CHECK-NEXT: addi r3, r3, 4002
@@ -875,8 +875,8 @@ define float @test_ds_float(i8* %0, i32 signext %1) {
875875
define float @test_ds_combine_float_int(i8* %0, i32 signext %1) {
876876
; CHECK-LABEL: test_ds_combine_float_int:
877877
; CHECK: # %bb.0:
878-
; CHECK-NEXT: cmpwi r4, 1
879-
; CHECK-NEXT: blt cr0, .LBB8_4
878+
; CHECK-NEXT: cmpwi r4, 0
879+
; CHECK-NEXT: ble cr0, .LBB8_4
880880
; CHECK-NEXT: # %bb.1:
881881
; CHECK-NEXT: clrldi r4, r4, 32
882882
; CHECK-NEXT: addi r3, r3, 4002
@@ -958,8 +958,8 @@ define float @test_ds_combine_float_int(i8* %0, i32 signext %1) {
958958
define i64 @test_ds_lwa_prep(i8* %0, i32 signext %1) {
959959
; CHECK-LABEL: test_ds_lwa_prep:
960960
; CHECK: # %bb.0:
961-
; CHECK-NEXT: cmpwi r4, 1
962-
; CHECK-NEXT: blt cr0, .LBB9_4
961+
; CHECK-NEXT: cmpwi r4, 0
962+
; CHECK-NEXT: ble cr0, .LBB9_4
963963
; CHECK-NEXT: # %bb.1: # %.preheader
964964
; CHECK-NEXT: mtctr r4
965965
; CHECK-NEXT: addi r5, r3, 2

‎llvm/test/CodeGen/PowerPC/loop-instr-prep-non-const-increasement.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -17,8 +17,8 @@
1717
define i64 @foo(i8* %p, i32 signext %n, i32 signext %count) {
1818
; CHECK-LABEL: foo:
1919
; CHECK: # %bb.0: # %entry
20-
; CHECK-NEXT: cmpwi r4, 1
21-
; CHECK-NEXT: blt cr0, .LBB0_4
20+
; CHECK-NEXT: cmpwi r4, 0
21+
; CHECK-NEXT: ble cr0, .LBB0_4
2222
; CHECK-NEXT: # %bb.1: # %for.body.preheader
2323
; CHECK-NEXT: addi r6, r3, 5
2424
; CHECK-NEXT: addi r3, r4, -1
@@ -84,8 +84,8 @@ for.body: ; preds = %for.body.preheader,
8484
define zeroext i8 @foo1(i8* %p, i32 signext %n, i32 signext %count) {
8585
; CHECK-LABEL: foo1:
8686
; CHECK: # %bb.0: # %entry
87-
; CHECK-NEXT: cmpwi r4, 1
88-
; CHECK-NEXT: blt cr0, .LBB1_4
87+
; CHECK-NEXT: cmpwi r4, 0
88+
; CHECK-NEXT: ble cr0, .LBB1_4
8989
; CHECK-NEXT: # %bb.1: # %for.body.preheader
9090
; CHECK-NEXT: sub r3, r3, r5
9191
; CHECK-NEXT: addi r6, r3, 1000

‎llvm/test/CodeGen/PowerPC/loop-p10-pair-prepare.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,8 @@ define void @foo(i64* %.n, [0 x %_elem_type_of_x]* %.x, [0 x %_elem_type_of_y]*
1515
; CHECK-LABEL: foo:
1616
; CHECK: # %bb.0: # %entry
1717
; CHECK-NEXT: ld r5, 0(r3)
18-
; CHECK-NEXT: cmpdi r5, 1
19-
; CHECK-NEXT: bltlr cr0
18+
; CHECK-NEXT: cmpdi r5, 0
19+
; CHECK-NEXT: blelr cr0
2020
; CHECK-NEXT: # %bb.1: # %_loop_1_do_.lr.ph
2121
; CHECK-NEXT: addi r3, r4, 1
2222
; CHECK-NEXT: addi r4, r5, -1
@@ -42,8 +42,8 @@ define void @foo(i64* %.n, [0 x %_elem_type_of_x]* %.x, [0 x %_elem_type_of_y]*
4242
; CHECK-BE-LABEL: foo:
4343
; CHECK-BE: # %bb.0: # %entry
4444
; CHECK-BE-NEXT: ld r5, 0(r3)
45-
; CHECK-BE-NEXT: cmpdi r5, 1
46-
; CHECK-BE-NEXT: bltlr cr0
45+
; CHECK-BE-NEXT: cmpdi r5, 0
46+
; CHECK-BE-NEXT: blelr cr0
4747
; CHECK-BE-NEXT: # %bb.1: # %_loop_1_do_.lr.ph
4848
; CHECK-BE-NEXT: addi r3, r4, 1
4949
; CHECK-BE-NEXT: addi r4, r5, -1

‎llvm/test/CodeGen/PowerPC/pr47373.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,8 @@ define void @d() local_unnamed_addr #0 {
2020
; CHECK-NEXT: mr r30, r3
2121
; CHECK-NEXT: bl b
2222
; CHECK-NEXT: nop
23-
; CHECK-NEXT: cmpwi r30, 1
24-
; CHECK-NEXT: blt cr0, .LBB0_9
23+
; CHECK-NEXT: cmpwi r30, 0
24+
; CHECK-NEXT: ble cr0, .LBB0_9
2525
; CHECK-NEXT: # %bb.1: # %for.body.preheader
2626
; CHECK-NEXT: cmplwi r30, 4
2727
; CHECK-NEXT: clrldi r4, r30, 32

‎llvm/test/CodeGen/PowerPC/shrink-wrap.ll

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck %s --check-prefixes=CHECK,CHECK64
22
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECK,CHECK32
3-
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECK,CHECK64
3+
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECKAIX,CHECK64
44

55
define signext i32 @shrinkwrapme(i32 signext %a, i32 signext %lim) {
66
entry:
@@ -33,7 +33,8 @@ entry:
3333

3434
; CHECK32-COUNT-18: stw
3535

36-
; CHECK: blt 0, {{.*}}BB0_3
36+
; CHECK: ble 0, {{.*}}BB0_3
37+
; CHECKAIX: blt 0, {{.*}}BB0_3
3738
; CHECK: # %bb.1:
3839
; CHECK: li
3940
; CHECK: {{.*}}BB0_2:

‎llvm/test/CodeGen/PowerPC/spe.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -848,8 +848,8 @@ define i32 @test_dcmpgt(double %a, double %b) #0 {
848848
; EFPU2-NEXT: stw 0, 4(1)
849849
; EFPU2-NEXT: stwu 1, -16(1)
850850
; EFPU2-NEXT: bl __gtdf2
851-
; EFPU2-NEXT: cmpwi 3, 1
852-
; EFPU2-NEXT: blt 0, .LBB37_2
851+
; EFPU2-NEXT: cmpwi 3, 0
852+
; EFPU2-NEXT: ble 0, .LBB37_2
853853
; EFPU2-NEXT: # %bb.1: # %tr
854854
; EFPU2-NEXT: li 3, 1
855855
; EFPU2-NEXT: b .LBB37_3
@@ -908,8 +908,8 @@ define i32 @test_dcmpugt(double %a, double %b) #0 {
908908
; EFPU2-NEXT: stw 0, 4(1)
909909
; EFPU2-NEXT: stwu 1, -16(1)
910910
; EFPU2-NEXT: bl __ledf2
911-
; EFPU2-NEXT: cmpwi 3, 1
912-
; EFPU2-NEXT: blt 0, .LBB38_2
911+
; EFPU2-NEXT: cmpwi 3, 0
912+
; EFPU2-NEXT: ble 0, .LBB38_2
913913
; EFPU2-NEXT: # %bb.1: # %tr
914914
; EFPU2-NEXT: li 3, 1
915915
; EFPU2-NEXT: b .LBB38_3
@@ -1324,8 +1324,8 @@ define i32 @test_dcmplt(double %a, double %b) #0 {
13241324
; EFPU2-NEXT: stw 0, 4(1)
13251325
; EFPU2-NEXT: stwu 1, -16(1)
13261326
; EFPU2-NEXT: bl __ltdf2
1327-
; EFPU2-NEXT: cmpwi 3, -1
1328-
; EFPU2-NEXT: bgt 0, .LBB45_2
1327+
; EFPU2-NEXT: cmpwi 3, 0
1328+
; EFPU2-NEXT: bge 0, .LBB45_2
13291329
; EFPU2-NEXT: # %bb.1: # %tr
13301330
; EFPU2-NEXT: li 3, 1
13311331
; EFPU2-NEXT: b .LBB45_3
@@ -1384,8 +1384,8 @@ define i32 @test_dcmpult(double %a, double %b) #0 {
13841384
; EFPU2-NEXT: stw 0, 4(1)
13851385
; EFPU2-NEXT: stwu 1, -16(1)
13861386
; EFPU2-NEXT: bl __gedf2
1387-
; EFPU2-NEXT: cmpwi 3, -1
1388-
; EFPU2-NEXT: bgt 0, .LBB46_2
1387+
; EFPU2-NEXT: cmpwi 3, 0
1388+
; EFPU2-NEXT: bge 0, .LBB46_2
13891389
; EFPU2-NEXT: # %bb.1: # %tr
13901390
; EFPU2-NEXT: li 3, 1
13911391
; EFPU2-NEXT: b .LBB46_3
@@ -1782,10 +1782,10 @@ define dso_local float @test_fma(i32 %d) local_unnamed_addr #0 {
17821782
; CHECK-NEXT: mflr 0
17831783
; CHECK-NEXT: stw 0, 4(1)
17841784
; CHECK-NEXT: stwu 1, -32(1)
1785-
; CHECK-NEXT: cmpwi 3, 1
1785+
; CHECK-NEXT: cmpwi 3, 0
17861786
; CHECK-NEXT: evstdd 29, 8(1) # 8-byte Folded Spill
17871787
; CHECK-NEXT: evstdd 30, 16(1) # 8-byte Folded Spill
1788-
; CHECK-NEXT: blt 0, .LBB56_3
1788+
; CHECK-NEXT: ble 0, .LBB56_3
17891789
; CHECK-NEXT: # %bb.1: # %for.body.preheader
17901790
; CHECK-NEXT: mr 30, 3
17911791
; CHECK-NEXT: li 29, 0

‎llvm/test/CodeGen/PowerPC/store-constant.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -196,8 +196,8 @@ entry:
196196
define void @SetArr(i32 signext %Len) {
197197
; CHECK-LABEL: SetArr:
198198
; CHECK: # %bb.0: # %entry
199-
; CHECK-NEXT: cmpwi 3, 1
200-
; CHECK-NEXT: bltlr 0
199+
; CHECK-NEXT: cmpwi 3, 0
200+
; CHECK-NEXT: blelr 0
201201
; CHECK-NEXT: # %bb.1: # %for.body.lr.ph
202202
; CHECK-NEXT: addis 4, 2, .LC5@toc@ha
203203
; CHECK-NEXT: addis 5, 2, .LC6@toc@ha

0 commit comments

Comments
 (0)