@@ -1752,3 +1752,80 @@ define <8 x double> @broadcast_v8f64_v2f64_0uuu0101(<2 x double>* %vp) {
1752
1752
%res = shufflevector <2 x double > %vec , <2 x double > undef , <8 x i32 > <i32 0 , i32 undef , i32 undef , i32 undef , i32 0 , i32 1 , i32 0 , i32 1 >
1753
1753
ret <8 x double > %res
1754
1754
}
1755
+
1756
+ define void @PR51226 () {
1757
+ ; X86-AVX1-LABEL: PR51226:
1758
+ ; X86-AVX1: # %bb.0:
1759
+ ; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1760
+ ; X86-AVX1-NEXT: vpslld $16, %xmm0, %xmm0
1761
+ ; X86-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
1762
+ ; X86-AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1763
+ ; X86-AVX1-NEXT: vminps %ymm1, %ymm0, %ymm0
1764
+ ; X86-AVX1-NEXT: vmovups %ymm0, (%eax)
1765
+ ; X86-AVX1-NEXT: vzeroupper
1766
+ ; X86-AVX1-NEXT: retl
1767
+ ;
1768
+ ; X86-AVX2-LABEL: PR51226:
1769
+ ; X86-AVX2: # %bb.0:
1770
+ ; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1771
+ ; X86-AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
1772
+ ; X86-AVX2-NEXT: vpslld $16, %ymm0, %ymm0
1773
+ ; X86-AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
1774
+ ; X86-AVX2-NEXT: vminps %ymm1, %ymm0, %ymm0
1775
+ ; X86-AVX2-NEXT: vmovups %ymm0, (%eax)
1776
+ ; X86-AVX2-NEXT: vzeroupper
1777
+ ; X86-AVX2-NEXT: retl
1778
+ ;
1779
+ ; X86-AVX512-LABEL: PR51226:
1780
+ ; X86-AVX512: # %bb.0:
1781
+ ; X86-AVX512-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1782
+ ; X86-AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
1783
+ ; X86-AVX512-NEXT: vpslld $16, %ymm0, %ymm0
1784
+ ; X86-AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
1785
+ ; X86-AVX512-NEXT: vminps %ymm1, %ymm0, %ymm0
1786
+ ; X86-AVX512-NEXT: vmovups %ymm0, (%eax)
1787
+ ; X86-AVX512-NEXT: vzeroupper
1788
+ ; X86-AVX512-NEXT: retl
1789
+ ;
1790
+ ; X64-AVX1-LABEL: PR51226:
1791
+ ; X64-AVX1: # %bb.0:
1792
+ ; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1793
+ ; X64-AVX1-NEXT: vpslld $16, %xmm0, %xmm0
1794
+ ; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
1795
+ ; X64-AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1796
+ ; X64-AVX1-NEXT: vminps %ymm1, %ymm0, %ymm0
1797
+ ; X64-AVX1-NEXT: vmovups %ymm0, (%rax)
1798
+ ; X64-AVX1-NEXT: vzeroupper
1799
+ ; X64-AVX1-NEXT: retq
1800
+ ;
1801
+ ; X64-AVX2-LABEL: PR51226:
1802
+ ; X64-AVX2: # %bb.0:
1803
+ ; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1804
+ ; X64-AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
1805
+ ; X64-AVX2-NEXT: vpslld $16, %ymm0, %ymm0
1806
+ ; X64-AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
1807
+ ; X64-AVX2-NEXT: vminps %ymm1, %ymm0, %ymm0
1808
+ ; X64-AVX2-NEXT: vmovups %ymm0, (%rax)
1809
+ ; X64-AVX2-NEXT: vzeroupper
1810
+ ; X64-AVX2-NEXT: retq
1811
+ ;
1812
+ ; X64-AVX512-LABEL: PR51226:
1813
+ ; X64-AVX512: # %bb.0:
1814
+ ; X64-AVX512-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1815
+ ; X64-AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
1816
+ ; X64-AVX512-NEXT: vpslld $16, %ymm0, %ymm0
1817
+ ; X64-AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1
1818
+ ; X64-AVX512-NEXT: vminps %ymm1, %ymm0, %ymm0
1819
+ ; X64-AVX512-NEXT: vmovups %ymm0, (%rax)
1820
+ ; X64-AVX512-NEXT: vzeroupper
1821
+ ; X64-AVX512-NEXT: retq
1822
+ %i = load <4 x i16 >, <4 x i16 >* undef , align 8
1823
+ %i1 = zext <4 x i16 > %i to <4 x i32 >
1824
+ %i2 = shl nuw <4 x i32 > %i1 , <i32 16 , i32 16 , i32 16 , i32 16 >
1825
+ %i3 = bitcast <4 x i32 > %i2 to <4 x float >
1826
+ %shuffle99 = shufflevector <4 x float > %i3 , <4 x float > poison, <8 x i32 > <i32 0 , i32 1 , i32 2 , i32 3 , i32 0 , i32 1 , i32 2 , i32 3 >
1827
+ %i4 = fcmp reassoc nsz contract ogt <8 x float > zeroinitializer , %shuffle99
1828
+ %i5 = select <8 x i1 > %i4 , <8 x float > %shuffle99 , <8 x float > zeroinitializer
1829
+ store <8 x float > %i5 , <8 x float >* undef , align 16
1830
+ ret void
1831
+ }
0 commit comments