[InstCombine] precommit pr49688.ll (NFC)

This is going to be fixed by D99674

Author: aqjune

llvm/test/Transforms/InstCombine/pr49688.ll

@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i1 @f(i32 %i1) {
+; CHECK-LABEL: @f(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[SHR:%.*]] = lshr i32 7, [[I1:%.*]]
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp ult i32 [[SHR]], [[I1]]
+; CHECK-NEXT:    ret i1 [[TMP0]]
+;
+entry:
+  %cmp = icmp slt i32 %i1, 0
+  %shr = ashr i32 7, %i1
+  %cmp4 = icmp sgt i32 %i1, %shr
+  %i2 = select i1 %cmp, i1 true, i1 %cmp4
+  ret i1 %i2
+}
+
+define i32 @f2(i32 signext %g, i32 zeroext %h) {
+; CHECK-LABEL: @f2(
+; CHECK-NEXT:    [[SHR:%.*]] = lshr i32 7, [[H:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[SHR]], [[G:%.*]]
+; CHECK-NEXT:    [[LOR_EXT:%.*]] = zext i1 [[TMP1]] to i32
+; CHECK-NEXT:    ret i32 [[LOR_EXT]]
+;
+  %cmp = icmp slt i32 %g, 0
+  %shr = ashr i32 7, %h
+  %cmp1 = icmp sgt i32 %g, %shr
+  %.0 = select i1 %cmp, i1 true, i1 %cmp1
+  %lor.ext = zext i1 %.0 to i32
+  ret i32 %lor.ext
+}