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[Attributor][FIX] Ensure we adjust types properly
When we simplify loads we need to adjust types (esp. null-values) properly to avoid inconsinstencies down the line. Add a cast and an error message. Fixes: llvm#60788
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3 files changed

+147
-4
lines changed

3 files changed

+147
-4
lines changed

‎llvm/lib/Transforms/IPO/Attributor.cpp

Lines changed: 20 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -395,6 +395,18 @@ static bool getPotentialCopiesOfMemoryValue(
395395
NullOnly = false;
396396
};
397397

398+
auto AdjustWrittenValueType = [&](const AAPointerInfo::Access &Acc,
399+
Value &V) {
400+
Value *AdjV = AA::getWithType(V, *I.getType());
401+
if (!AdjV) {
402+
LLVM_DEBUG(dbgs() << "Underlying object written but stored value "
403+
"cannot be converted to read type: "
404+
<< *Acc.getRemoteInst() << " : " << *I.getType()
405+
<< "\n";);
406+
}
407+
return AdjV;
408+
};
409+
398410
auto CheckAccess = [&](const AAPointerInfo::Access &Acc, bool IsExact) {
399411
if ((IsLoad && !Acc.isWriteOrAssumption()) || (!IsLoad && !Acc.isRead()))
400412
return true;
@@ -416,7 +428,10 @@ static bool getPotentialCopiesOfMemoryValue(
416428
if (IsLoad) {
417429
assert(isa<LoadInst>(I) && "Expected load or store instruction only!");
418430
if (!Acc.isWrittenValueUnknown()) {
419-
NewCopies.push_back(Acc.getWrittenValue());
431+
Value *V = AdjustWrittenValueType(Acc, *Acc.getWrittenValue());
432+
if (!V)
433+
return false;
434+
NewCopies.push_back(V);
420435
NewCopyOrigins.push_back(Acc.getRemoteInst());
421436
return true;
422437
}
@@ -427,7 +442,10 @@ static bool getPotentialCopiesOfMemoryValue(
427442
<< *Acc.getRemoteInst() << "\n";);
428443
return false;
429444
}
430-
NewCopies.push_back(SI->getValueOperand());
445+
Value *V = AdjustWrittenValueType(Acc, *SI->getValueOperand());
446+
if (!V)
447+
return false;
448+
NewCopies.push_back(V);
431449
NewCopyOrigins.push_back(SI);
432450
} else {
433451
assert(isa<StoreInst>(I) && "Expected load or store instruction only!");

‎llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ define internal void @.omp_outlined.(ptr noalias %.global_tid., ptr noalias %.bo
101101
; TUNIT: omp.inner.for.body:
102102
; TUNIT-NEXT: [[ADD10:%.*]] = add nsw i32 [[DOTOMP_IV_0]], 2
103103
; TUNIT-NEXT: [[TMP11:%.*]] = load double, ptr [[Q_ADDR]], align 8
104-
; TUNIT-NEXT: call void @bar(i32 [[ADD10]], float 3.000000e+00, double noundef [[TMP11]])
104+
; TUNIT-NEXT: call void @bar(i32 [[ADD10]], float 3.000000e+00, double [[TMP11]])
105105
; TUNIT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
106106
; TUNIT: omp.body.continue:
107107
; TUNIT-NEXT: br label [[OMP_INNER_FOR_INC]]
@@ -161,7 +161,7 @@ define internal void @.omp_outlined.(ptr noalias %.global_tid., ptr noalias %.bo
161161
; CGSCC-NEXT: [[ADD10:%.*]] = add nsw i32 [[DOTOMP_IV_0]], 2
162162
; CGSCC-NEXT: [[TMP10:%.*]] = load float, ptr [[P]], align 4
163163
; CGSCC-NEXT: [[TMP11:%.*]] = load double, ptr [[Q_ADDR]], align 8
164-
; CGSCC-NEXT: call void @bar(i32 [[ADD10]], float [[TMP10]], double noundef [[TMP11]])
164+
; CGSCC-NEXT: call void @bar(i32 [[ADD10]], float [[TMP10]], double [[TMP11]])
165165
; CGSCC-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
166166
; CGSCC: omp.body.continue:
167167
; CGSCC-NEXT: br label [[OMP_INNER_FOR_INC]]

‎llvm/test/Transforms/Attributor/reduced/openmp_opt_constant_type_crash.ll

Lines changed: 125 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,125 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes --check-globals --include-generated-funcs
2+
; RUN: opt -passes=openmp-opt -S < %s | FileCheck %s --check-prefixes=CHECK
3+
4+
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
5+
target triple = "amdgcn-amd-amdhsa"
6+
7+
%"struct.Kokkos::Impl::SubviewExtents.448" = type <{ [2 x i64], [1 x i64], [1 x i32], [4 x i8] }>
8+
9+
define linkonce_odr void @_ZN6Kokkos4ViewIPdJNS_12LayoutStrideENS_6DeviceINS_12Experimental12OpenMPTargetENS_18ScratchMemorySpaceIS5_EEEENS_12MemoryTraitsILj1EEEEEC2IPS1_JNS_11LayoutRightES7_SA_ENS_4Impl5ALL_tEJiEEERKNS0_IT_JDpT0_EEET1_DpT2_() {
10+
entry:
11+
call void @_ZN6Kokkos4Impl11ViewMappingIvJNS_10ViewTraitsIPPdJNS_11LayoutRightENS_18ScratchMemorySpaceINS_12Experimental12OpenMPTargetEEENS_12MemoryTraitsILj1EEEEEENS0_5ALL_tEiEE6assignINS2_IS3_JNS_12LayoutStrideENS_6DeviceIS8_S9_EESB_EEEEEvRNS1_IT_JvEEERKNS1_ISC_JvEEESD_i()
12+
ret void
13+
}
14+
15+
define linkonce_odr void @_ZN6Kokkos4Impl11ViewMappingIvJNS_10ViewTraitsIPPdJNS_11LayoutRightENS_18ScratchMemorySpaceINS_12Experimental12OpenMPTargetEEENS_12MemoryTraitsILj1EEEEEENS0_5ALL_tEiEE6assignINS2_IS3_JNS_12LayoutStrideENS_6DeviceIS8_S9_EESB_EEEEEvRNS1_IT_JvEEERKNS1_ISC_JvEEESD_i() {
16+
entry:
17+
%extents11 = alloca [0 x [0 x %"struct.Kokkos::Impl::SubviewExtents.448"]], i32 0, align 8, addrspace(5)
18+
%extents.ascast = addrspacecast ptr addrspace(5) %extents11 to ptr
19+
call void @_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EEC2IJLm0ELm0EEJNS0_5ALL_tEiEEERKNS0_13ViewDimensionIJXspT_EEEEDpT0_(ptr %extents.ascast)
20+
call void @_ZN6Kokkos4Impl10ViewOffsetINS0_13ViewDimensionIJLm0EEEENS_12LayoutStrideEvEC2INS2_IJLm0ELm0EEEENS_11LayoutRightEEERKNS1_IT_T0_vEERKNS0_14SubviewExtentsIXsrS9_4rankELj1EEE(ptr %extents.ascast)
21+
ret void
22+
}
23+
24+
define linkonce_odr void @_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EEC2IJLm0ELm0EEJNS0_5ALL_tEiEEERKNS0_13ViewDimensionIJXspT_EEEEDpT0_(ptr %this) {
25+
entry:
26+
%call = call i1 @_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EE3setIJLm0ELm0EEJiEEEbjjRKNS0_13ViewDimensionIJXspT_EEEENS0_5ALL_tEDpT0_(ptr %this)
27+
ret void
28+
}
29+
30+
define linkonce_odr void @_ZN6Kokkos4Impl10ViewOffsetINS0_13ViewDimensionIJLm0EEEENS_12LayoutStrideEvEC2INS2_IJLm0ELm0EEEENS_11LayoutRightEEERKNS1_IT_T0_vEERKNS0_14SubviewExtentsIXsrS9_4rankELj1EEE(ptr %sub) {
31+
entry:
32+
%call191 = call i32 @_ZNK6Kokkos4Impl14SubviewExtentsILj2ELj1EE11range_indexIiEEjT_(ptr %sub)
33+
%call201 = call i64 @_ZN6Kokkos4Impl10ViewOffsetINS0_13ViewDimensionIJLm0EEEENS_12LayoutStrideEvE6strideINS2_IJLm0ELm0EEEENS_11LayoutRightEEEmjRKNS1_IT_T0_vEE(i32 %call191)
34+
ret void
35+
}
36+
37+
define linkonce_odr i1 @_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EE3setIJLm0ELm0EEJiEEEbjjRKNS0_13ViewDimensionIJXspT_EEEENS0_5ALL_tEDpT0_(ptr %this) {
38+
entry:
39+
store i64 0, ptr %this, align 8
40+
ret i1 false
41+
}
42+
43+
define linkonce_odr i64 @_ZN6Kokkos4Impl10ViewOffsetINS0_13ViewDimensionIJLm0EEEENS_12LayoutStrideEvE6strideINS2_IJLm0ELm0EEEENS_11LayoutRightEEEmjRKNS1_IT_T0_vEE(i32 %r) {
44+
entry:
45+
store i32 %r, ptr null, align 4294967296
46+
ret i64 0
47+
}
48+
49+
define linkonce_odr i32 @_ZNK6Kokkos4Impl14SubviewExtentsILj2ELj1EE11range_indexIiEEjT_(ptr %this) {
50+
entry:
51+
%cmp = icmp eq i32 1, 0
52+
br i1 %cmp, label %cond.true, label %cond.end
53+
54+
cond.true: ; preds = %entry
55+
%0 = load i32, ptr %this, align 4
56+
br label %cond.end
57+
58+
cond.end: ; preds = %cond.true, %entry
59+
%cond = phi i32 [ %0, %cond.true ], [ 1, %entry ]
60+
ret i32 %cond
61+
}
62+
63+
!llvm.module.flags = !{!0, !1}
64+
65+
!0 = !{i32 7, !"openmp", i32 50}
66+
!1 = !{i32 7, !"openmp-device", i32 50}
67+
; CHECK-LABEL: define {{[^@]+}}@_ZN6Kokkos4ViewIPdJNS_12LayoutStrideENS_6DeviceINS_12Experimental12OpenMPTargetENS_18ScratchMemorySpaceIS5_EEEENS_12MemoryTraitsILj1EEEEEC2IPS1_JNS_11LayoutRightES7_SA_ENS_4Impl5ALL_tEJiEEERKNS0_IT_JDpT0_EEET1_DpT2_() {
68+
; CHECK-NEXT: entry:
69+
; CHECK-NEXT: ret void
70+
;
71+
;
72+
; CHECK-LABEL: define {{[^@]+}}@_ZN6Kokkos4Impl11ViewMappingIvJNS_10ViewTraitsIPPdJNS_11LayoutRightENS_18ScratchMemorySpaceINS_12Experimental12OpenMPTargetEEENS_12MemoryTraitsILj1EEEEEENS0_5ALL_tEiEE6assignINS2_IS3_JNS_12LayoutStrideENS_6DeviceIS8_S9_EESB_EEEEEvRNS1_IT_JvEEERKNS1_ISC_JvEEESD_i() {
73+
; CHECK-NEXT: entry:
74+
; CHECK-NEXT: [[EXTENTS11:%.*]] = alloca [0 x [0 x %"struct.Kokkos::Impl::SubviewExtents.448"]], i32 0, align 8, addrspace(5)
75+
; CHECK-NEXT: [[EXTENTS_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[EXTENTS11]] to ptr
76+
; CHECK-NEXT: call void @_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EEC2IJLm0ELm0EEJNS0_5ALL_tEiEEERKNS0_13ViewDimensionIJXspT_EEEEDpT0_(ptr [[EXTENTS_ASCAST]])
77+
; CHECK-NEXT: call void @_ZN6Kokkos4Impl10ViewOffsetINS0_13ViewDimensionIJLm0EEEENS_12LayoutStrideEvEC2INS2_IJLm0ELm0EEEENS_11LayoutRightEEERKNS1_IT_T0_vEERKNS0_14SubviewExtentsIXsrS9_4rankELj1EEE(ptr [[EXTENTS_ASCAST]])
78+
; CHECK-NEXT: ret void
79+
;
80+
;
81+
; CHECK-LABEL: define {{[^@]+}}@_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EEC2IJLm0ELm0EEJNS0_5ALL_tEiEEERKNS0_13ViewDimensionIJXspT_EEEEDpT0_
82+
; CHECK-SAME: (ptr [[THIS:%.*]]) {
83+
; CHECK-NEXT: entry:
84+
; CHECK-NEXT: [[CALL:%.*]] = call i1 @_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EE3setIJLm0ELm0EEJiEEEbjjRKNS0_13ViewDimensionIJXspT_EEEENS0_5ALL_tEDpT0_(ptr [[THIS]])
85+
; CHECK-NEXT: ret void
86+
;
87+
;
88+
; CHECK-LABEL: define {{[^@]+}}@_ZN6Kokkos4Impl10ViewOffsetINS0_13ViewDimensionIJLm0EEEENS_12LayoutStrideEvEC2INS2_IJLm0ELm0EEEENS_11LayoutRightEEERKNS1_IT_T0_vEERKNS0_14SubviewExtentsIXsrS9_4rankELj1EEE
89+
; CHECK-SAME: (ptr [[SUB:%.*]]) {
90+
; CHECK-NEXT: entry:
91+
; CHECK-NEXT: [[CALL191:%.*]] = call i32 @_ZNK6Kokkos4Impl14SubviewExtentsILj2ELj1EE11range_indexIiEEjT_(ptr [[SUB]])
92+
; CHECK-NEXT: [[CALL201:%.*]] = call i64 @_ZN6Kokkos4Impl10ViewOffsetINS0_13ViewDimensionIJLm0EEEENS_12LayoutStrideEvE6strideINS2_IJLm0ELm0EEEENS_11LayoutRightEEEmjRKNS1_IT_T0_vEE(i32 [[CALL191]])
93+
; CHECK-NEXT: ret void
94+
;
95+
;
96+
; CHECK-LABEL: define {{[^@]+}}@_ZN6Kokkos4Impl14SubviewExtentsILj2ELj1EE3setIJLm0ELm0EEJiEEEbjjRKNS0_13ViewDimensionIJXspT_EEEENS0_5ALL_tEDpT0_
97+
; CHECK-SAME: (ptr [[THIS:%.*]]) {
98+
; CHECK-NEXT: entry:
99+
; CHECK-NEXT: store i64 0, ptr [[THIS]], align 8
100+
; CHECK-NEXT: ret i1 false
101+
;
102+
;
103+
; CHECK-LABEL: define {{[^@]+}}@_ZN6Kokkos4Impl10ViewOffsetINS0_13ViewDimensionIJLm0EEEENS_12LayoutStrideEvE6strideINS2_IJLm0ELm0EEEENS_11LayoutRightEEEmjRKNS1_IT_T0_vEE
104+
; CHECK-SAME: (i32 [[R:%.*]]) {
105+
; CHECK-NEXT: entry:
106+
; CHECK-NEXT: store i32 [[R]], ptr null, align 4294967296
107+
; CHECK-NEXT: ret i64 0
108+
;
109+
;
110+
; CHECK-LABEL: define {{[^@]+}}@_ZNK6Kokkos4Impl14SubviewExtentsILj2ELj1EE11range_indexIiEEjT_
111+
; CHECK-SAME: (ptr [[THIS:%.*]]) {
112+
; CHECK-NEXT: entry:
113+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 1, 0
114+
; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
115+
; CHECK: cond.true:
116+
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[THIS]], align 4
117+
; CHECK-NEXT: br label [[COND_END]]
118+
; CHECK: cond.end:
119+
; CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[TMP0]], [[COND_TRUE]] ], [ 1, [[ENTRY:%.*]] ]
120+
; CHECK-NEXT: ret i32 [[COND]]
121+
;
122+
;.
123+
; CHECK: [[META0:![0-9]+]] = !{i32 7, !"openmp", i32 50}
124+
; CHECK: [[META1:![0-9]+]] = !{i32 7, !"openmp-device", i32 50}
125+
;.

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