[AArch64] Add big-endian tests for trunc-to-tbl.ll

Extra tests for D133495.

Author: fhahn

llvm/test/CodeGen/AArch64/trunc-to-tbl.ll

@@ -1,8 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - %s | FileCheck %s
-
-target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-target triple = "arm64-apple-ios"
+; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s
+; RUN: llc -mtriple=aarch64_be-unknown-linux -o - %s | FileCheck --check-prefix=CHECK-BE %s
 
 ; It's profitable to use a single tbl.4 instruction to lower the truncate.
 define void @trunc_v16i32_to_v16i8_in_loop(ptr %A, ptr %dst) {
@@ -23,6 +21,30 @@ define void @trunc_v16i32_to_v16i8_in_loop(ptr %A, ptr %dst) {
 ; CHECK-NEXT:    b.eq LBB0_1
 ; CHECK-NEXT:  ; %bb.2: ; %exit
 ; CHECK-NEXT:    ret
+;
+; CHECK-BE-LABEL: trunc_v16i32_to_v16i8_in_loop:
+; CHECK-BE:       // %bb.0: // %entry
+; CHECK-BE-NEXT:    mov x8, xzr
+; CHECK-BE-NEXT:  .LBB0_1: // %loop
+; CHECK-BE-NEXT:    // =>This Inner Loop Header: Depth=1
+; CHECK-BE-NEXT:    add x9, x0, x8, lsl #6
+; CHECK-BE-NEXT:    add x10, x9, #48
+; CHECK-BE-NEXT:    add x11, x9, #32
+; CHECK-BE-NEXT:    ld1 { v0.4s }, [x9]
+; CHECK-BE-NEXT:    add x9, x9, #16
+; CHECK-BE-NEXT:    ld1 { v1.4s }, [x10]
+; CHECK-BE-NEXT:    ld1 { v2.4s }, [x11]
+; CHECK-BE-NEXT:    ld1 { v3.4s }, [x9]
+; CHECK-BE-NEXT:    add x9, x1, x8, lsl #4
+; CHECK-BE-NEXT:    add x8, x8, #1
+; CHECK-BE-NEXT:    cmp x8, #1000
+; CHECK-BE-NEXT:    uzp1 v1.8h, v2.8h, v1.8h
+; CHECK-BE-NEXT:    uzp1 v0.8h, v0.8h, v3.8h
+; CHECK-BE-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
+; CHECK-BE-NEXT:    st1 { v0.16b }, [x9]
+; CHECK-BE-NEXT:    b.eq .LBB0_1
+; CHECK-BE-NEXT:  // %bb.2: // %exit
+; CHECK-BE-NEXT:    ret
 entry:
   br label %loop
 
@@ -53,6 +75,21 @@ define void @trunc_v16i32_to_v16i8_no_loop(ptr %A, ptr %dst) {
 ; CHECK-NEXT:    uzp1.16b v0, v1, v0
 ; CHECK-NEXT:    str q0, [x1]
 ; CHECK-NEXT:    ret
+;
+; CHECK-BE-LABEL: trunc_v16i32_to_v16i8_no_loop:
+; CHECK-BE:       // %bb.0: // %entry
+; CHECK-BE-NEXT:    add x8, x0, #48
+; CHECK-BE-NEXT:    add x9, x0, #32
+; CHECK-BE-NEXT:    ld1 { v0.4s }, [x0]
+; CHECK-BE-NEXT:    ld1 { v1.4s }, [x8]
+; CHECK-BE-NEXT:    add x8, x0, #16
+; CHECK-BE-NEXT:    ld1 { v2.4s }, [x9]
+; CHECK-BE-NEXT:    ld1 { v3.4s }, [x8]
+; CHECK-BE-NEXT:    uzp1 v1.8h, v2.8h, v1.8h
+; CHECK-BE-NEXT:    uzp1 v0.8h, v0.8h, v3.8h
+; CHECK-BE-NEXT:    uzp1 v0.16b, v0.16b, v1.16b
+; CHECK-BE-NEXT:    st1 { v0.16b }, [x1]
+; CHECK-BE-NEXT:    ret
 entry:
   %l.A = load <16 x i32>, ptr %A
   %trunc = trunc <16 x i32> %l.A to <16 x i8>
@@ -77,6 +114,25 @@ define void @trunc_v8i32_to_v8i8_in_loop(ptr %A, ptr %dst) {
 ; CHECK-NEXT:    b.eq LBB2_1
 ; CHECK-NEXT:  ; %bb.2: ; %exit
 ; CHECK-NEXT:    ret
+;
+; CHECK-BE-LABEL: trunc_v8i32_to_v8i8_in_loop:
+; CHECK-BE:       // %bb.0: // %entry
+; CHECK-BE-NEXT:    mov x8, xzr
+; CHECK-BE-NEXT:  .LBB2_1: // %loop
+; CHECK-BE-NEXT:    // =>This Inner Loop Header: Depth=1
+; CHECK-BE-NEXT:    add x9, x0, x8, lsl #5
+; CHECK-BE-NEXT:    add x10, x9, #16
+; CHECK-BE-NEXT:    ld1 { v0.4s }, [x9]
+; CHECK-BE-NEXT:    add x9, x1, x8, lsl #3
+; CHECK-BE-NEXT:    add x8, x8, #1
+; CHECK-BE-NEXT:    ld1 { v1.4s }, [x10]
+; CHECK-BE-NEXT:    cmp x8, #1000
+; CHECK-BE-NEXT:    uzp1 v0.8h, v0.8h, v1.8h
+; CHECK-BE-NEXT:    xtn v0.8b, v0.8h
+; CHECK-BE-NEXT:    st1 { v0.8b }, [x9]
+; CHECK-BE-NEXT:    b.eq .LBB2_1
+; CHECK-BE-NEXT:  // %bb.2: // %exit
+; CHECK-BE-NEXT:    ret
 entry:
   br label %loop