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Revert "Reapply db28934 "[IndVars] Pass TTI to replaceCongruentIVs""
This reverts commit 5ec2386. This change is causing test failures on the PS4 linux build bot: https://lab.llvm.org/buildbot/#/builders/139/builds/12871
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7 files changed

+290
-286
lines changed

7 files changed

+290
-286
lines changed

‎llvm/lib/Transforms/Scalar/IndVarSimplify.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1924,7 +1924,7 @@ bool IndVarSimplify::run(Loop *L) {
19241924
}
19251925

19261926
// Eliminate redundant IV cycles.
1927-
NumElimIV += Rewriter.replaceCongruentIVs(L, DT, DeadInsts, TTI);
1927+
NumElimIV += Rewriter.replaceCongruentIVs(L, DT, DeadInsts);
19281928

19291929
// Try to convert exit conditions to unsigned and rotate computation
19301930
// out of the loop. Note: Handles invalidation internally if needed.

‎llvm/test/Transforms/GVN/gvn-eliminate-duplicating-phis.ll

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -47,10 +47,11 @@ define void @non_local_load_with_iv_zext(i32* %ptr) {
4747
; CHECK-NEXT: br label [[LOOP:%.*]]
4848
; CHECK: loop:
4949
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
50-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
51-
; CHECK-NEXT: [[INDVARS:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
52-
; CHECK-NEXT: store i32 [[INDVARS]], i32* [[PTR]], align 4
50+
; CHECK-NEXT: [[VAL:%.*]] = phi i32 [ [[VAL_INC:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
51+
; CHECK-NEXT: [[VAL_INC]] = add nuw nsw i32 [[VAL]], 1
52+
; CHECK-NEXT: store i32 [[VAL_INC]], i32* [[PTR]], align 4
5353
; CHECK-NEXT: call void @foo(i64 [[INDVARS_IV]])
54+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
5455
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 1000
5556
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[EXIT:%.*]], label [[LOOP]]
5657
; CHECK: exit:
@@ -84,12 +85,12 @@ define void @two_non_local_loads(i32* %ptr1) {
8485
; CHECK-NEXT: br label [[LOOP:%.*]]
8586
; CHECK: loop:
8687
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
87-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
88-
; CHECK-NEXT: [[INDVARS4:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
89-
; CHECK-NEXT: store i32 [[INDVARS4]], i32* [[PTR1]], align 4
90-
; CHECK-NEXT: [[INDVARS:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
91-
; CHECK-NEXT: store i32 [[INDVARS]], i32* [[PTR2]], align 4
88+
; CHECK-NEXT: [[VAL2:%.*]] = phi i32 [ [[VAL2_INC:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
89+
; CHECK-NEXT: [[VAL2_INC]] = add nuw nsw i32 [[VAL2]], 1
90+
; CHECK-NEXT: store i32 [[VAL2_INC]], i32* [[PTR1]], align 4
91+
; CHECK-NEXT: store i32 [[VAL2_INC]], i32* [[PTR2]], align 4
9292
; CHECK-NEXT: call void @foo(i64 [[INDVARS_IV]])
93+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
9394
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 1000
9495
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[EXIT:%.*]], label [[LOOP]]
9596
; CHECK: exit:

‎llvm/test/Transforms/IndVarSimplify/X86/pr27133.ll

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,11 +9,11 @@ define i32 @fn2() personality i32 (...)* @__CxxFrameHandler3 {
99
; CHECK-NEXT: br label [[FOR_COND:%.*]]
1010
; CHECK: for.cond:
1111
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
12-
; CHECK-NEXT: [[INDVARS1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
12+
; CHECK-NEXT: [[C_0:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_INC]] ], [ 0, [[ENTRY]] ]
1313
; CHECK-NEXT: invoke void @fn1(i64 [[INDVARS_IV]])
1414
; CHECK-NEXT: to label [[FOR_INC]] unwind label [[CATCH_DISPATCH:%.*]]
1515
; CHECK: catch.dispatch:
16-
; CHECK-NEXT: [[C_0_LCSSA:%.*]] = phi i32 [ [[INDVARS1]], [[FOR_COND]] ]
16+
; CHECK-NEXT: [[C_0_LCSSA:%.*]] = phi i32 [ [[C_0]], [[FOR_COND]] ]
1717
; CHECK-NEXT: [[TMP0:%.*]] = catchswitch within none [label %catch] unwind to caller
1818
; CHECK: catch:
1919
; CHECK-NEXT: [[TMP1:%.*]] = catchpad within [[TMP0]] [i8* null, i32 64, i8* null]
@@ -22,6 +22,7 @@ define i32 @fn2() personality i32 (...)* @__CxxFrameHandler3 {
2222
; CHECK-NEXT: ret i32 [[C_0_LCSSA]]
2323
; CHECK: for.inc:
2424
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw i64 [[INDVARS_IV]], 1
25+
; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[C_0]], 1
2526
; CHECK-NEXT: br label [[FOR_COND]]
2627
;
2728
entry:

‎llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll

Lines changed: 17 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -103,17 +103,17 @@ define void @test2([8 x i8]* %a, i8* %b, i8 %limit) {
103103
; CHECK: for.cond1.preheader.preheader:
104104
; CHECK-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
105105
; CHECK: for.cond1.preheader.us:
106-
; CHECK-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ], [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC13_US:%.*]] ]
106+
; CHECK-NEXT: [[INDVARS_IV2:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[FOR_INC13_US:%.*]] ]
107107
; CHECK-NEXT: br i1 true, label [[FOR_BODY4_LR_PH_US:%.*]], label [[FOR_INC13_US]]
108108
; CHECK: for.inc13.us.loopexit:
109109
; CHECK-NEXT: br label [[FOR_INC13_US]]
110110
; CHECK: for.inc13.us:
111-
; CHECK-NEXT: [[INDVARS_IV_NEXT4]] = add nuw nsw i64 [[INDVARS_IV3]], 1
112-
; CHECK-NEXT: [[EXITCOND6:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT4]], 4
113-
; CHECK-NEXT: br i1 [[EXITCOND6]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_END_LOOPEXIT1:%.*]]
111+
; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1
112+
; CHECK-NEXT: [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 4
113+
; CHECK-NEXT: br i1 [[EXITCOND4]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_END_LOOPEXIT1:%.*]]
114114
; CHECK: for.body4.us:
115115
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY4_LR_PH_US]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY4_US:%.*]] ]
116-
; CHECK-NEXT: [[ARRAYIDX6_US:%.*]] = getelementptr inbounds [8 x i8], [8 x i8]* [[A:%.*]], i64 [[INDVARS_IV3]], i64 [[INDVARS_IV]]
116+
; CHECK-NEXT: [[ARRAYIDX6_US:%.*]] = getelementptr inbounds [8 x i8], [8 x i8]* [[A:%.*]], i64 [[INDVARS_IV2]], i64 [[INDVARS_IV]]
117117
; CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[ARRAYIDX6_US]], align 1
118118
; CHECK-NEXT: [[IDXPROM7_US:%.*]] = zext i8 [[TMP0]] to i64
119119
; CHECK-NEXT: [[ARRAYIDX8_US:%.*]] = getelementptr inbounds i8, i8* [[B:%.*]], i64 [[IDXPROM7_US]]
@@ -549,14 +549,14 @@ define i32 @test11(i32 %start, i32* %p, i32* %q) {
549549
; CHECK: loop:
550550
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
551551
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
552-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
553552
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
554553
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
555554
; CHECK: backedge:
556555
; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
557556
; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
558557
; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
559558
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
559+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
560560
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
561561
; CHECK: exit:
562562
; CHECK-NEXT: ret i32 0
@@ -599,11 +599,11 @@ define i32 @test12(i32 %start, i32* %p, i32* %q) {
599599
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
600600
; CHECK: backedge:
601601
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
602-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
603602
; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
604603
; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
605604
; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
606605
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
606+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
607607
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
608608
; CHECK: exit:
609609
; CHECK-NEXT: ret i32 0
@@ -862,8 +862,8 @@ define i32 @test16_unsigned_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
862862
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], -1
863863
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
864864
; CHECK: guarded:
865-
; CHECK-NEXT: [[ICMP_USER_WIDE5:%.*]] = icmp ult i64 [[TMP1]], [[TMP2]]
866-
; CHECK-NEXT: br i1 [[ICMP_USER_WIDE5]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
865+
; CHECK-NEXT: [[ICMP_USER_WIDE4:%.*]] = icmp ult i64 [[TMP1]], [[TMP2]]
866+
; CHECK-NEXT: br i1 [[ICMP_USER_WIDE4]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
867867
; CHECK: backedge:
868868
; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP3]]
869869
; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
@@ -1266,13 +1266,13 @@ define i32 @test17(i32* %p, i32 %len) {
12661266
; CHECK: loop:
12671267
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
12681268
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
1269-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
12701269
; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
12711270
; CHECK-NEXT: br i1 [[COND_1]], label [[EXIT:%.*]], label [[BACKEDGE]]
12721271
; CHECK: backedge:
12731272
; CHECK-NEXT: [[ADDR:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 [[TMP1]]
12741273
; CHECK-NEXT: [[LOADED:%.*]] = load atomic i32, i32* [[ADDR]] unordered, align 4
12751274
; CHECK-NEXT: [[COND_2:%.*]] = icmp eq i32 [[LOADED]], 0
1275+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
12761276
; CHECK-NEXT: br i1 [[COND_2]], label [[FAILURE:%.*]], label [[LOOP]]
12771277
; CHECK: exit:
12781278
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 -1 to i32
@@ -1312,9 +1312,10 @@ define void @test18() {
13121312
; CHECK-NEXT: br label [[LOOP:%.*]]
13131313
; CHECK: loop:
13141314
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
1315+
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
1316+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
13151317
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
1316-
; CHECK-NEXT: [[INDVARS2:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
1317-
; CHECK-NEXT: call void @bar(i32 [[INDVARS2]])
1318+
; CHECK-NEXT: call void @bar(i32 [[IV_NEXT]])
13181319
; CHECK-NEXT: call void @foo(i64 [[INDVARS_IV]])
13191320
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 1000
13201321
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[EXIT:%.*]], label [[LOOP]]
@@ -1411,10 +1412,11 @@ define void @test21(i32* %ptr) {
14111412
; CHECK-NEXT: br label [[LOOP:%.*]]
14121413
; CHECK: loop:
14131414
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
1414-
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
1415-
; CHECK-NEXT: [[INDVARS:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
1416-
; CHECK-NEXT: store i32 [[INDVARS]], i32* [[PTR]], align 4
1415+
; CHECK-NEXT: [[VAL:%.*]] = phi i32 [ [[VAL_INC:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
1416+
; CHECK-NEXT: [[VAL_INC]] = add nuw nsw i32 [[VAL]], 1
1417+
; CHECK-NEXT: store i32 [[VAL_INC]], i32* [[PTR]], align 4
14171418
; CHECK-NEXT: call void @foo(i64 [[INDVARS_IV]])
1419+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
14181420
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 1000
14191421
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[EXIT:%.*]], label [[LOOP]]
14201422
; CHECK: exit:

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