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[RISCV] Implement prefetch locality by NTLH
We add the MemOperand then backend will generate NTLH automatically. ``` __builtin_prefetch(ptr, 0 /* rw==read */, 0 /* locality */); => ntl.all + prefetch.r (ptr) __builtin_prefetch(ptr, 0 /* rw==read */, 1 /* locality */); => ntl.pall + prefetch.r (ptr) __builtin_prefetch(ptr, 0 /* rw==read */, 2 /* locality */); => ntl.p1 + prefetch.r (ptr) __builtin_prefetch(ptr, 0 /* rw==read */, 3 /* locality */); => prefetch.r (ptr) ``` Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D154691
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llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2108,6 +2108,36 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
21082108
ReplaceNode(Node, Load);
21092109
return;
21102110
}
2111+
case ISD::PREFETCH:
2112+
unsigned Locality = Node->getConstantOperandVal(3);
2113+
if (Locality > 2)
2114+
break;
2115+
2116+
if (auto *LoadStoreMem = dyn_cast<MemSDNode>(Node)) {
2117+
MachineMemOperand *MMO = LoadStoreMem->getMemOperand();
2118+
MMO->setFlags(MachineMemOperand::MONonTemporal);
2119+
2120+
int NontemporalLevel = 0;
2121+
switch (Locality) {
2122+
case 0:
2123+
NontemporalLevel = 3; // NTL.ALL
2124+
break;
2125+
case 1:
2126+
NontemporalLevel = 1; // NTL.PALL
2127+
break;
2128+
case 2:
2129+
NontemporalLevel = 0; // NTL.P1
2130+
break;
2131+
default:
2132+
llvm_unreachable("unexpected locality value.");
2133+
}
2134+
2135+
if (NontemporalLevel & 0b1)
2136+
MMO->setFlags(MONontemporalBit0);
2137+
if (NontemporalLevel & 0b10)
2138+
MMO->setFlags(MONontemporalBit1);
2139+
}
2140+
break;
21112141
}
21122142

21132143
// Select the default instruction.

llvm/test/CodeGen/RISCV/prefetch.ll

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ define void @test_prefetch_read_locality_0(ptr %a) nounwind {
3333
;
3434
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_0:
3535
; RV64ZICBOPZIHINTNTL: # %bb.0:
36+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.all
3637
; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
3738
; RV64ZICBOPZIHINTNTL-NEXT: ret
3839
call void @llvm.prefetch(ptr %a, i32 0, i32 0, i32 1)
@@ -60,6 +61,7 @@ define void @test_prefetch_write_locality_0(ptr %a) nounwind {
6061
;
6162
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_0:
6263
; RV64ZICBOPZIHINTNTL: # %bb.0:
64+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.all
6365
; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
6567
call void @llvm.prefetch(ptr %a, i32 1, i32 0, i32 1)
@@ -87,6 +89,7 @@ define void @test_prefetch_instruction_locality_0(ptr %a) nounwind {
8789
;
8890
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_0:
8991
; RV64ZICBOPZIHINTNTL: # %bb.0:
92+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.all
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
9295
call void @llvm.prefetch(ptr %a, i32 0, i32 0, i32 0)
@@ -114,6 +117,7 @@ define void @test_prefetch_read_locality_1(ptr %a) nounwind {
114117
;
115118
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_1:
116119
; RV64ZICBOPZIHINTNTL: # %bb.0:
120+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.pall
117121
; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
118122
; RV64ZICBOPZIHINTNTL-NEXT: ret
119123
call void @llvm.prefetch(ptr %a, i32 0, i32 1, i32 1)
@@ -141,6 +145,7 @@ define void @test_prefetch_write_locality_1(ptr %a) nounwind {
141145
;
142146
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_1:
143147
; RV64ZICBOPZIHINTNTL: # %bb.0:
148+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.pall
144149
; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
145150
; RV64ZICBOPZIHINTNTL-NEXT: ret
146151
call void @llvm.prefetch(ptr %a, i32 1, i32 1, i32 1)
@@ -168,6 +173,7 @@ define void @test_prefetch_instruction_locality_1(ptr %a) nounwind {
168173
;
169174
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_1:
170175
; RV64ZICBOPZIHINTNTL: # %bb.0:
176+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.pall
171177
; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
172178
; RV64ZICBOPZIHINTNTL-NEXT: ret
173179
call void @llvm.prefetch(ptr %a, i32 0, i32 1, i32 0)
@@ -195,6 +201,7 @@ define void @test_prefetch_read_locality_2(ptr %a) nounwind {
195201
;
196202
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_2:
197203
; RV64ZICBOPZIHINTNTL: # %bb.0:
204+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.p1
198205
; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
199206
; RV64ZICBOPZIHINTNTL-NEXT: ret
200207
call void @llvm.prefetch(ptr %a, i32 0, i32 2, i32 1)
@@ -222,6 +229,7 @@ define void @test_prefetch_write_locality_2(ptr %a) nounwind {
222229
;
223230
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_2:
224231
; RV64ZICBOPZIHINTNTL: # %bb.0:
232+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.p1
225233
; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
226234
; RV64ZICBOPZIHINTNTL-NEXT: ret
227235
call void @llvm.prefetch(ptr %a, i32 1, i32 2, i32 1)
@@ -249,6 +257,7 @@ define void @test_prefetch_instruction_locality_2(ptr %a) nounwind {
249257
;
250258
; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_2:
251259
; RV64ZICBOPZIHINTNTL: # %bb.0:
260+
; RV64ZICBOPZIHINTNTL-NEXT: ntl.p1
252261
; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
253262
; RV64ZICBOPZIHINTNTL-NEXT: ret
254263
call void @llvm.prefetch(ptr %a, i32 0, i32 2, i32 0)

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