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29 | 29 | using namespace llvm;
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30 | 30 |
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31 | 31 | namespace {
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32 |
| - enum SpillerName { trivial, standard, inline_ }; |
| 32 | + enum SpillerName { trivial, inline_ }; |
33 | 33 | }
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34 | 34 |
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35 | 35 | static cl::opt<SpillerName>
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36 | 36 | spillerOpt("spiller",
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37 | 37 | cl::desc("Spiller to use: (default: standard)"),
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38 | 38 | cl::Prefix,
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39 | 39 | cl::values(clEnumVal(trivial, "trivial spiller"),
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40 |
| - clEnumVal(standard, "default spiller"), |
41 | 40 | clEnumValN(inline_, "inline", "inline spiller"),
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42 | 41 | clEnumValEnd),
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43 |
| - cl::init(standard)); |
| 42 | + cl::init(trivial)); |
44 | 43 |
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45 | 44 | // Spiller virtual destructor implementation.
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46 | 45 | Spiller::~Spiller() {}
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@@ -188,54 +187,12 @@ class TrivialSpiller : public SpillerBase {
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188 | 187 |
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189 | 188 | } // end anonymous namespace
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190 | 189 |
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191 |
| -namespace { |
192 |
| - |
193 |
| -/// Falls back on LiveIntervals::addIntervalsForSpills. |
194 |
| -class StandardSpiller : public Spiller { |
195 |
| -protected: |
196 |
| - MachineFunction *mf; |
197 |
| - LiveIntervals *lis; |
198 |
| - LiveStacks *lss; |
199 |
| - MachineLoopInfo *loopInfo; |
200 |
| - VirtRegMap *vrm; |
201 |
| -public: |
202 |
| - StandardSpiller(MachineFunctionPass &pass, MachineFunction &mf, |
203 |
| - VirtRegMap &vrm) |
204 |
| - : mf(&mf), |
205 |
| - lis(&pass.getAnalysis<LiveIntervals>()), |
206 |
| - lss(&pass.getAnalysis<LiveStacks>()), |
207 |
| - loopInfo(pass.getAnalysisIfAvailable<MachineLoopInfo>()), |
208 |
| - vrm(&vrm) {} |
209 |
| - |
210 |
| - /// Falls back on LiveIntervals::addIntervalsForSpills. |
211 |
| - void spill(LiveRangeEdit &LRE) { |
212 |
| - std::vector<LiveInterval*> added = |
213 |
| - lis->addIntervalsForSpills(LRE.getParent(), LRE.getUselessVRegs(), |
214 |
| - loopInfo, *vrm); |
215 |
| - LRE.getNewVRegs()->insert(LRE.getNewVRegs()->end(), |
216 |
| - added.begin(), added.end()); |
217 |
| - |
218 |
| - // Update LiveStacks. |
219 |
| - int SS = vrm->getStackSlot(LRE.getReg()); |
220 |
| - if (SS == VirtRegMap::NO_STACK_SLOT) |
221 |
| - return; |
222 |
| - const TargetRegisterClass *RC = mf->getRegInfo().getRegClass(LRE.getReg()); |
223 |
| - LiveInterval &SI = lss->getOrCreateInterval(SS, RC); |
224 |
| - if (!SI.hasAtLeastOneValue()) |
225 |
| - SI.getNextValue(SlotIndex(), 0, lss->getVNInfoAllocator()); |
226 |
| - SI.MergeRangesInAsValue(LRE.getParent(), SI.getValNumInfo(0)); |
227 |
| - } |
228 |
| -}; |
229 |
| - |
230 |
| -} // end anonymous namespace |
231 |
| - |
232 | 190 | llvm::Spiller* llvm::createSpiller(MachineFunctionPass &pass,
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233 | 191 | MachineFunction &mf,
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234 | 192 | VirtRegMap &vrm) {
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235 | 193 | switch (spillerOpt) {
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236 | 194 | default: assert(0 && "unknown spiller");
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237 | 195 | case trivial: return new TrivialSpiller(pass, mf, vrm);
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238 |
| - case standard: return new StandardSpiller(pass, mf, vrm); |
239 | 196 | case inline_: return createInlineSpiller(pass, mf, vrm);
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240 | 197 | }
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241 | 198 | }
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