[InstCombine] add vector tests for multi-use demanded bits; NFC

See D91415.

Author: rotateright

llvm/test/Transforms/InstCombine/and.ll

@@ -1100,3 +1100,29 @@ define <2 x i8> @lowmask_add_splat(<2 x i8> %x, <2 x i8>* %p) {
   %r = and <2 x i8> %a, <i8 32, i8 32> ; 0x20
   ret <2 x i8> %r
 }
+
+define <2 x i8> @lowmask_add_splat_undef(<2 x i8> %x, <2 x i8>* %p) {
+; CHECK-LABEL: @lowmask_add_splat_undef(
+; CHECK-NEXT:    [[A:%.*]] = add <2 x i8> [[X:%.*]], <i8 -64, i8 undef>
+; CHECK-NEXT:    store <2 x i8> [[A]], <2 x i8>* [[P:%.*]], align 2
+; CHECK-NEXT:    [[R:%.*]] = and <2 x i8> [[A]], <i8 undef, i8 32>
+; CHECK-NEXT:    ret <2 x i8> [[R]]
+;
+  %a = add <2 x i8> %x, <i8 -64, i8 undef> ; 0xc0
+  store <2 x i8> %a, <2 x i8>* %p
+  %r = and <2 x i8> %a, <i8 undef, i8 32> ; 0x20
+  ret <2 x i8> %r
+}
+
+define <2 x i8> @lowmask_add_vec(<2 x i8> %x, <2 x i8>* %p) {
+; CHECK-LABEL: @lowmask_add_vec(
+; CHECK-NEXT:    [[A:%.*]] = add <2 x i8> [[X:%.*]], <i8 -96, i8 -64>
+; CHECK-NEXT:    store <2 x i8> [[A]], <2 x i8>* [[P:%.*]], align 2
+; CHECK-NEXT:    [[R:%.*]] = and <2 x i8> [[A]], <i8 16, i8 32>
+; CHECK-NEXT:    ret <2 x i8> [[R]]
+;
+  %a = add <2 x i8> %x, <i8 -96, i8 -64> ; 0xe0, 0xc0
+  store <2 x i8> %a, <2 x i8>* %p
+  %r = and <2 x i8> %a, <i8 16, i8 32> ; 0x10, 0x20
+  ret <2 x i8> %r
+}