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[LoongArch] Use LSX for scalar FP rounding with explicit rounding mode (llvm#114766)
LoongArch FP base ISA only have frint.{s/d} instruction which reads the global rounding mode. Utilize LSX for explicit rounding mode for scalar ceil/floor/trunc/roundeven calls when -mlsx opend. It is faster than calling the libm library functions. Same as what gcc did: https://gcc.gnu.org/pipermail/gcc-cvs/2023-November/394218.html
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3 files changed

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‎llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -286,6 +286,10 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
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VT, Expand);
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}
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setOperationAction(ISD::CTPOP, GRLenVT, Legal);
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setOperationAction(ISD::FCEIL, {MVT::f32, MVT::f64}, Legal);
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setOperationAction(ISD::FFLOOR, {MVT::f32, MVT::f64}, Legal);
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setOperationAction(ISD::FTRUNC, {MVT::f32, MVT::f64}, Legal);
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setOperationAction(ISD::FROUNDEVEN, {MVT::f32, MVT::f64}, Legal);
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}
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// Set operations for 'LASX' feature.

‎llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2259,6 +2259,32 @@ def : Pat<(loongarch_vfrsqrte v2f64:$src),
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(VFRSQRTE_D v2f64:$src)>;
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}
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// Vector floating-point conversion
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def : Pat<(f32 (fceil FPR32:$fj)),
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(f32 (EXTRACT_SUBREG (VFRINTRP_S (VREPLVEI_W
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(SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32), 0)), sub_32))>;
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def : Pat<(f64 (fceil FPR64:$fj)),
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(f64 (EXTRACT_SUBREG (VFRINTRP_D (VREPLVEI_D
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(SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64), 0)), sub_64))>;
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def : Pat<(f32 (ffloor FPR32:$fj)),
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(f32 (EXTRACT_SUBREG (VFRINTRM_S (VREPLVEI_W
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(SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32), 0)), sub_32))>;
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def : Pat<(f64 (ffloor FPR64:$fj)),
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(f64 (EXTRACT_SUBREG (VFRINTRM_D (VREPLVEI_D
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(SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64), 0)), sub_64))>;
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def : Pat<(f32 (ftrunc FPR32:$fj)),
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(f32 (EXTRACT_SUBREG (VFRINTRZ_S (VREPLVEI_W
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(SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32), 0)), sub_32))>;
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def : Pat<(f64 (ftrunc FPR64:$fj)),
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(f64 (EXTRACT_SUBREG (VFRINTRZ_D (VREPLVEI_D
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(SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64), 0)), sub_64))>;
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def : Pat<(f32 (froundeven FPR32:$fj)),
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(f32 (EXTRACT_SUBREG (VFRINTRNE_S (VREPLVEI_W
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(SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32), 0)), sub_32))>;
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def : Pat<(f64 (froundeven FPR64:$fj)),
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(f64 (EXTRACT_SUBREG (VFRINTRNE_D (VREPLVEI_D
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(SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64), 0)), sub_64))>;
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// load
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def : Pat<(int_loongarch_lsx_vld GPR:$rj, timm:$imm),
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(VLD GPR:$rj, (to_valid_timm timm:$imm))>;

‎llvm/test/CodeGen/LoongArch/fp-rounding.ll

Lines changed: 40 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,11 @@ define float @ceil_f32(float %i) nounwind {
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;
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; LSX-LABEL: ceil_f32:
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; LSX: # %bb.0: # %entry
13-
; LSX-NEXT: b %plt(ceilf)
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; LSX-NEXT: # kill: def $f0 killed $f0 def $vr0
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; LSX-NEXT: vreplvei.w $vr0, $vr0, 0
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; LSX-NEXT: vfrintrp.s $vr0, $vr0
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; LSX-NEXT: # kill: def $f0 killed $f0 killed $vr0
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; LSX-NEXT: ret
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entry:
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%0 = call float @llvm.ceil.f32(float %i)
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ret float %0
@@ -24,7 +28,11 @@ define double @ceil_f64(double %i) nounwind {
2428
;
2529
; LSX-LABEL: ceil_f64:
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; LSX: # %bb.0: # %entry
27-
; LSX-NEXT: b %plt(ceil)
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; LSX-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
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; LSX-NEXT: vreplvei.d $vr0, $vr0, 0
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; LSX-NEXT: vfrintrp.d $vr0, $vr0
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; LSX-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
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; LSX-NEXT: ret
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entry:
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%0 = call double @llvm.ceil.f64(double %i)
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ret double %0
@@ -38,7 +46,11 @@ define float @floor_f32(float %i) nounwind {
3846
;
3947
; LSX-LABEL: floor_f32:
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; LSX: # %bb.0: # %entry
41-
; LSX-NEXT: b %plt(floorf)
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; LSX-NEXT: # kill: def $f0 killed $f0 def $vr0
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; LSX-NEXT: vreplvei.w $vr0, $vr0, 0
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; LSX-NEXT: vfrintrm.s $vr0, $vr0
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; LSX-NEXT: # kill: def $f0 killed $f0 killed $vr0
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; LSX-NEXT: ret
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entry:
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%0 = call float @llvm.floor.f32(float %i)
4456
ret float %0
@@ -52,7 +64,11 @@ define double @floor_f64(double %i) nounwind {
5264
;
5365
; LSX-LABEL: floor_f64:
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; LSX: # %bb.0: # %entry
55-
; LSX-NEXT: b %plt(floor)
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; LSX-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
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; LSX-NEXT: vreplvei.d $vr0, $vr0, 0
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; LSX-NEXT: vfrintrm.d $vr0, $vr0
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; LSX-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
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; LSX-NEXT: ret
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entry:
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%0 = call double @llvm.floor.f64(double %i)
5874
ret double %0
@@ -66,7 +82,11 @@ define float @trunc_f32(float %i) nounwind {
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;
6783
; LSX-LABEL: trunc_f32:
6884
; LSX: # %bb.0: # %entry
69-
; LSX-NEXT: b %plt(truncf)
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; LSX-NEXT: # kill: def $f0 killed $f0 def $vr0
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; LSX-NEXT: vreplvei.w $vr0, $vr0, 0
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; LSX-NEXT: vfrintrz.s $vr0, $vr0
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; LSX-NEXT: # kill: def $f0 killed $f0 killed $vr0
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; LSX-NEXT: ret
7090
entry:
7191
%0 = call float @llvm.trunc.f32(float %i)
7292
ret float %0
@@ -80,7 +100,11 @@ define double @trunc_f64(double %i) nounwind {
80100
;
81101
; LSX-LABEL: trunc_f64:
82102
; LSX: # %bb.0: # %entry
83-
; LSX-NEXT: b %plt(trunc)
103+
; LSX-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
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; LSX-NEXT: vreplvei.d $vr0, $vr0, 0
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; LSX-NEXT: vfrintrz.d $vr0, $vr0
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; LSX-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
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; LSX-NEXT: ret
84108
entry:
85109
%0 = call double @llvm.trunc.f64(double %i)
86110
ret double %0
@@ -94,7 +118,11 @@ define float @roundeven_f32(float %i) nounwind {
94118
;
95119
; LSX-LABEL: roundeven_f32:
96120
; LSX: # %bb.0: # %entry
97-
; LSX-NEXT: b %plt(roundevenf)
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; LSX-NEXT: # kill: def $f0 killed $f0 def $vr0
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; LSX-NEXT: vreplvei.w $vr0, $vr0, 0
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; LSX-NEXT: vfrintrne.s $vr0, $vr0
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; LSX-NEXT: # kill: def $f0 killed $f0 killed $vr0
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; LSX-NEXT: ret
98126
entry:
99127
%0 = call float @llvm.roundeven.f32(float %i)
100128
ret float %0
@@ -108,7 +136,11 @@ define double @roundeven_f64(double %i) nounwind {
108136
;
109137
; LSX-LABEL: roundeven_f64:
110138
; LSX: # %bb.0: # %entry
111-
; LSX-NEXT: b %plt(roundeven)
139+
; LSX-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
140+
; LSX-NEXT: vreplvei.d $vr0, $vr0, 0
141+
; LSX-NEXT: vfrintrne.d $vr0, $vr0
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; LSX-NEXT: # kill: def $f0_64 killed $f0_64 killed $vr0
143+
; LSX-NEXT: ret
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entry:
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%0 = call double @llvm.roundeven.f64(double %i)
114146
ret double %0

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