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Jinsong Ji
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[PowerPC][NFCI] PassSubtarget to ASMWriter
Subtarget feature bits are needed to change instprinter's behavior based on feature bits. Most of the other popular targets were updated back in 2015, in https://reviews.llvm.org/rGb46d0234a6969 we should update it too. Reviewed By: sfertile Differential Revision: https://reviews.llvm.org/D94449
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-65
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3 files changed

+122
-65
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‎llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp

Lines changed: 58 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -71,11 +71,11 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
7171
"reference expression if it is an expression at all.");
7272

7373
O << "\taddis ";
74-
printOperand(MI, 0, O);
74+
printOperand(MI, 0, STI, O);
7575
O << ", ";
76-
printOperand(MI, 2, O);
76+
printOperand(MI, 2, STI, O);
7777
O << "(";
78-
printOperand(MI, 1, O);
78+
printOperand(MI, 1, STI, O);
7979
O << ")";
8080
return;
8181
}
@@ -94,7 +94,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
9494
if (SymExpr && SymExpr->getKind() == MCSymbolRefExpr::VK_PPC_PCREL_OPT) {
9595
const MCSymbol &Symbol = SymExpr->getSymbol();
9696
if (MI->getOpcode() == PPC::PLDpc) {
97-
printInstruction(MI, Address, O);
97+
printInstruction(MI, Address, STI, O);
9898
O << "\n";
9999
Symbol.print(O, &MAI);
100100
O << ":";
@@ -124,9 +124,9 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
124124
SH = 32-SH;
125125
}
126126
if (useSubstituteMnemonic) {
127-
printOperand(MI, 0, O);
127+
printOperand(MI, 0, STI, O);
128128
O << ", ";
129-
printOperand(MI, 1, O);
129+
printOperand(MI, 1, STI, O);
130130
O << ", " << (unsigned int)SH;
131131

132132
printAnnotation(O, Annot);
@@ -141,9 +141,9 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
141141
// rldicr RA, RS, SH, 63-SH == sldi RA, RS, SH
142142
if (63-SH == ME) {
143143
O << "\tsldi ";
144-
printOperand(MI, 0, O);
144+
printOperand(MI, 0, STI, O);
145145
O << ", ";
146-
printOperand(MI, 1, O);
146+
printOperand(MI, 1, STI, O);
147147
O << ", " << (unsigned int)SH;
148148
printAnnotation(O, Annot);
149149
return;
@@ -171,9 +171,9 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
171171
if (IsBookE && TH != 0 && TH != 16)
172172
O << (unsigned int) TH << ", ";
173173

174-
printOperand(MI, 1, O);
174+
printOperand(MI, 1, STI, O);
175175
O << ", ";
176-
printOperand(MI, 2, O);
176+
printOperand(MI, 2, STI, O);
177177

178178
if (!IsBookE && TH != 0 && TH != 16)
179179
O << ", " << (unsigned int) TH;
@@ -198,21 +198,22 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address,
198198
O << "stps";
199199
O << " ";
200200

201-
printOperand(MI, 1, O);
201+
printOperand(MI, 1, STI, O);
202202
O << ", ";
203-
printOperand(MI, 2, O);
203+
printOperand(MI, 2, STI, O);
204204

205205
printAnnotation(O, Annot);
206206
return;
207207
}
208208
}
209209

210-
if (!printAliasInstr(MI, Address, O))
211-
printInstruction(MI, Address, O);
210+
if (!printAliasInstr(MI, Address, STI, O))
211+
printInstruction(MI, Address, STI, O);
212212
printAnnotation(O, Annot);
213213
}
214214

215215
void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
216+
const MCSubtargetInfo &STI,
216217
raw_ostream &O,
217218
const char *Modifier) {
218219
unsigned Code = MI->getOperand(OpNo).getImm();
@@ -306,10 +307,11 @@ void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
306307

307308
assert(StringRef(Modifier) == "reg" &&
308309
"Need to specify 'cc', 'pm' or 'reg' as predicate op modifier!");
309-
printOperand(MI, OpNo+1, O);
310+
printOperand(MI, OpNo + 1, STI, O);
310311
}
311312

312313
void PPCInstPrinter::printATBitsAsHint(const MCInst *MI, unsigned OpNo,
314+
const MCSubtargetInfo &STI,
313315
raw_ostream &O) {
314316
unsigned Code = MI->getOperand(OpNo).getImm();
315317
if (Code == 2)
@@ -319,62 +321,71 @@ void PPCInstPrinter::printATBitsAsHint(const MCInst *MI, unsigned OpNo,
319321
}
320322

321323
void PPCInstPrinter::printU1ImmOperand(const MCInst *MI, unsigned OpNo,
324+
const MCSubtargetInfo &STI,
322325
raw_ostream &O) {
323326
unsigned int Value = MI->getOperand(OpNo).getImm();
324327
assert(Value <= 1 && "Invalid u1imm argument!");
325328
O << (unsigned int)Value;
326329
}
327330

328331
void PPCInstPrinter::printU2ImmOperand(const MCInst *MI, unsigned OpNo,
332+
const MCSubtargetInfo &STI,
329333
raw_ostream &O) {
330334
unsigned int Value = MI->getOperand(OpNo).getImm();
331335
assert(Value <= 3 && "Invalid u2imm argument!");
332336
O << (unsigned int)Value;
333337
}
334338

335339
void PPCInstPrinter::printU3ImmOperand(const MCInst *MI, unsigned OpNo,
340+
const MCSubtargetInfo &STI,
336341
raw_ostream &O) {
337342
unsigned int Value = MI->getOperand(OpNo).getImm();
338343
assert(Value <= 8 && "Invalid u3imm argument!");
339344
O << (unsigned int)Value;
340345
}
341346

342347
void PPCInstPrinter::printU4ImmOperand(const MCInst *MI, unsigned OpNo,
348+
const MCSubtargetInfo &STI,
343349
raw_ostream &O) {
344350
unsigned int Value = MI->getOperand(OpNo).getImm();
345351
assert(Value <= 15 && "Invalid u4imm argument!");
346352
O << (unsigned int)Value;
347353
}
348354

349355
void PPCInstPrinter::printS5ImmOperand(const MCInst *MI, unsigned OpNo,
356+
const MCSubtargetInfo &STI,
350357
raw_ostream &O) {
351358
int Value = MI->getOperand(OpNo).getImm();
352359
Value = SignExtend32<5>(Value);
353360
O << (int)Value;
354361
}
355362

356363
void PPCInstPrinter::printImmZeroOperand(const MCInst *MI, unsigned OpNo,
364+
const MCSubtargetInfo &STI,
357365
raw_ostream &O) {
358366
unsigned int Value = MI->getOperand(OpNo).getImm();
359367
assert(Value == 0 && "Operand must be zero");
360368
O << (unsigned int)Value;
361369
}
362370

363371
void PPCInstPrinter::printU5ImmOperand(const MCInst *MI, unsigned OpNo,
372+
const MCSubtargetInfo &STI,
364373
raw_ostream &O) {
365374
unsigned int Value = MI->getOperand(OpNo).getImm();
366375
assert(Value <= 31 && "Invalid u5imm argument!");
367376
O << (unsigned int)Value;
368377
}
369378

370379
void PPCInstPrinter::printU6ImmOperand(const MCInst *MI, unsigned OpNo,
380+
const MCSubtargetInfo &STI,
371381
raw_ostream &O) {
372382
unsigned int Value = MI->getOperand(OpNo).getImm();
373383
assert(Value <= 63 && "Invalid u6imm argument!");
374384
O << (unsigned int)Value;
375385
}
376386

377387
void PPCInstPrinter::printU7ImmOperand(const MCInst *MI, unsigned OpNo,
388+
const MCSubtargetInfo &STI,
378389
raw_ostream &O) {
379390
unsigned int Value = MI->getOperand(OpNo).getImm();
380391
assert(Value <= 127 && "Invalid u7imm argument!");
@@ -385,56 +396,64 @@ void PPCInstPrinter::printU7ImmOperand(const MCInst *MI, unsigned OpNo,
385396
// of XXSPLTIB which are unsigned. So we simply truncate to 8 bits and
386397
// print as unsigned.
387398
void PPCInstPrinter::printU8ImmOperand(const MCInst *MI, unsigned OpNo,
399+
const MCSubtargetInfo &STI,
388400
raw_ostream &O) {
389401
unsigned char Value = MI->getOperand(OpNo).getImm();
390402
O << (unsigned int)Value;
391403
}
392404

393405
void PPCInstPrinter::printU10ImmOperand(const MCInst *MI, unsigned OpNo,
406+
const MCSubtargetInfo &STI,
394407
raw_ostream &O) {
395408
unsigned short Value = MI->getOperand(OpNo).getImm();
396409
assert(Value <= 1023 && "Invalid u10imm argument!");
397410
O << (unsigned short)Value;
398411
}
399412

400413
void PPCInstPrinter::printU12ImmOperand(const MCInst *MI, unsigned OpNo,
414+
const MCSubtargetInfo &STI,
401415
raw_ostream &O) {
402416
unsigned short Value = MI->getOperand(OpNo).getImm();
403417
assert(Value <= 4095 && "Invalid u12imm argument!");
404418
O << (unsigned short)Value;
405419
}
406420

407421
void PPCInstPrinter::printS16ImmOperand(const MCInst *MI, unsigned OpNo,
422+
const MCSubtargetInfo &STI,
408423
raw_ostream &O) {
409424
if (MI->getOperand(OpNo).isImm())
410425
O << (short)MI->getOperand(OpNo).getImm();
411426
else
412-
printOperand(MI, OpNo, O);
427+
printOperand(MI, OpNo, STI, O);
413428
}
414429

415430
void PPCInstPrinter::printS34ImmOperand(const MCInst *MI, unsigned OpNo,
431+
const MCSubtargetInfo &STI,
416432
raw_ostream &O) {
417433
if (MI->getOperand(OpNo).isImm()) {
418434
long long Value = MI->getOperand(OpNo).getImm();
419435
assert(isInt<34>(Value) && "Invalid s34imm argument!");
420436
O << (long long)Value;
421437
}
422438
else
423-
printOperand(MI, OpNo, O);
439+
printOperand(MI, OpNo, STI, O);
424440
}
425441

426442
void PPCInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo,
443+
const MCSubtargetInfo &STI,
427444
raw_ostream &O) {
428445
if (MI->getOperand(OpNo).isImm())
429446
O << (unsigned short)MI->getOperand(OpNo).getImm();
430447
else
431-
printOperand(MI, OpNo, O);
448+
printOperand(MI, OpNo, STI, O);
432449
}
433450

434451
void PPCInstPrinter::printBranchOperand(const MCInst *MI, uint64_t Address,
435-
unsigned OpNo, raw_ostream &O) {
452+
unsigned OpNo,
453+
const MCSubtargetInfo &STI,
454+
raw_ostream &O) {
436455
if (!MI->getOperand(OpNo).isImm())
437-
return printOperand(MI, OpNo, O);
456+
return printOperand(MI, OpNo, STI, O);
438457
int32_t Imm = SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2);
439458
if (PrintBranchImmAsAddress) {
440459
uint64_t Target = Address + Imm;
@@ -457,16 +476,16 @@ void PPCInstPrinter::printBranchOperand(const MCInst *MI, uint64_t Address,
457476
}
458477

459478
void PPCInstPrinter::printAbsBranchOperand(const MCInst *MI, unsigned OpNo,
479+
const MCSubtargetInfo &STI,
460480
raw_ostream &O) {
461481
if (!MI->getOperand(OpNo).isImm())
462-
return printOperand(MI, OpNo, O);
482+
return printOperand(MI, OpNo, STI, O);
463483

464484
O << SignExtend32<32>((unsigned)MI->getOperand(OpNo).getImm() << 2);
465485
}
466486

467-
468487
void PPCInstPrinter::printcrbitm(const MCInst *MI, unsigned OpNo,
469-
raw_ostream &O) {
488+
const MCSubtargetInfo &STI, raw_ostream &O) {
470489
unsigned CCReg = MI->getOperand(OpNo).getReg();
471490
unsigned RegNo;
472491
switch (CCReg) {
@@ -484,47 +503,51 @@ void PPCInstPrinter::printcrbitm(const MCInst *MI, unsigned OpNo,
484503
}
485504

486505
void PPCInstPrinter::printMemRegImm(const MCInst *MI, unsigned OpNo,
506+
const MCSubtargetInfo &STI,
487507
raw_ostream &O) {
488-
printS16ImmOperand(MI, OpNo, O);
508+
printS16ImmOperand(MI, OpNo, STI, O);
489509
O << '(';
490510
if (MI->getOperand(OpNo+1).getReg() == PPC::R0)
491511
O << "0";
492512
else
493-
printOperand(MI, OpNo+1, O);
513+
printOperand(MI, OpNo + 1, STI, O);
494514
O << ')';
495515
}
496516

497517
void PPCInstPrinter::printMemRegImm34PCRel(const MCInst *MI, unsigned OpNo,
518+
const MCSubtargetInfo &STI,
498519
raw_ostream &O) {
499-
printS34ImmOperand(MI, OpNo, O);
520+
printS34ImmOperand(MI, OpNo, STI, O);
500521
O << '(';
501-
printImmZeroOperand(MI, OpNo + 1, O);
522+
printImmZeroOperand(MI, OpNo + 1, STI, O);
502523
O << ')';
503524
}
504525

505526
void PPCInstPrinter::printMemRegImm34(const MCInst *MI, unsigned OpNo,
506-
raw_ostream &O) {
507-
printS34ImmOperand(MI, OpNo, O);
527+
const MCSubtargetInfo &STI,
528+
raw_ostream &O) {
529+
printS34ImmOperand(MI, OpNo, STI, O);
508530
O << '(';
509-
printOperand(MI, OpNo + 1, O);
531+
printOperand(MI, OpNo + 1, STI, O);
510532
O << ')';
511533
}
512534

513535
void PPCInstPrinter::printMemRegReg(const MCInst *MI, unsigned OpNo,
536+
const MCSubtargetInfo &STI,
514537
raw_ostream &O) {
515538
// When used as the base register, r0 reads constant zero rather than
516539
// the value contained in the register. For this reason, the darwin
517540
// assembler requires that we print r0 as 0 (no r) when used as the base.
518541
if (MI->getOperand(OpNo).getReg() == PPC::R0)
519542
O << "0";
520543
else
521-
printOperand(MI, OpNo, O);
544+
printOperand(MI, OpNo, STI, O);
522545
O << ", ";
523-
printOperand(MI, OpNo+1, O);
546+
printOperand(MI, OpNo + 1, STI, O);
524547
}
525548

526549
void PPCInstPrinter::printTLSCall(const MCInst *MI, unsigned OpNo,
527-
raw_ostream &O) {
550+
const MCSubtargetInfo &STI, raw_ostream &O) {
528551
// On PPC64, VariantKind is VK_None, but on PPC32, it's VK_PLT, and it must
529552
// come at the _end_ of the expression.
530553
const MCOperand &Op = MI->getOperand(OpNo);
@@ -544,7 +567,7 @@ void PPCInstPrinter::printTLSCall(const MCInst *MI, unsigned OpNo,
544567
if (RefExp->getKind() == MCSymbolRefExpr::VK_PPC_NOTOC)
545568
O << '@' << MCSymbolRefExpr::getVariantKindName(RefExp->getKind());
546569
O << '(';
547-
printOperand(MI, OpNo+1, O);
570+
printOperand(MI, OpNo + 1, STI, O);
548571
O << ')';
549572
if (RefExp->getKind() != MCSymbolRefExpr::VK_None &&
550573
RefExp->getKind() != MCSymbolRefExpr::VK_PPC_NOTOC)
@@ -602,7 +625,7 @@ bool PPCInstPrinter::showRegistersWithPrefix() const {
602625
}
603626

604627
void PPCInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
605-
raw_ostream &O) {
628+
const MCSubtargetInfo &STI, raw_ostream &O) {
606629
const MCOperand &Op = MI->getOperand(OpNo);
607630
if (Op.isReg()) {
608631
unsigned Reg = Op.getReg();
@@ -631,4 +654,3 @@ void PPCInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
631654
assert(Op.isExpr() && "unknown operand kind in printOperand");
632655
Op.getExpr()->print(O, &MAI);
633656
}
634-

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