[LegalizeVectorTypes] Preserve original MemoryOperand and MemVT when widening fixed vector load to vp_load. (llvm#109473)

Previously we were building a new memoperand with the size of the widened VT. This was causing a failure in our downstream with non-power of 2 vectorization. Alias analysis allowed rescheduling a 3 element vector load past 2 out of 3 scalar stores that overwrite what it was supposed to read.

Alias analysis considers it undefined behavior to read more than the size of the underlying object. There is an exception if the underying objects is sufficiently aligned, but that doesn't apply in my failing case.

Author: topperc

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

@@ -5857,11 +5857,10 @@ SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
     SDValue Mask = DAG.getAllOnesConstant(DL, WideMaskVT);
     SDValue EVL = DAG.getElementCount(DL, TLI.getVPExplicitVectorLengthTy(),
                                       LdVT.getVectorElementCount());
-    const auto *MMO = LD->getMemOperand();
     SDValue NewLoad =
-        DAG.getLoadVP(WideVT, DL, LD->getChain(), LD->getBasePtr(), Mask, EVL,
-                      MMO->getPointerInfo(), MMO->getAlign(), MMO->getFlags(),
-                      MMO->getAAInfo());
+        DAG.getLoadVP(LD->getAddressingMode(), ISD::NON_EXTLOAD, WideVT, DL,
+                      LD->getChain(), LD->getBasePtr(), LD->getOffset(), Mask,
+                      EVL, LD->getMemoryVT(), LD->getMemOperand());
 
     // Modified the chain - switch anything that used the old chain to use
     // the new one.