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[ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM
This patch upstreams support for the Arm-v8 Cortex-A78 and Cortex-X1 processors for AArch64 and ARM. In detail: - Adding cortex-a78 and cortex-x1 as cpu options for aarch64 and arm targets in clang - Adding Cortex-A78 and Cortex-X1 CPU names and ProcessorModels in llvm details of the CPU can be found here: https://www.arm.com/products/cortex-x https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a78 The following people contributed to this patch: - Luke Geeson - Mikhail Maltsev Reviewers: t.p.northover, dmgreen Reviewed By: dmgreen Subscribers: dmgreen, kristof.beyls, hiraditya, danielkiss, cfe-commits, llvm-commits, miyuki Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D83206
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‎clang/test/Driver/aarch64-cpus.c

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@@ -173,6 +173,10 @@
173173

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// RUN: %clang -target aarch64 -mcpu=cortex-a77 -### -c %s 2>&1 | FileCheck -check-prefix=CORTEX-A77 %s
175175
// CORTEX-A77: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a77"
176+
// RUN: %clang -target aarch64 -mcpu=cortex-x1 -### -c %s 2>&1 | FileCheck -check-prefix=CORTEXX1 %s
177+
// CORTEXX1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-x1"
178+
// RUN: %clang -target aarch64 -mcpu=cortex-a78 -### -c %s 2>&1 | FileCheck -check-prefix=CORTEXA78 %s
179+
// CORTEXA78: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a78"
176180

177181
// RUN: %clang -target aarch64_be -mcpu=exynos-m3 -### -c %s 2>&1 | FileCheck -check-prefix=M3 %s
178182
// RUN: %clang -target aarch64 -mbig-endian -mcpu=exynos-m3 -### -c %s 2>&1 | FileCheck -check-prefix=M3 %s

‎clang/test/Driver/arm-cortex-cpus.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -840,6 +840,18 @@
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// CHECK-CORTEX-A76AE-SOFT: "-target-feature" "+soft-float"
841841
// CHECK-CORTEX-A76AE-SOFT: "-target-feature" "+soft-float-abi"
842842

843+
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-x1 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-X1 %s
844+
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-x1 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-X1-MFPU %s
845+
// CHECK-CORTEX-X1: "-cc1"{{.*}} "-triple" "armv8.2a-{{.*}} "-target-cpu" "cortex-x1"
846+
// CHECK-CORTEX-X1-MFPU: "-cc1"{{.*}} "-target-feature" "+fp-armv8"
847+
// CHECK-CORTEX-X1-MFPU: "-target-feature" "+crypto"
848+
849+
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a78 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A78 %s
850+
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a78 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A78-MFPU %s
851+
// CHECK-CORTEX-A78: "-cc1"{{.*}} "-triple" "armv8.2a-{{.*}} "-target-cpu" "cortex-a78"
852+
// CHECK-CORTEX-A78-MFPU: "-cc1"{{.*}} "-target-feature" "+fp-armv8"
853+
// CHECK-CORTEX-A78-MFPU: "-target-feature" "+crypto"
854+
843855
// RUN: %clang -target arm -mcpu=cortex-m23 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV8MBASE %s
844856
// CHECK-CPUV8MBASE: "-cc1"{{.*}} "-triple" "thumbv8m.base-
845857

‎llvm/include/llvm/Support/AArch64TargetParser.def

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,12 @@ AARCH64_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
127127
AARCH64_CPU_NAME("cortex-a77", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
128128
(AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
129129
AArch64::AEK_SSBS))
130+
AARCH64_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
131+
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
132+
AArch64::AEK_SSBS))
133+
AARCH64_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
134+
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
135+
AArch64::AEK_SSBS))
130136
AARCH64_CPU_NAME("neoverse-e1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
131137
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_RAS |
132138
AArch64::AEK_RCPC | AArch64::AEK_SSBS))

‎llvm/include/llvm/Support/ARMTargetParser.def

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -294,6 +294,10 @@ ARM_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
294294
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
295295
ARM_CPU_NAME("cortex-a77", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
296296
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
297+
ARM_CPU_NAME("cortex-a78",ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
298+
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
299+
ARM_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
300+
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
297301
ARM_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
298302
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
299303
ARM_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)

‎llvm/lib/Support/Host.cpp

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Original file line numberDiff line numberDiff line change
@@ -205,6 +205,8 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
205205
.Case("0xd0a", "cortex-a75")
206206
.Case("0xd0b", "cortex-a76")
207207
.Case("0xd0d", "cortex-a77")
208+
.Case("0xd41", "cortex-a78")
209+
.Case("0xd44", "cortex-x1")
208210
.Case("0xd0c", "neoverse-n1")
209211
.Default("generic");
210212
}

‎llvm/lib/Target/AArch64/AArch64.td

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Original file line numberDiff line numberDiff line change
@@ -636,6 +636,36 @@ def ProcA77 : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
636636
FeatureDotProd
637637
]>;
638638

639+
def ProcA78 : SubtargetFeature<"cortex-a78", "ARMProcFamily",
640+
"CortexA78",
641+
"Cortex-A78 ARM processors", [
642+
HasV8_2aOps,
643+
FeatureCrypto,
644+
FeatureFPARMv8,
645+
FeatureFuseAES,
646+
FeatureNEON,
647+
FeatureRCPC,
648+
FeaturePerfMon,
649+
FeaturePostRAScheduler,
650+
FeatureSPE,
651+
FeatureFullFP16,
652+
FeatureSSBS,
653+
FeatureDotProd]>;
654+
655+
def ProcX1 : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
656+
"Cortex-X1 ARM processors", [
657+
HasV8_2aOps,
658+
FeatureCrypto,
659+
FeatureFPARMv8,
660+
FeatureFuseAES,
661+
FeatureNEON,
662+
FeatureRCPC,
663+
FeaturePerfMon,
664+
FeaturePostRAScheduler,
665+
FeatureSPE,
666+
FeatureFullFP16,
667+
FeatureDotProd]>;
668+
639669
def ProcA64FX : SubtargetFeature<"a64fx", "ARMProcFamily", "A64FX",
640670
"Fujitsu A64FX processors", [
641671
HasV8_2aOps,
@@ -978,6 +1008,8 @@ def : ProcessorModel<"cortex-a75", CortexA57Model, [ProcA75]>;
9781008
def : ProcessorModel<"cortex-a76", CortexA57Model, [ProcA76]>;
9791009
def : ProcessorModel<"cortex-a76ae", CortexA57Model, [ProcA76]>;
9801010
def : ProcessorModel<"cortex-a77", CortexA57Model, [ProcA77]>;
1011+
def : ProcessorModel<"cortex-a78", CortexA57Model, [ProcA78]>;
1012+
def : ProcessorModel<"cortex-x1", CortexA57Model, [ProcX1]>;
9811013
def : ProcessorModel<"neoverse-e1", CortexA53Model, [ProcNeoverseE1]>;
9821014
def : ProcessorModel<"neoverse-n1", CortexA57Model, [ProcNeoverseN1]>;
9831015
def : ProcessorModel<"exynos-m3", ExynosM3Model, [ProcExynosM3]>;

‎llvm/lib/Target/AArch64/AArch64Subtarget.cpp

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@@ -102,6 +102,8 @@ void AArch64Subtarget::initializeProperties() {
102102
case CortexA75:
103103
case CortexA76:
104104
case CortexA77:
105+
case CortexA78:
106+
case CortexX1:
105107
PrefFunctionLogAlignment = 4;
106108
break;
107109
case A64FX:

‎llvm/lib/Target/AArch64/AArch64Subtarget.h

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@@ -56,6 +56,8 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
5656
CortexA75,
5757
CortexA76,
5858
CortexA77,
59+
CortexA78,
60+
CortexX1,
5961
ExynosM3,
6062
Falkor,
6163
Kryo,

‎llvm/lib/Target/ARM/ARM.td

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@@ -596,6 +596,10 @@ def ProcA76 : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
596596
"Cortex-A76 ARM processors", []>;
597597
def ProcA77 : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
598598
"Cortex-A77 ARM processors", []>;
599+
def ProcA78 : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
600+
"Cortex-A78 ARM processors", []>;
601+
def ProcX1 : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
602+
"Cortex-X1 ARM processors", []>;
599603

600604
def ProcKrait : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
601605
"Qualcomm Krait processors", []>;
@@ -1234,6 +1238,22 @@ def : ProcNoItin<"cortex-a77", [ARMv82a, ProcA77,
12341238
FeatureFullFP16,
12351239
FeatureDotProd]>;
12361240

1241+
def : ProcNoItin<"cortex-a78", [ARMv82a, ProcA78,
1242+
FeatureHWDivThumb,
1243+
FeatureHWDivARM,
1244+
FeatureCrypto,
1245+
FeatureCRC,
1246+
FeatureFullFP16,
1247+
FeatureDotProd]>;
1248+
1249+
def : ProcNoItin<"cortex-x1", [ARMv82a, ProcX1,
1250+
FeatureHWDivThumb,
1251+
FeatureHWDivARM,
1252+
FeatureCrypto,
1253+
FeatureCRC,
1254+
FeatureFullFP16,
1255+
FeatureDotProd]>;
1256+
12371257
def : ProcNoItin<"neoverse-n1", [ARMv82a,
12381258
FeatureHWDivThumb,
12391259
FeatureHWDivARM,

‎llvm/lib/Target/ARM/ARMSubtarget.cpp

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@@ -293,12 +293,14 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
293293
case CortexA75:
294294
case CortexA76:
295295
case CortexA77:
296+
case CortexA78:
296297
case CortexR4:
297298
case CortexR4F:
298299
case CortexR5:
299300
case CortexR7:
300301
case CortexM3:
301302
case CortexR52:
303+
case CortexX1:
302304
break;
303305
case Exynos:
304306
LdStMultipleTiming = SingleIssuePlusExtras;

‎llvm/lib/Target/ARM/ARMSubtarget.h

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@@ -62,6 +62,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
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CortexA75,
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CortexA76,
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CortexA77,
65+
CortexA78,
6566
CortexA8,
6667
CortexA9,
6768
CortexM3,
@@ -70,6 +71,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
7071
CortexR5,
7172
CortexR52,
7273
CortexR7,
74+
CortexX1,
7375
Exynos,
7476
Krait,
7577
Kryo,

‎llvm/test/CodeGen/AArch64/cpus.ll

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@@ -16,6 +16,8 @@
1616
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a76ae 2>&1 | FileCheck %s
1717
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a76 2>&1 | FileCheck %s
1818
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a77 2>&1 | FileCheck %s
19+
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a78 2>&1 | FileCheck %s
20+
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-x1 2>&1 | FileCheck %s
1921
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=neoverse-e1 2>&1 | FileCheck %s
2022
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=neoverse-n1 2>&1 | FileCheck %s
2123
; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m3 2>&1 | FileCheck %s

‎llvm/test/CodeGen/AArch64/remat.ll

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@@ -9,6 +9,8 @@
99
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a73 -o - %s | FileCheck %s
1010
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a75 -o - %s | FileCheck %s
1111
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a77 -o - %s | FileCheck %s
12+
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a78 -o - %s | FileCheck %s
13+
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-x1 -o - %s | FileCheck %s
1214
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=neoverse-e1 -o - %s | FileCheck %s
1315
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=neoverse-n1 -o - %s | FileCheck %s
1416
; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=exynos-m3 -o - %s | FileCheck %s

‎llvm/test/MC/AArch64/armv8.2a-dotprod.s

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@@ -5,6 +5,8 @@
55
// RUN: llvm-mc -triple aarch64 -mcpu=cortex-a75 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
66
// RUN: llvm-mc -triple aarch64 -mcpu=cortex-a76 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
77
// RUN: llvm-mc -triple aarch64 -mcpu=cortex-a77 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
8+
// RUN: llvm-mc -triple aarch64 -mcpu=cortex-a78 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
9+
// RUN: llvm-mc -triple aarch64 -mcpu=cortex-x1 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
810
// RUN: llvm-mc -triple aarch64 -mcpu=neoverse-e1 -show-encoding < %s| FileCheck %s --check-prefix=CHECK-DOTPROD
911
// RUN: llvm-mc -triple aarch64 -mcpu=neoverse-n1 -show-encoding < %s| FileCheck %s --check-prefix=CHECK-DOTPROD
1012
// RUN: llvm-mc -triple aarch64 -mcpu=tsv110 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
@@ -19,6 +21,10 @@
1921
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
2022
// RUN: not llvm-mc -triple aarch64 -mcpu=cortex-a77 -mattr=-dotprod -show-encoding < %s 2> %t
2123
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
24+
// RUN: not llvm-mc -triple aarch64 -mcpu=cortex-a78 -mattr=-dotprod -show-encoding < %s 2> %t
25+
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
26+
// RUN: not llvm-mc -triple aarch64 -mcpu=cortex-x1 -mattr=-dotprod -show-encoding < %s 2> %t
27+
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
2228
// RUN: not llvm-mc -triple aarch64 -mcpu=neoverse-n1 -mattr=-dotprod -show-encoding < %s 2> %t
2329
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
2430

‎llvm/test/MC/ARM/armv8.2a-dotprod-a32.s

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Original file line numberDiff line numberDiff line change
@@ -4,11 +4,17 @@
44
// RUN: llvm-mc -triple arm -mcpu=cortex-a76 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
55
// RUN: llvm-mc -triple arm -mcpu=neoverse-n1 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
66
// RUN: llvm-mc -triple arm -mcpu=cortex-a77 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
7+
// RUN: llvm-mc -triple arm -mcpu=cortex-a78 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
8+
// RUN: llvm-mc -triple arm -mcpu=cortex-x1 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
79

810
// RUN: not llvm-mc -triple arm -mattr=-dotprod -show-encoding < %s 2> %t
911
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
1012
// RUN: not llvm-mc -triple arm -mcpu=cortex-a77 -mattr=-dotprod -show-encoding < %s 2> %t
1113
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
14+
// RUN: not llvm-mc -triple arm -mcpu=cortex-a78 -mattr=-dotprod -show-encoding < %s 2> %t
15+
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
16+
// RUN: not llvm-mc -triple arm -mcpu=cortex-x1 -mattr=-dotprod -show-encoding < %s 2> %t
17+
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
1218
// RUN: not llvm-mc -triple arm -show-encoding < %s 2> %t
1319
// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
1420
// RUN: not llvm-mc -triple arm -mattr=+v8.1a -show-encoding < %s 2> %t

‎llvm/test/MC/ARM/armv8.2a-dotprod-t32.s

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@
33
// RUN: llvm-mc -triple thumb -mcpu=cortex-a75 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
44
// RUN: llvm-mc -triple thumb -mcpu=cortex-a76 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
55
// RUN: llvm-mc -triple thumb -mcpu=cortex-a77 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
6+
// RUN: llvm-mc -triple thumb -mcpu=cortex-a78 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
7+
// RUN: llvm-mc -triple thumb -mcpu=cortex-x1 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
68
// RUN: llvm-mc -triple thumb -mcpu=neoverse-n1 -show-encoding < %s | FileCheck %s --check-prefix=CHECK
79

810
// RUN: not llvm-mc -triple thumb -mattr=-dotprod -show-encoding < %s 2> %t

‎llvm/test/MC/Disassembler/AArch64/armv8.3a-rcpc.txt

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Original file line numberDiff line numberDiff line change
@@ -5,6 +5,8 @@
55
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a65ae --disassemble < %s | FileCheck %s
66
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 --disassemble < %s | FileCheck %s
77
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a77 --disassemble < %s | FileCheck %s
8+
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a78 --disassemble < %s | FileCheck %s
9+
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-x1 --disassemble < %s | FileCheck %s
810
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=neoverse-e1 --disassemble < %s | FileCheck %s
911
# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=neoverse-n1 --disassemble < %s | FileCheck %s
1012

‎llvm/unittests/Support/TargetParserTest.cpp

Lines changed: 28 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -262,6 +262,18 @@ TEST(TargetParserTest, testARMCPU) {
262262
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_FP16 |
263263
ARM::AEK_RAS | ARM::AEK_DOTPROD,
264264
"8.2-A"));
265+
EXPECT_TRUE(testARMCPU("cortex-a78", "armv8.2-a", "crypto-neon-fp-armv8",
266+
ARM::AEK_DOTPROD | ARM::AEK_FP16 |
267+
ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
268+
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
269+
ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS,
270+
"8.2-A"));
271+
EXPECT_TRUE(testARMCPU("cortex-x1", "armv8.2-a", "crypto-neon-fp-armv8",
272+
ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_DOTPROD |
273+
ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
274+
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
275+
ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS,
276+
"8.2-A"));
265277
EXPECT_TRUE(testARMCPU("neoverse-n1", "armv8.2-a", "crypto-neon-fp-armv8",
266278
ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
267279
ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
@@ -310,7 +322,7 @@ TEST(TargetParserTest, testARMCPU) {
310322
"7-S"));
311323
}
312324

313-
static constexpr unsigned NumARMCPUArchs = 87;
325+
static constexpr unsigned NumARMCPUArchs = 89;
314326

315327
TEST(TargetParserTest, testARMCPUArchList) {
316328
SmallVector<StringRef, NumARMCPUArchs> List;
@@ -864,6 +876,20 @@ TEST(TargetParserTest, testAArch64CPU) {
864876
AArch64::AEK_RDM | AArch64::AEK_SIMD | AArch64::AEK_RAS |
865877
AArch64::AEK_LSE | AArch64::AEK_FP16 | AArch64::AEK_DOTPROD |
866878
AArch64::AEK_RCPC | AArch64::AEK_SSBS, "8.2-A"));
879+
EXPECT_TRUE(testAArch64CPU(
880+
"cortex-a78", "armv8.2-a", "crypto-neon-fp-armv8",
881+
AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
882+
AArch64::AEK_RDM | AArch64::AEK_SIMD | AArch64::AEK_RAS |
883+
AArch64::AEK_LSE | AArch64::AEK_FP16 | AArch64::AEK_DOTPROD |
884+
AArch64::AEK_RCPC | AArch64::AEK_SSBS,
885+
"8.2-A"));
886+
EXPECT_TRUE(testAArch64CPU(
887+
"cortex-x1", "armv8.2-a", "crypto-neon-fp-armv8",
888+
AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
889+
AArch64::AEK_RDM | AArch64::AEK_SIMD | AArch64::AEK_RAS |
890+
AArch64::AEK_LSE | AArch64::AEK_FP16 | AArch64::AEK_DOTPROD |
891+
AArch64::AEK_RCPC | AArch64::AEK_SSBS,
892+
"8.2-A"));
867893
EXPECT_TRUE(testAArch64CPU(
868894
"cyclone", "armv8-a", "crypto-neon-fp-armv8",
869895
AArch64::AEK_CRYPTO | AArch64::AEK_FP | AArch64::AEK_SIMD, "8-A"));
@@ -1002,7 +1028,7 @@ TEST(TargetParserTest, testAArch64CPU) {
10021028
"8.2-A"));
10031029
}
10041030

1005-
static constexpr unsigned NumAArch64CPUArchs = 40;
1031+
static constexpr unsigned NumAArch64CPUArchs = 42;
10061032

10071033
TEST(TargetParserTest, testAArch64CPUArchList) {
10081034
SmallVector<StringRef, NumAArch64CPUArchs> List;

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