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[llvm-objdump] --adjust-vma: Call getInstruction with adjusted address
llvm-objdump currently calls MCDisassembler::getInstruction with unadjusted address and MCInstPrinter::printInst with adjusted address. The decoded branch targets will be adjusted as expected for most targets (as the getInstruction address is insignificant) but not for SystemZ (where the getInstruction address is displayed). Specify an adjust address to fix SystemZInstPrinter output. The added test utilizes llvm/utils/update_test_body.py to make updates easier and additionally checks that we don't adjust SHN_ABS symbol addresses. Pull Request: llvm#140471
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## SystemZDisassembler sets the branch target information during getInstruction instead of printInst.
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## Test we display the branch targets correctly in the presence of --adjust-vma.
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# RUN: rm -rf %t && split-file %s %t && cd %t
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# RUN: yaml2obj a.yaml -o out
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# RUN: llvm-objdump -td --adjust-vma=0x200000 --no-show-raw-insn out | FileCheck %s --match-full-lines
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# CHECK: SYMBOL TABLE:
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# CHECK-NEXT: 0000000001200104 l .text 0000000000000000 f1
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# CHECK-NEXT: 0000000001200106 l .text 0000000000000000 f2
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# CHECK-NEXT: 0000000000000800 l *ABS* 0000000000000000 abs
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# CHECK: 00000000012000f8 <_start>:
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# CHECK-NEXT: 12000f8: brasl %r14, 0x1200104
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# CHECK-NEXT: 12000fe: brasl %r14, 0x1200106
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# CHECK-EMPTY:
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# CHECK-NEXT: 0000000001200104 <f1>:
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# CHECK-NEXT: 1200104: br %r14
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# CHECK-EMPTY:
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# CHECK-NEXT: 0000000001200106 <f2>:
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# CHECK-NEXT: 1200106: br %r14
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#--- a.s
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.globl _start
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_start:
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brasl %r14, f1
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brasl %r14, f2
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f1:
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br %r14
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f2:
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br %r14
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abs = 0x800
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#--- gen
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LLD_IN_TEST=1 clang --target=s390x-linux -no-pie -nostdlib -Wl,--no-rosegment,-zseparate-code,-znorelro,-znognustack -fuse-ld=lld a.s -o a
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obj2yaml a
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#--- a.yaml
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--- !ELF
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FileHeader:
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Class: ELFCLASS64
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Data: ELFDATA2MSB
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Type: ET_EXEC
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Machine: EM_S390
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Entry: 0x10000F8
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ProgramHeaders:
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- Type: PT_PHDR
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Flags: [ PF_R ]
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VAddr: 0x1000040
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Align: 0x8
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Offset: 0x40
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- Type: PT_INTERP
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Flags: [ PF_R ]
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FirstSec: .interp
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LastSec: .interp
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VAddr: 0x10000E8
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Offset: 0xE8
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- Type: PT_LOAD
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Flags: [ PF_X, PF_R ]
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FirstSec: .interp
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LastSec: .text
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VAddr: 0x1000000
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Align: 0x1000
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Offset: 0x0
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Sections:
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- Name: .interp
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC ]
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Address: 0x10000E8
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AddressAlign: 0x1
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Content: 2F6C69622F6C6436342E736F2E3100
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- Name: .text
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
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Address: 0x10000F8
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AddressAlign: 0x4
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Content: C0E500000006C0E50000000407FE07FE
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- Name: .comment
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Type: SHT_PROGBITS
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Flags: [ SHF_MERGE, SHF_STRINGS ]
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AddressAlign: 0x1
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EntSize: 0x1
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Offset: 0x1000
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Content: 4C696E6B65723A204C4C442032312E302E3000
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Symbols:
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- Name: f1
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Section: .text
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Value: 0x1000104
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- Name: f2
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Section: .text
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Value: 0x1000106
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- Name: abs
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Index: SHN_ABS
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Value: 0x800
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- Name: _start
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Section: .text
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Binding: STB_GLOBAL
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Value: 0x10000F8
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...

llvm/test/tools/llvm-objdump/X86/elf-disassemble-symbololize-operands.yaml

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# RUN: llvm-objdump %t -d --symbolize-operands -M att --no-show-raw-insn --no-leading-addr | \
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# RUN: FileCheck %s --match-full-lines --check-prefix=ATT
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# RUN: llvm-objdump %t -d --symbolize-operands -M intel --no-show-raw-insn --no-leading-addr --adjust-vma=0x2000 | \
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# RUN: FileCheck %s --match-full-lines --check-prefix=INTEL
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## Expect to find the branch labels and global variable name.
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# ATT: <_start>:
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# ATT-NEXT: pushq %rax

llvm/tools/llvm-objdump/llvm-objdump.cpp

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// provided
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MCInst Inst;
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ArrayRef<uint8_t> ThisBytes = Bytes.slice(Index);
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uint64_t ThisAddr = SectionAddr + Index;
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uint64_t ThisAddr = SectionAddr + Index + VMAAdjustment;
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bool Disassembled = DT->DisAsm->getInstruction(
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Inst, Size, ThisBytes, ThisAddr, CommentStream);
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if (Size == 0)

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