|
8 | 8 | ; CHECK: Loop: Loop at depth 2 containing: %for.body3<header><latch><exiting>
|
9 | 9 | ; CHECK-NEXT: Loop Versioning found to be beneficial
|
10 | 10 |
|
11 |
| -define i32 @foo(i32* nocapture %var1, i32* nocapture readnone %var2, i32* nocapture %var3, i32 %itr) #0 { |
| 11 | +define i32 @foo(ptr nocapture %var1, ptr nocapture readnone %var2, ptr nocapture %var3, i32 %itr) #0 { |
12 | 12 | ; CHECK-LABEL: @foo(
|
13 | 13 | ; CHECK-NEXT: entry:
|
14 | 14 | ; CHECK-NEXT: [[CMP14:%.*]] = icmp eq i32 [[ITR:%.*]], 0
|
15 | 15 | ; CHECK-NEXT: br i1 [[CMP14]], label [[FOR_END13:%.*]], label [[FOR_COND1_PREHEADER_PREHEADER:%.*]]
|
16 | 16 | ; CHECK: for.cond1.preheader.preheader:
|
17 |
| -; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i32, i32* [[VAR1:%.*]], i64 1 |
| 17 | +; CHECK-NEXT: [[UGLYGEP1:%.*]] = getelementptr i8, ptr [[VAR1:%.*]], i64 4 |
18 | 18 | ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[ITR]], -1
|
19 | 19 | ; CHECK-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
|
20 | 20 | ; CHECK: for.cond1.preheader:
|
21 | 21 | ; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_PREHEADER]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_INC11:%.*]] ]
|
22 | 22 | ; CHECK-NEXT: [[J_016:%.*]] = phi i32 [ [[J_1_LCSSA:%.*]], [[FOR_INC11]] ], [ 0, [[FOR_COND1_PREHEADER_PREHEADER]] ]
|
23 | 23 | ; CHECK-NEXT: [[I_015:%.*]] = phi i32 [ [[INC12:%.*]], [[FOR_INC11]] ], [ 0, [[FOR_COND1_PREHEADER_PREHEADER]] ]
|
24 |
| -; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i32, i32* [[VAR3:%.*]], i64 [[INDVAR]] |
25 |
| -; CHECK-NEXT: [[SCEVGEP56:%.*]] = bitcast i32* [[SCEVGEP5]] to i8* |
26 |
| -; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDVAR]], 1 |
27 |
| -; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr i32, i32* [[VAR3]], i64 [[TMP1]] |
28 |
| -; CHECK-NEXT: [[SCEVGEP78:%.*]] = bitcast i32* [[SCEVGEP7]] to i8* |
| 24 | +; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[INDVAR]], 2 |
| 25 | +; CHECK-NEXT: [[UGLYGEP3:%.*]] = getelementptr i8, ptr [[VAR3:%.*]], i64 [[TMP1]] |
| 26 | +; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 4 |
| 27 | +; CHECK-NEXT: [[UGLYGEP4:%.*]] = getelementptr i8, ptr [[VAR3]], i64 [[TMP2]] |
29 | 28 | ; CHECK-NEXT: [[CMP212:%.*]] = icmp ult i32 [[J_016]], [[ITR]]
|
30 | 29 | ; CHECK-NEXT: br i1 [[CMP212]], label [[FOR_BODY3_LVER_CHECK:%.*]], label [[FOR_INC11]]
|
31 | 30 | ; CHECK: for.body3.lver.check:
|
32 | 31 | ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[I_015]], [[ITR]]
|
33 | 32 | ; CHECK-NEXT: [[IDXPROM6:%.*]] = zext i32 [[I_015]] to i64
|
34 |
| -; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[VAR3]], i64 [[IDXPROM6]] |
35 |
| -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[J_016]] to i64 |
36 |
| -; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[VAR1]], i64 [[TMP2]] |
37 |
| -; CHECK-NEXT: [[SCEVGEP1:%.*]] = bitcast i32* [[SCEVGEP]] to i8* |
38 |
| -; CHECK-NEXT: [[TMP3:%.*]] = sub i32 [[TMP0]], [[J_016]] |
39 |
| -; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP3]] to i64 |
40 |
| -; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[TMP2]], [[TMP4]] |
41 |
| -; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i32, i32* [[SCEVGEP2]], i64 [[TMP5]] |
42 |
| -; CHECK-NEXT: [[SCEVGEP34:%.*]] = bitcast i32* [[SCEVGEP3]] to i8* |
43 |
| -; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[SCEVGEP1]], [[SCEVGEP78]] |
44 |
| -; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[SCEVGEP56]], [[SCEVGEP34]] |
| 33 | +; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, ptr [[VAR3]], i64 [[IDXPROM6]] |
| 34 | +; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[J_016]] to i64 |
| 35 | +; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[TMP3]], 2 |
| 36 | +; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr [[VAR1]], i64 [[TMP4]] |
| 37 | +; CHECK-NEXT: [[TMP5:%.*]] = sub i32 [[TMP0]], [[J_016]] |
| 38 | +; CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP5]] to i64 |
| 39 | +; CHECK-NEXT: [[TMP7:%.*]] = shl nuw nsw i64 [[TMP6]], 2 |
| 40 | +; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP4]], [[TMP7]] |
| 41 | +; CHECK-NEXT: [[UGLYGEP2:%.*]] = getelementptr i8, ptr [[UGLYGEP1]], i64 [[TMP8]] |
| 42 | +; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[UGLYGEP]], [[UGLYGEP4]] |
| 43 | +; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[UGLYGEP3]], [[UGLYGEP2]] |
45 | 44 | ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
|
46 | 45 | ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[FOR_BODY3_PH_LVER_ORIG:%.*]], label [[FOR_BODY3_PH:%.*]]
|
47 | 46 | ; CHECK: for.body3.ph.lver.orig:
|
48 | 47 | ; CHECK-NEXT: br label [[FOR_BODY3_LVER_ORIG:%.*]]
|
49 | 48 | ; CHECK: for.body3.lver.orig:
|
50 | 49 | ; CHECK-NEXT: [[J_113_LVER_ORIG:%.*]] = phi i32 [ [[J_016]], [[FOR_BODY3_PH_LVER_ORIG]] ], [ [[INC_LVER_ORIG:%.*]], [[FOR_BODY3_LVER_ORIG]] ]
|
51 | 50 | ; CHECK-NEXT: [[IDXPROM_LVER_ORIG:%.*]] = zext i32 [[J_113_LVER_ORIG]] to i64
|
52 |
| -; CHECK-NEXT: [[ARRAYIDX_LVER_ORIG:%.*]] = getelementptr inbounds i32, i32* [[VAR1]], i64 [[IDXPROM_LVER_ORIG]] |
53 |
| -; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX_LVER_ORIG]], align 4 |
54 |
| -; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4 |
55 |
| -; CHECK-NEXT: [[ADD8_LVER_ORIG:%.*]] = add nsw i32 [[TMP6]], [[ADD]] |
56 |
| -; CHECK-NEXT: store i32 [[ADD8_LVER_ORIG]], i32* [[ARRAYIDX7]], align 4 |
| 51 | +; CHECK-NEXT: [[ARRAYIDX_LVER_ORIG:%.*]] = getelementptr inbounds i32, ptr [[VAR1]], i64 [[IDXPROM_LVER_ORIG]] |
| 52 | +; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX_LVER_ORIG]], align 4 |
| 53 | +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4 |
| 54 | +; CHECK-NEXT: [[ADD8_LVER_ORIG:%.*]] = add nsw i32 [[TMP9]], [[ADD]] |
| 55 | +; CHECK-NEXT: store i32 [[ADD8_LVER_ORIG]], ptr [[ARRAYIDX7]], align 4 |
57 | 56 | ; CHECK-NEXT: [[INC_LVER_ORIG]] = add nuw i32 [[J_113_LVER_ORIG]], 1
|
58 | 57 | ; CHECK-NEXT: [[CMP2_LVER_ORIG:%.*]] = icmp ult i32 [[INC_LVER_ORIG]], [[ITR]]
|
59 | 58 | ; CHECK-NEXT: br i1 [[CMP2_LVER_ORIG]], label [[FOR_BODY3_LVER_ORIG]], label [[FOR_INC11_LOOPEXIT_LOOPEXIT:%.*]], !llvm.loop [[LOOP0:![0-9]+]]
|
60 | 59 | ; CHECK: for.body3.ph:
|
61 |
| -; CHECK-NEXT: [[ARRAYIDX7_PROMOTED:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4, !alias.scope !2, !noalias !2 |
| 60 | +; CHECK-NEXT: [[ARRAYIDX7_PROMOTED:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4, !alias.scope !2, !noalias !2 |
62 | 61 | ; CHECK-NEXT: br label [[FOR_BODY3:%.*]]
|
63 | 62 | ; CHECK: for.body3:
|
64 |
| -; CHECK-NEXT: [[ADD810:%.*]] = phi i32 [ [[ARRAYIDX7_PROMOTED]], [[FOR_BODY3_PH]] ], [ [[ADD8:%.*]], [[FOR_BODY3]] ] |
| 63 | +; CHECK-NEXT: [[ADD86:%.*]] = phi i32 [ [[ARRAYIDX7_PROMOTED]], [[FOR_BODY3_PH]] ], [ [[ADD8:%.*]], [[FOR_BODY3]] ] |
65 | 64 | ; CHECK-NEXT: [[J_113:%.*]] = phi i32 [ [[J_016]], [[FOR_BODY3_PH]] ], [ [[INC:%.*]], [[FOR_BODY3]] ]
|
66 | 65 | ; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[J_113]] to i64
|
67 |
| -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VAR1]], i64 [[IDXPROM]] |
68 |
| -; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX]], align 4, !alias.scope !2, !noalias !2 |
69 |
| -; CHECK-NEXT: [[ADD8]] = add nsw i32 [[ADD810]], [[ADD]] |
| 66 | +; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VAR1]], i64 [[IDXPROM]] |
| 67 | +; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX]], align 4, !alias.scope !2, !noalias !2 |
| 68 | +; CHECK-NEXT: [[ADD8]] = add nsw i32 [[ADD86]], [[ADD]] |
70 | 69 | ; CHECK-NEXT: [[INC]] = add nuw i32 [[J_113]], 1
|
71 | 70 | ; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[INC]], [[ITR]]
|
72 |
| -; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY3]], label [[FOR_INC11_LOOPEXIT_LOOPEXIT9:%.*]], !llvm.loop [[LOOP5:![0-9]+]] |
| 71 | +; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY3]], label [[FOR_INC11_LOOPEXIT_LOOPEXIT5:%.*]], !llvm.loop [[LOOP5:![0-9]+]] |
73 | 72 | ; CHECK: for.inc11.loopexit.loopexit:
|
74 | 73 | ; CHECK-NEXT: br label [[FOR_INC11_LOOPEXIT:%.*]]
|
75 |
| -; CHECK: for.inc11.loopexit.loopexit9: |
| 74 | +; CHECK: for.inc11.loopexit.loopexit5: |
76 | 75 | ; CHECK-NEXT: [[ADD8_LCSSA:%.*]] = phi i32 [ [[ADD8]], [[FOR_BODY3]] ]
|
77 |
| -; CHECK-NEXT: store i32 [[ADD8_LCSSA]], i32* [[ARRAYIDX7]], align 4, !alias.scope !2, !noalias !2 |
| 76 | +; CHECK-NEXT: store i32 [[ADD8_LCSSA]], ptr [[ARRAYIDX7]], align 4, !alias.scope !2, !noalias !2 |
78 | 77 | ; CHECK-NEXT: br label [[FOR_INC11_LOOPEXIT]]
|
79 | 78 | ; CHECK: for.inc11.loopexit:
|
80 | 79 | ; CHECK-NEXT: br label [[FOR_INC11]]
|
@@ -105,17 +104,17 @@ for.cond1.preheader: ; preds = %for.cond1.preheader
|
105 | 104 | for.body3.lr.ph: ; preds = %for.cond1.preheader
|
106 | 105 | %add = add i32 %i.015, %itr
|
107 | 106 | %idxprom6 = zext i32 %i.015 to i64
|
108 |
| - %arrayidx7 = getelementptr inbounds i32, i32* %var3, i64 %idxprom6 |
| 107 | + %arrayidx7 = getelementptr inbounds i32, ptr %var3, i64 %idxprom6 |
109 | 108 | br label %for.body3
|
110 | 109 |
|
111 | 110 | for.body3: ; preds = %for.body3.lr.ph, %for.body3
|
112 | 111 | %j.113 = phi i32 [ %j.016, %for.body3.lr.ph ], [ %inc, %for.body3 ]
|
113 | 112 | %idxprom = zext i32 %j.113 to i64
|
114 |
| - %arrayidx = getelementptr inbounds i32, i32* %var1, i64 %idxprom |
115 |
| - store i32 %add, i32* %arrayidx, align 4 |
116 |
| - %0 = load i32, i32* %arrayidx7, align 4 |
| 113 | + %arrayidx = getelementptr inbounds i32, ptr %var1, i64 %idxprom |
| 114 | + store i32 %add, ptr %arrayidx, align 4 |
| 115 | + %0 = load i32, ptr %arrayidx7, align 4 |
117 | 116 | %add8 = add nsw i32 %0, %add
|
118 |
| - store i32 %add8, i32* %arrayidx7, align 4 |
| 117 | + store i32 %add8, ptr %arrayidx7, align 4 |
119 | 118 | %inc = add nuw i32 %j.113, 1
|
120 | 119 | %cmp2 = icmp ult i32 %inc, %itr
|
121 | 120 | br i1 %cmp2, label %for.body3, label %for.inc11.loopexit
|
|
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