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[AMDGPU] Avoid repeated hash lookups (NFC) (llvm#126001)
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llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2174,12 +2174,13 @@ bool SILoadStoreOptimizer::promoteConstantOffsetToImm(
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// Step1: Find the base-registers and a 64bit constant offset.
21762176
MachineOperand &Base = *TII->getNamedOperand(MI, AMDGPU::OpName::vaddr);
2177+
auto [It, Inserted] = Visited.try_emplace(&MI);
21772178
MemAddress MAddr;
2178-
if (!Visited.contains(&MI)) {
2179+
if (Inserted) {
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processBaseWithConstOffset(Base, MAddr);
2180-
Visited[&MI] = MAddr;
2181+
It->second = MAddr;
21812182
} else
2182-
MAddr = Visited[&MI];
2183+
MAddr = It->second;
21832184

21842185
if (MAddr.Offset == 0) {
21852186
LLVM_DEBUG(dbgs() << " Failed to extract constant-offset or there are no"
@@ -2239,11 +2240,12 @@ bool SILoadStoreOptimizer::promoteConstantOffsetToImm(
22392240
const MachineOperand &BaseNext =
22402241
*TII->getNamedOperand(MINext, AMDGPU::OpName::vaddr);
22412242
MemAddress MAddrNext;
2242-
if (!Visited.contains(&MINext)) {
2243+
auto [It, Inserted] = Visited.try_emplace(&MINext);
2244+
if (Inserted) {
22432245
processBaseWithConstOffset(BaseNext, MAddrNext);
2244-
Visited[&MINext] = MAddrNext;
2246+
It->second = MAddrNext;
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} else
2246-
MAddrNext = Visited[&MINext];
2248+
MAddrNext = It->second;
22472249

22482250
if (MAddrNext.Base.LoReg != MAddr.Base.LoReg ||
22492251
MAddrNext.Base.HiReg != MAddr.Base.HiReg ||

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