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[SVE] Don't consider scalable vector types in SLPVectorizerPass::vectorizeChainsInBlock
In vectorizeChainsInBlock we try to collect chains of PHI nodes that have the same element type, but the code is relying upon the implicit conversion from TypeSize -> uint64_t. For now, I have modified the code to ignore PHI nodes with scalable types. Differential Revision: https://reviews.llvm.org/D83542
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+38
-3
lines changed

2 files changed

+38
-3
lines changed

llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7398,8 +7398,17 @@ bool SLPVectorizerPass::vectorizeChainsInBlock(BasicBlock *BB, BoUpSLP &R) {
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// Look for the next elements with the same type.
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SmallVector<Value *, 4>::iterator SameTypeIt = IncIt;
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Type *EltTy = (*IncIt)->getType();
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unsigned EltSize = EltTy->isSized() ? DL->getTypeSizeInBits(EltTy)
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: MaxVecRegSize;
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assert(EltTy->isSized() &&
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"Instructions should all be sized at this point");
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TypeSize EltTS = DL->getTypeSizeInBits(EltTy);
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if (EltTS.isScalable()) {
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// For now, just ignore vectorizing scalable types.
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++IncIt;
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continue;
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}
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unsigned EltSize = EltTS.getFixedSize();
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unsigned MaxNumElts = MaxVecRegSize / EltSize;
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if (MaxNumElts < 2) {
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++IncIt;

llvm/test/Transforms/SLPVectorizer/AArch64/scalable-vector.ll

Lines changed: 27 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2-
; RUN: opt < %s -slp-vectorizer -S | FileCheck %s
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; RUN: opt < %s -slp-vectorizer -S 2>%t | FileCheck %s
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; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
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; WARN-NOT: warning
36

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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-linux-gnu"
@@ -21,5 +24,28 @@ define void @test() {
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ret void
2225
}
2326

27+
define <vscale x 4 x i32> @scalable_phi(<vscale x 4 x i32> %a, i32 %b) {
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; CHECK-LABEL: @scalable_phi(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[B:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[RETVAL:%.*]] = phi <vscale x 4 x i32> [ [[A:%.*]], [[ENTRY:%.*]] ], [ zeroinitializer, [[IF_THEN]] ]
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; CHECK-NEXT: ret <vscale x 4 x i32> [[RETVAL]]
37+
;
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entry:
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%cmp = icmp eq i32 %b, 0
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br i1 %cmp, label %if.then, label %end
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if.then:
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br label %end
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end:
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%retval = phi <vscale x 4 x i32> [ %a, %entry ], [ zeroinitializer, %if.then ]
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ret <vscale x 4 x i32> %retval
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}
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declare <vscale x 16 x i8> @llvm.masked.load.nxv16i8.p0nxv16i8(<vscale x 16 x i8>*, i32 immarg, <vscale x 16 x i1>, <vscale x 16 x i8>)
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declare void @llvm.masked.store.nxv16i8.p0nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>*, i32 immarg, <vscale x 16 x i1>)

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