4
4
; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v -riscv-v-vector-bits-min=128 \
5
5
; RUN: -verify-machineinstrs < %s | FileCheck %s
6
6
7
- declare <2 x i8 > @llvm.vp.load.v2i8 (<2 x i8 >*, <2 x i1 >, i32 )
7
+ declare <2 x i8 > @llvm.vp.load.v2i8.p0v2i8 (<2 x i8 >*, <2 x i1 >, i32 )
8
8
9
9
define <2 x i8 > @vpload_v2i8 (<2 x i8 >* %ptr , <2 x i1 > %m , i32 zeroext %evl ) {
10
10
; CHECK-LABEL: vpload_v2i8:
11
11
; CHECK: # %bb.0:
12
12
; CHECK-NEXT: vsetvli zero, a1, e8, mf8, ta, mu
13
13
; CHECK-NEXT: vle8.v v8, (a0), v0.t
14
14
; CHECK-NEXT: ret
15
- %load = call <2 x i8 > @llvm.vp.load.v2i8 (<2 x i8 >* %ptr , <2 x i1 > %m , i32 %evl )
15
+ %load = call <2 x i8 > @llvm.vp.load.v2i8.p0v2i8 (<2 x i8 >* %ptr , <2 x i1 > %m , i32 %evl )
16
16
ret <2 x i8 > %load
17
17
}
18
18
19
- declare <4 x i8 > @llvm.vp.load.v4i8 (<4 x i8 >*, <4 x i1 >, i32 )
19
+ declare <4 x i8 > @llvm.vp.load.v4i8.p0v4i8 (<4 x i8 >*, <4 x i1 >, i32 )
20
20
21
21
define <4 x i8 > @vpload_v4i8 (<4 x i8 >* %ptr , <4 x i1 > %m , i32 zeroext %evl ) {
22
22
; CHECK-LABEL: vpload_v4i8:
23
23
; CHECK: # %bb.0:
24
24
; CHECK-NEXT: vsetvli zero, a1, e8, mf4, ta, mu
25
25
; CHECK-NEXT: vle8.v v8, (a0), v0.t
26
26
; CHECK-NEXT: ret
27
- %load = call <4 x i8 > @llvm.vp.load.v4i8 (<4 x i8 >* %ptr , <4 x i1 > %m , i32 %evl )
27
+ %load = call <4 x i8 > @llvm.vp.load.v4i8.p0v4i8 (<4 x i8 >* %ptr , <4 x i1 > %m , i32 %evl )
28
28
ret <4 x i8 > %load
29
29
}
30
30
@@ -38,55 +38,55 @@ define <4 x i8> @vpload_v4i8_allones_mask(<4 x i8>* %ptr, i32 zeroext %evl) {
38
38
; CHECK-NEXT: ret
39
39
%a = insertelement <4 x i1 > undef , i1 true , i32 0
40
40
%b = shufflevector <4 x i1 > %a , <4 x i1 > poison, <4 x i32 > zeroinitializer
41
- %load = call <4 x i8 > @llvm.vp.load.v4i8 (<4 x i8 >* %ptr , <4 x i1 > %b , i32 %evl )
41
+ %load = call <4 x i8 > @llvm.vp.load.v4i8.p0v4i8 (<4 x i8 >* %ptr , <4 x i1 > %b , i32 %evl )
42
42
ret <4 x i8 > %load
43
43
}
44
44
45
- declare <8 x i8 > @llvm.vp.load.v8i8 (<8 x i8 >*, <8 x i1 >, i32 )
45
+ declare <8 x i8 > @llvm.vp.load.v8i8.p0v8i8 (<8 x i8 >*, <8 x i1 >, i32 )
46
46
47
47
define <8 x i8 > @vpload_v8i8 (<8 x i8 >* %ptr , <8 x i1 > %m , i32 zeroext %evl ) {
48
48
; CHECK-LABEL: vpload_v8i8:
49
49
; CHECK: # %bb.0:
50
50
; CHECK-NEXT: vsetvli zero, a1, e8, mf2, ta, mu
51
51
; CHECK-NEXT: vle8.v v8, (a0), v0.t
52
52
; CHECK-NEXT: ret
53
- %load = call <8 x i8 > @llvm.vp.load.v8i8 (<8 x i8 >* %ptr , <8 x i1 > %m , i32 %evl )
53
+ %load = call <8 x i8 > @llvm.vp.load.v8i8.p0v8i8 (<8 x i8 >* %ptr , <8 x i1 > %m , i32 %evl )
54
54
ret <8 x i8 > %load
55
55
}
56
56
57
- declare <2 x i16 > @llvm.vp.load.v2i16 (<2 x i16 >*, <2 x i1 >, i32 )
57
+ declare <2 x i16 > @llvm.vp.load.v2i16.p0v2i16 (<2 x i16 >*, <2 x i1 >, i32 )
58
58
59
59
define <2 x i16 > @vpload_v2i16 (<2 x i16 >* %ptr , <2 x i1 > %m , i32 zeroext %evl ) {
60
60
; CHECK-LABEL: vpload_v2i16:
61
61
; CHECK: # %bb.0:
62
62
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, mu
63
63
; CHECK-NEXT: vle16.v v8, (a0), v0.t
64
64
; CHECK-NEXT: ret
65
- %load = call <2 x i16 > @llvm.vp.load.v2i16 (<2 x i16 >* %ptr , <2 x i1 > %m , i32 %evl )
65
+ %load = call <2 x i16 > @llvm.vp.load.v2i16.p0v2i16 (<2 x i16 >* %ptr , <2 x i1 > %m , i32 %evl )
66
66
ret <2 x i16 > %load
67
67
}
68
68
69
- declare <4 x i16 > @llvm.vp.load.v4i16 (<4 x i16 >*, <4 x i1 >, i32 )
69
+ declare <4 x i16 > @llvm.vp.load.v4i16.p0v4i16 (<4 x i16 >*, <4 x i1 >, i32 )
70
70
71
71
define <4 x i16 > @vpload_v4i16 (<4 x i16 >* %ptr , <4 x i1 > %m , i32 zeroext %evl ) {
72
72
; CHECK-LABEL: vpload_v4i16:
73
73
; CHECK: # %bb.0:
74
74
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, mu
75
75
; CHECK-NEXT: vle16.v v8, (a0), v0.t
76
76
; CHECK-NEXT: ret
77
- %load = call <4 x i16 > @llvm.vp.load.v4i16 (<4 x i16 >* %ptr , <4 x i1 > %m , i32 %evl )
77
+ %load = call <4 x i16 > @llvm.vp.load.v4i16.p0v4i16 (<4 x i16 >* %ptr , <4 x i1 > %m , i32 %evl )
78
78
ret <4 x i16 > %load
79
79
}
80
80
81
- declare <8 x i16 > @llvm.vp.load.v8i16 (<8 x i16 >*, <8 x i1 >, i32 )
81
+ declare <8 x i16 > @llvm.vp.load.v8i16.p0v8i16 (<8 x i16 >*, <8 x i1 >, i32 )
82
82
83
83
define <8 x i16 > @vpload_v8i16 (<8 x i16 >* %ptr , <8 x i1 > %m , i32 zeroext %evl ) {
84
84
; CHECK-LABEL: vpload_v8i16:
85
85
; CHECK: # %bb.0:
86
86
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, mu
87
87
; CHECK-NEXT: vle16.v v8, (a0), v0.t
88
88
; CHECK-NEXT: ret
89
- %load = call <8 x i16 > @llvm.vp.load.v8i16 (<8 x i16 >* %ptr , <8 x i1 > %m , i32 %evl )
89
+ %load = call <8 x i16 > @llvm.vp.load.v8i16.p0v8i16 (<8 x i16 >* %ptr , <8 x i1 > %m , i32 %evl )
90
90
ret <8 x i16 > %load
91
91
}
92
92
@@ -100,43 +100,43 @@ define <8 x i16> @vpload_v8i16_allones_mask(<8 x i16>* %ptr, i32 zeroext %evl) {
100
100
; CHECK-NEXT: ret
101
101
%a = insertelement <8 x i1 > undef , i1 true , i32 0
102
102
%b = shufflevector <8 x i1 > %a , <8 x i1 > poison, <8 x i32 > zeroinitializer
103
- %load = call <8 x i16 > @llvm.vp.load.v8i16 (<8 x i16 >* %ptr , <8 x i1 > %b , i32 %evl )
103
+ %load = call <8 x i16 > @llvm.vp.load.v8i16.p0v8i16 (<8 x i16 >* %ptr , <8 x i1 > %b , i32 %evl )
104
104
ret <8 x i16 > %load
105
105
}
106
106
107
- declare <2 x i32 > @llvm.vp.load.v2i32 (<2 x i32 >*, <2 x i1 >, i32 )
107
+ declare <2 x i32 > @llvm.vp.load.v2i32.p0v2i32 (<2 x i32 >*, <2 x i1 >, i32 )
108
108
109
109
define <2 x i32 > @vpload_v2i32 (<2 x i32 >* %ptr , <2 x i1 > %m , i32 zeroext %evl ) {
110
110
; CHECK-LABEL: vpload_v2i32:
111
111
; CHECK: # %bb.0:
112
112
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, mu
113
113
; CHECK-NEXT: vle32.v v8, (a0), v0.t
114
114
; CHECK-NEXT: ret
115
- %load = call <2 x i32 > @llvm.vp.load.v2i32 (<2 x i32 >* %ptr , <2 x i1 > %m , i32 %evl )
115
+ %load = call <2 x i32 > @llvm.vp.load.v2i32.p0v2i32 (<2 x i32 >* %ptr , <2 x i1 > %m , i32 %evl )
116
116
ret <2 x i32 > %load
117
117
}
118
118
119
- declare <4 x i32 > @llvm.vp.load.v4i32 (<4 x i32 >*, <4 x i1 >, i32 )
119
+ declare <4 x i32 > @llvm.vp.load.v4i32.p0v4i32 (<4 x i32 >*, <4 x i1 >, i32 )
120
120
121
121
define <4 x i32 > @vpload_v4i32 (<4 x i32 >* %ptr , <4 x i1 > %m , i32 zeroext %evl ) {
122
122
; CHECK-LABEL: vpload_v4i32:
123
123
; CHECK: # %bb.0:
124
124
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu
125
125
; CHECK-NEXT: vle32.v v8, (a0), v0.t
126
126
; CHECK-NEXT: ret
127
- %load = call <4 x i32 > @llvm.vp.load.v4i32 (<4 x i32 >* %ptr , <4 x i1 > %m , i32 %evl )
127
+ %load = call <4 x i32 > @llvm.vp.load.v4i32.p0v4i32 (<4 x i32 >* %ptr , <4 x i1 > %m , i32 %evl )
128
128
ret <4 x i32 > %load
129
129
}
130
130
131
- declare <8 x i32 > @llvm.vp.load.v8i32 (<8 x i32 >*, <8 x i1 >, i32 )
131
+ declare <8 x i32 > @llvm.vp.load.v8i32.p0v8i32 (<8 x i32 >*, <8 x i1 >, i32 )
132
132
133
133
define <8 x i32 > @vpload_v8i32 (<8 x i32 >* %ptr , <8 x i1 > %m , i32 zeroext %evl ) {
134
134
; CHECK-LABEL: vpload_v8i32:
135
135
; CHECK: # %bb.0:
136
136
; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, mu
137
137
; CHECK-NEXT: vle32.v v8, (a0), v0.t
138
138
; CHECK-NEXT: ret
139
- %load = call <8 x i32 > @llvm.vp.load.v8i32 (<8 x i32 >* %ptr , <8 x i1 > %m , i32 %evl )
139
+ %load = call <8 x i32 > @llvm.vp.load.v8i32.p0v8i32 (<8 x i32 >* %ptr , <8 x i1 > %m , i32 %evl )
140
140
ret <8 x i32 > %load
141
141
}
142
142
@@ -150,31 +150,31 @@ define <8 x i32> @vpload_v8i32_allones_mask(<8 x i32>* %ptr, i32 zeroext %evl) {
150
150
; CHECK-NEXT: ret
151
151
%a = insertelement <8 x i1 > undef , i1 true , i32 0
152
152
%b = shufflevector <8 x i1 > %a , <8 x i1 > poison, <8 x i32 > zeroinitializer
153
- %load = call <8 x i32 > @llvm.vp.load.v8i32 (<8 x i32 >* %ptr , <8 x i1 > %b , i32 %evl )
153
+ %load = call <8 x i32 > @llvm.vp.load.v8i32.p0v8i32 (<8 x i32 >* %ptr , <8 x i1 > %b , i32 %evl )
154
154
ret <8 x i32 > %load
155
155
}
156
156
157
- declare <2 x i64 > @llvm.vp.load.v2i64 (<2 x i64 >*, <2 x i1 >, i32 )
157
+ declare <2 x i64 > @llvm.vp.load.v2i64.p0v2i64 (<2 x i64 >*, <2 x i1 >, i32 )
158
158
159
159
define <2 x i64 > @vpload_v2i64 (<2 x i64 >* %ptr , <2 x i1 > %m , i32 zeroext %evl ) {
160
160
; CHECK-LABEL: vpload_v2i64:
161
161
; CHECK: # %bb.0:
162
162
; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu
163
163
; CHECK-NEXT: vle64.v v8, (a0), v0.t
164
164
; CHECK-NEXT: ret
165
- %load = call <2 x i64 > @llvm.vp.load.v2i64 (<2 x i64 >* %ptr , <2 x i1 > %m , i32 %evl )
165
+ %load = call <2 x i64 > @llvm.vp.load.v2i64.p0v2i64 (<2 x i64 >* %ptr , <2 x i1 > %m , i32 %evl )
166
166
ret <2 x i64 > %load
167
167
}
168
168
169
- declare <4 x i64 > @llvm.vp.load.v4i64 (<4 x i64 >*, <4 x i1 >, i32 )
169
+ declare <4 x i64 > @llvm.vp.load.v4i64.p0v4i64 (<4 x i64 >*, <4 x i1 >, i32 )
170
170
171
171
define <4 x i64 > @vpload_v4i64 (<4 x i64 >* %ptr , <4 x i1 > %m , i32 zeroext %evl ) {
172
172
; CHECK-LABEL: vpload_v4i64:
173
173
; CHECK: # %bb.0:
174
174
; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, mu
175
175
; CHECK-NEXT: vle64.v v8, (a0), v0.t
176
176
; CHECK-NEXT: ret
177
- %load = call <4 x i64 > @llvm.vp.load.v4i64 (<4 x i64 >* %ptr , <4 x i1 > %m , i32 %evl )
177
+ %load = call <4 x i64 > @llvm.vp.load.v4i64.p0v4i64 (<4 x i64 >* %ptr , <4 x i1 > %m , i32 %evl )
178
178
ret <4 x i64 > %load
179
179
}
180
180
@@ -188,31 +188,31 @@ define <4 x i64> @vpload_v4i64_allones_mask(<4 x i64>* %ptr, i32 zeroext %evl) {
188
188
; CHECK-NEXT: ret
189
189
%a = insertelement <4 x i1 > undef , i1 true , i32 0
190
190
%b = shufflevector <4 x i1 > %a , <4 x i1 > poison, <4 x i32 > zeroinitializer
191
- %load = call <4 x i64 > @llvm.vp.load.v4i64 (<4 x i64 >* %ptr , <4 x i1 > %b , i32 %evl )
191
+ %load = call <4 x i64 > @llvm.vp.load.v4i64.p0v4i64 (<4 x i64 >* %ptr , <4 x i1 > %b , i32 %evl )
192
192
ret <4 x i64 > %load
193
193
}
194
194
195
- declare <8 x i64 > @llvm.vp.load.v8i64 (<8 x i64 >*, <8 x i1 >, i32 )
195
+ declare <8 x i64 > @llvm.vp.load.v8i64.p0v8i64 (<8 x i64 >*, <8 x i1 >, i32 )
196
196
197
197
define <8 x i64 > @vpload_v8i64 (<8 x i64 >* %ptr , <8 x i1 > %m , i32 zeroext %evl ) {
198
198
; CHECK-LABEL: vpload_v8i64:
199
199
; CHECK: # %bb.0:
200
200
; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, mu
201
201
; CHECK-NEXT: vle64.v v8, (a0), v0.t
202
202
; CHECK-NEXT: ret
203
- %load = call <8 x i64 > @llvm.vp.load.v8i64 (<8 x i64 >* %ptr , <8 x i1 > %m , i32 %evl )
203
+ %load = call <8 x i64 > @llvm.vp.load.v8i64.p0v8i64 (<8 x i64 >* %ptr , <8 x i1 > %m , i32 %evl )
204
204
ret <8 x i64 > %load
205
205
}
206
206
207
- declare <2 x half > @llvm.vp.load.v2f16 (<2 x half >*, <2 x i1 >, i32 )
207
+ declare <2 x half > @llvm.vp.load.v2f16.p0v2f16 (<2 x half >*, <2 x i1 >, i32 )
208
208
209
209
define <2 x half > @vpload_v2f16 (<2 x half >* %ptr , <2 x i1 > %m , i32 zeroext %evl ) {
210
210
; CHECK-LABEL: vpload_v2f16:
211
211
; CHECK: # %bb.0:
212
212
; CHECK-NEXT: vsetvli zero, a1, e16, mf4, ta, mu
213
213
; CHECK-NEXT: vle16.v v8, (a0), v0.t
214
214
; CHECK-NEXT: ret
215
- %load = call <2 x half > @llvm.vp.load.v2f16 (<2 x half >* %ptr , <2 x i1 > %m , i32 %evl )
215
+ %load = call <2 x half > @llvm.vp.load.v2f16.p0v2f16 (<2 x half >* %ptr , <2 x i1 > %m , i32 %evl )
216
216
ret <2 x half > %load
217
217
}
218
218
@@ -226,67 +226,67 @@ define <2 x half> @vpload_v2f16_allones_mask(<2 x half>* %ptr, i32 zeroext %evl)
226
226
; CHECK-NEXT: ret
227
227
%a = insertelement <2 x i1 > undef , i1 true , i32 0
228
228
%b = shufflevector <2 x i1 > %a , <2 x i1 > poison, <2 x i32 > zeroinitializer
229
- %load = call <2 x half > @llvm.vp.load.v2f16 (<2 x half >* %ptr , <2 x i1 > %b , i32 %evl )
229
+ %load = call <2 x half > @llvm.vp.load.v2f16.p0v2f16 (<2 x half >* %ptr , <2 x i1 > %b , i32 %evl )
230
230
ret <2 x half > %load
231
231
}
232
232
233
- declare <4 x half > @llvm.vp.load.v4f16 (<4 x half >*, <4 x i1 >, i32 )
233
+ declare <4 x half > @llvm.vp.load.v4f16.p0v4f16 (<4 x half >*, <4 x i1 >, i32 )
234
234
235
235
define <4 x half > @vpload_v4f16 (<4 x half >* %ptr , <4 x i1 > %m , i32 zeroext %evl ) {
236
236
; CHECK-LABEL: vpload_v4f16:
237
237
; CHECK: # %bb.0:
238
238
; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, mu
239
239
; CHECK-NEXT: vle16.v v8, (a0), v0.t
240
240
; CHECK-NEXT: ret
241
- %load = call <4 x half > @llvm.vp.load.v4f16 (<4 x half >* %ptr , <4 x i1 > %m , i32 %evl )
241
+ %load = call <4 x half > @llvm.vp.load.v4f16.p0v4f16 (<4 x half >* %ptr , <4 x i1 > %m , i32 %evl )
242
242
ret <4 x half > %load
243
243
}
244
244
245
- declare <8 x half > @llvm.vp.load.v8f16 (<8 x half >*, <8 x i1 >, i32 )
245
+ declare <8 x half > @llvm.vp.load.v8f16.p0v8f16 (<8 x half >*, <8 x i1 >, i32 )
246
246
247
247
define <8 x half > @vpload_v8f16 (<8 x half >* %ptr , <8 x i1 > %m , i32 zeroext %evl ) {
248
248
; CHECK-LABEL: vpload_v8f16:
249
249
; CHECK: # %bb.0:
250
250
; CHECK-NEXT: vsetvli zero, a1, e16, m1, ta, mu
251
251
; CHECK-NEXT: vle16.v v8, (a0), v0.t
252
252
; CHECK-NEXT: ret
253
- %load = call <8 x half > @llvm.vp.load.v8f16 (<8 x half >* %ptr , <8 x i1 > %m , i32 %evl )
253
+ %load = call <8 x half > @llvm.vp.load.v8f16.p0v8f16 (<8 x half >* %ptr , <8 x i1 > %m , i32 %evl )
254
254
ret <8 x half > %load
255
255
}
256
256
257
- declare <2 x float > @llvm.vp.load.v2f32 (<2 x float >*, <2 x i1 >, i32 )
257
+ declare <2 x float > @llvm.vp.load.v2f32.p0v2f32 (<2 x float >*, <2 x i1 >, i32 )
258
258
259
259
define <2 x float > @vpload_v2f32 (<2 x float >* %ptr , <2 x i1 > %m , i32 zeroext %evl ) {
260
260
; CHECK-LABEL: vpload_v2f32:
261
261
; CHECK: # %bb.0:
262
262
; CHECK-NEXT: vsetvli zero, a1, e32, mf2, ta, mu
263
263
; CHECK-NEXT: vle32.v v8, (a0), v0.t
264
264
; CHECK-NEXT: ret
265
- %load = call <2 x float > @llvm.vp.load.v2f32 (<2 x float >* %ptr , <2 x i1 > %m , i32 %evl )
265
+ %load = call <2 x float > @llvm.vp.load.v2f32.p0v2f32 (<2 x float >* %ptr , <2 x i1 > %m , i32 %evl )
266
266
ret <2 x float > %load
267
267
}
268
268
269
- declare <4 x float > @llvm.vp.load.v4f32 (<4 x float >*, <4 x i1 >, i32 )
269
+ declare <4 x float > @llvm.vp.load.v4f32.p0v4f32 (<4 x float >*, <4 x i1 >, i32 )
270
270
271
271
define <4 x float > @vpload_v4f32 (<4 x float >* %ptr , <4 x i1 > %m , i32 zeroext %evl ) {
272
272
; CHECK-LABEL: vpload_v4f32:
273
273
; CHECK: # %bb.0:
274
274
; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, mu
275
275
; CHECK-NEXT: vle32.v v8, (a0), v0.t
276
276
; CHECK-NEXT: ret
277
- %load = call <4 x float > @llvm.vp.load.v4f32 (<4 x float >* %ptr , <4 x i1 > %m , i32 %evl )
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+ %load = call <4 x float > @llvm.vp.load.v4f32.p0v4f32 (<4 x float >* %ptr , <4 x i1 > %m , i32 %evl )
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ret <4 x float > %load
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}
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- declare <8 x float > @llvm.vp.load.v8f32 (<8 x float >*, <8 x i1 >, i32 )
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+ declare <8 x float > @llvm.vp.load.v8f32.p0v8f32 (<8 x float >*, <8 x i1 >, i32 )
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define <8 x float > @vpload_v8f32 (<8 x float >* %ptr , <8 x i1 > %m , i32 zeroext %evl ) {
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; CHECK-LABEL: vpload_v8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, mu
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; CHECK-NEXT: vle32.v v8, (a0), v0.t
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; CHECK-NEXT: ret
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- %load = call <8 x float > @llvm.vp.load.v8f32 (<8 x float >* %ptr , <8 x i1 > %m , i32 %evl )
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+ %load = call <8 x float > @llvm.vp.load.v8f32.p0v8f32 (<8 x float >* %ptr , <8 x i1 > %m , i32 %evl )
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ret <8 x float > %load
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}
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@@ -300,31 +300,31 @@ define <8 x float> @vpload_v8f32_allones_mask(<8 x float>* %ptr, i32 zeroext %ev
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; CHECK-NEXT: ret
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%a = insertelement <8 x i1 > undef , i1 true , i32 0
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%b = shufflevector <8 x i1 > %a , <8 x i1 > poison, <8 x i32 > zeroinitializer
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- %load = call <8 x float > @llvm.vp.load.v8f32 (<8 x float >* %ptr , <8 x i1 > %b , i32 %evl )
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+ %load = call <8 x float > @llvm.vp.load.v8f32.p0v8f32 (<8 x float >* %ptr , <8 x i1 > %b , i32 %evl )
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ret <8 x float > %load
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}
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- declare <2 x double > @llvm.vp.load.v2f64 (<2 x double >*, <2 x i1 >, i32 )
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+ declare <2 x double > @llvm.vp.load.v2f64.p0v2f64 (<2 x double >*, <2 x i1 >, i32 )
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define <2 x double > @vpload_v2f64 (<2 x double >* %ptr , <2 x i1 > %m , i32 zeroext %evl ) {
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; CHECK-LABEL: vpload_v2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a1, e64, m1, ta, mu
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; CHECK-NEXT: vle64.v v8, (a0), v0.t
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; CHECK-NEXT: ret
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- %load = call <2 x double > @llvm.vp.load.v2f64 (<2 x double >* %ptr , <2 x i1 > %m , i32 %evl )
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+ %load = call <2 x double > @llvm.vp.load.v2f64.p0v2f64 (<2 x double >* %ptr , <2 x i1 > %m , i32 %evl )
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ret <2 x double > %load
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}
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- declare <4 x double > @llvm.vp.load.v4f64 (<4 x double >*, <4 x i1 >, i32 )
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+ declare <4 x double > @llvm.vp.load.v4f64.p0v4f64 (<4 x double >*, <4 x i1 >, i32 )
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define <4 x double > @vpload_v4f64 (<4 x double >* %ptr , <4 x i1 > %m , i32 zeroext %evl ) {
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; CHECK-LABEL: vpload_v4f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a1, e64, m2, ta, mu
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; CHECK-NEXT: vle64.v v8, (a0), v0.t
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; CHECK-NEXT: ret
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- %load = call <4 x double > @llvm.vp.load.v4f64 (<4 x double >* %ptr , <4 x i1 > %m , i32 %evl )
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+ %load = call <4 x double > @llvm.vp.load.v4f64.p0v4f64 (<4 x double >* %ptr , <4 x i1 > %m , i32 %evl )
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ret <4 x double > %load
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}
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@@ -338,18 +338,18 @@ define <4 x double> @vpload_v4f64_allones_mask(<4 x double>* %ptr, i32 zeroext %
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; CHECK-NEXT: ret
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%a = insertelement <4 x i1 > undef , i1 true , i32 0
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%b = shufflevector <4 x i1 > %a , <4 x i1 > poison, <4 x i32 > zeroinitializer
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- %load = call <4 x double > @llvm.vp.load.v4f64 (<4 x double >* %ptr , <4 x i1 > %b , i32 %evl )
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+ %load = call <4 x double > @llvm.vp.load.v4f64.p0v4f64 (<4 x double >* %ptr , <4 x i1 > %b , i32 %evl )
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ret <4 x double > %load
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}
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- declare <8 x double > @llvm.vp.load.v8f64 (<8 x double >*, <8 x i1 >, i32 )
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+ declare <8 x double > @llvm.vp.load.v8f64.p0v8f64 (<8 x double >*, <8 x i1 >, i32 )
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define <8 x double > @vpload_v8f64 (<8 x double >* %ptr , <8 x i1 > %m , i32 zeroext %evl ) {
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; CHECK-LABEL: vpload_v8f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a1, e64, m4, ta, mu
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; CHECK-NEXT: vle64.v v8, (a0), v0.t
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; CHECK-NEXT: ret
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- %load = call <8 x double > @llvm.vp.load.v8f64 (<8 x double >* %ptr , <8 x i1 > %m , i32 %evl )
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+ %load = call <8 x double > @llvm.vp.load.v8f64.p0v8f64 (<8 x double >* %ptr , <8 x i1 > %m , i32 %evl )
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ret <8 x double > %load
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}
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