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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 |
| 2 | +; RUN: opt -S -passes=gvn < %s | FileCheck %s |
| 3 | + |
| 4 | +define i32 @main(i64 %x, ptr %d, ptr noalias %p) { |
| 5 | +; CHECK-LABEL: define i32 @main |
| 6 | +; CHECK-SAME: (i64 [[X:%.*]], ptr [[D:%.*]], ptr noalias [[P:%.*]]) { |
| 7 | +; CHECK-NEXT: entry: |
| 8 | +; CHECK-NEXT: [[T1_PRE_PRE_PRE:%.*]] = load ptr, ptr [[P]], align 8 |
| 9 | +; CHECK-NEXT: [[T2_PRE_PRE_PRE:%.*]] = load ptr, ptr [[T1_PRE_PRE_PRE]], align 8, !tbaa [[TBAA0:![0-9]+]] |
| 10 | +; CHECK-NEXT: [[T3_PRE_PRE_PRE:%.*]] = load ptr, ptr [[T2_PRE_PRE_PRE]], align 8 |
| 11 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 12 | +; CHECK: loop: |
| 13 | +; CHECK-NEXT: [[T2_PRE_PRE:%.*]] = phi ptr [ [[T2_PRE_PRE23:%.*]], [[LOOP_LATCH:%.*]] ], [ [[T2_PRE_PRE_PRE]], [[ENTRY:%.*]] ] |
| 14 | +; CHECK-NEXT: [[T1_PRE_PRE:%.*]] = phi ptr [ [[T1_PRE_PRE19:%.*]], [[LOOP_LATCH]] ], [ [[T1_PRE_PRE_PRE]], [[ENTRY]] ] |
| 15 | +; CHECK-NEXT: br label [[LOOP2:%.*]] |
| 16 | +; CHECK: loop2: |
| 17 | +; CHECK-NEXT: [[T2_PRE_PRE25:%.*]] = phi ptr [ [[T2_PRE_PRE23]], [[LOOP2_LATCH_LOOP2_CRIT_EDGE:%.*]] ], [ [[T2_PRE_PRE]], [[LOOP]] ] |
| 18 | +; CHECK-NEXT: [[T1_PRE_PRE21:%.*]] = phi ptr [ [[T1_PRE_PRE19]], [[LOOP2_LATCH_LOOP2_CRIT_EDGE]] ], [ [[T1_PRE_PRE]], [[LOOP]] ] |
| 19 | +; CHECK-NEXT: [[T3_PRE:%.*]] = phi ptr [ [[T3_PRE16:%.*]], [[LOOP2_LATCH_LOOP2_CRIT_EDGE]] ], [ [[T3_PRE_PRE_PRE]], [[LOOP]] ] |
| 20 | +; CHECK-NEXT: [[T2_PRE:%.*]] = phi ptr [ [[T2_PRE13:%.*]], [[LOOP2_LATCH_LOOP2_CRIT_EDGE]] ], [ [[T2_PRE_PRE]], [[LOOP]] ] |
| 21 | +; CHECK-NEXT: [[T1_PRE:%.*]] = phi ptr [ [[T1_PRE10:%.*]], [[LOOP2_LATCH_LOOP2_CRIT_EDGE]] ], [ [[T1_PRE_PRE]], [[LOOP]] ] |
| 22 | +; CHECK-NEXT: br label [[LOOP3:%.*]] |
| 23 | +; CHECK: loop3: |
| 24 | +; CHECK-NEXT: [[T2_PRE_PRE24:%.*]] = phi ptr [ [[T2_PRE_PRE23]], [[LOOP3_LATCH:%.*]] ], [ [[T2_PRE_PRE25]], [[LOOP2]] ] |
| 25 | +; CHECK-NEXT: [[T1_PRE_PRE20:%.*]] = phi ptr [ [[T1_PRE_PRE19]], [[LOOP3_LATCH]] ], [ [[T1_PRE_PRE21]], [[LOOP2]] ] |
| 26 | +; CHECK-NEXT: [[T3_PRE17:%.*]] = phi ptr [ [[T3_PRE16]], [[LOOP3_LATCH]] ], [ [[T3_PRE]], [[LOOP2]] ] |
| 27 | +; CHECK-NEXT: [[T2_PRE14:%.*]] = phi ptr [ [[T2_PRE13]], [[LOOP3_LATCH]] ], [ [[T2_PRE]], [[LOOP2]] ] |
| 28 | +; CHECK-NEXT: [[T1_PRE11:%.*]] = phi ptr [ [[T1_PRE10]], [[LOOP3_LATCH]] ], [ [[T1_PRE]], [[LOOP2]] ] |
| 29 | +; CHECK-NEXT: [[T78:%.*]] = phi ptr [ [[T7:%.*]], [[LOOP3_LATCH]] ], [ [[T3_PRE]], [[LOOP2]] ] |
| 30 | +; CHECK-NEXT: [[T66:%.*]] = phi ptr [ [[T6:%.*]], [[LOOP3_LATCH]] ], [ [[T2_PRE]], [[LOOP2]] ] |
| 31 | +; CHECK-NEXT: [[T54:%.*]] = phi ptr [ [[T5:%.*]], [[LOOP3_LATCH]] ], [ [[T1_PRE]], [[LOOP2]] ] |
| 32 | +; CHECK-NEXT: [[TOBOOL_NOT2_I:%.*]] = icmp eq i64 [[X]], 0 |
| 33 | +; CHECK-NEXT: br i1 false, label [[LOOP3_LOOP3_LATCH_CRIT_EDGE:%.*]], label [[FOR_BODY_LR_PH_I:%.*]] |
| 34 | +; CHECK: loop3.loop3.latch_crit_edge: |
| 35 | +; CHECK-NEXT: br label [[LOOP3_LATCH]] |
| 36 | +; CHECK: for.body.lr.ph.i: |
| 37 | +; CHECK-NEXT: store i32 0, ptr [[P]], align 4 |
| 38 | +; CHECK-NEXT: [[T5_PRE:%.*]] = load ptr, ptr [[P]], align 8 |
| 39 | +; CHECK-NEXT: [[T6_PRE:%.*]] = load ptr, ptr [[T5_PRE]], align 8, !tbaa [[TBAA0]] |
| 40 | +; CHECK-NEXT: [[T7_PRE:%.*]] = load ptr, ptr [[T6_PRE]], align 8 |
| 41 | +; CHECK-NEXT: br label [[LOOP3_LATCH]] |
| 42 | +; CHECK: loop3.latch: |
| 43 | +; CHECK-NEXT: [[T2_PRE_PRE23]] = phi ptr [ [[T2_PRE_PRE24]], [[LOOP3_LOOP3_LATCH_CRIT_EDGE]] ], [ [[T6_PRE]], [[FOR_BODY_LR_PH_I]] ] |
| 44 | +; CHECK-NEXT: [[T1_PRE_PRE19]] = phi ptr [ [[T1_PRE_PRE20]], [[LOOP3_LOOP3_LATCH_CRIT_EDGE]] ], [ [[T5_PRE]], [[FOR_BODY_LR_PH_I]] ] |
| 45 | +; CHECK-NEXT: [[T3_PRE16]] = phi ptr [ [[T3_PRE17]], [[LOOP3_LOOP3_LATCH_CRIT_EDGE]] ], [ [[T7_PRE]], [[FOR_BODY_LR_PH_I]] ] |
| 46 | +; CHECK-NEXT: [[T2_PRE13]] = phi ptr [ [[T2_PRE14]], [[LOOP3_LOOP3_LATCH_CRIT_EDGE]] ], [ [[T6_PRE]], [[FOR_BODY_LR_PH_I]] ] |
| 47 | +; CHECK-NEXT: [[T1_PRE10]] = phi ptr [ [[T1_PRE11]], [[LOOP3_LOOP3_LATCH_CRIT_EDGE]] ], [ [[T5_PRE]], [[FOR_BODY_LR_PH_I]] ] |
| 48 | +; CHECK-NEXT: [[T7]] = phi ptr [ [[T78]], [[LOOP3_LOOP3_LATCH_CRIT_EDGE]] ], [ [[T7_PRE]], [[FOR_BODY_LR_PH_I]] ] |
| 49 | +; CHECK-NEXT: [[T6]] = phi ptr [ [[T66]], [[LOOP3_LOOP3_LATCH_CRIT_EDGE]] ], [ [[T6_PRE]], [[FOR_BODY_LR_PH_I]] ] |
| 50 | +; CHECK-NEXT: [[T5]] = phi ptr [ [[T54]], [[LOOP3_LOOP3_LATCH_CRIT_EDGE]] ], [ [[T5_PRE]], [[FOR_BODY_LR_PH_I]] ] |
| 51 | +; CHECK-NEXT: br i1 false, label [[LOOP2_LATCH:%.*]], label [[LOOP3]] |
| 52 | +; CHECK: loop2.latch: |
| 53 | +; CHECK-NEXT: br i1 false, label [[LOOP2_LATCH_LOOP2_CRIT_EDGE]], label [[LOOP_LATCH]] |
| 54 | +; CHECK: loop2.latch.loop2_crit_edge: |
| 55 | +; CHECK-NEXT: br label [[LOOP2]] |
| 56 | +; CHECK: loop.latch: |
| 57 | +; CHECK-NEXT: store i32 0, ptr [[D]], align 4, !tbaa [[TBAA4:![0-9]+]] |
| 58 | +; CHECK-NEXT: br label [[LOOP]] |
| 59 | +; |
| 60 | +entry: |
| 61 | + br label %loop |
| 62 | + |
| 63 | +loop: |
| 64 | + br label %loop2 |
| 65 | + |
| 66 | +loop2: |
| 67 | + br label %loop3 |
| 68 | + |
| 69 | +loop3: |
| 70 | + %t1 = load ptr, ptr %p, align 8 |
| 71 | + %t2 = load ptr, ptr %t1, align 8, !tbaa !0 |
| 72 | + %t3 = load ptr, ptr %t2, align 8 |
| 73 | + %t4 = load i8, ptr %t3, align 1 |
| 74 | + %tobool.not2.i = icmp eq i64 %x, 0 |
| 75 | + br i1 false, label %loop3.latch, label %for.body.lr.ph.i |
| 76 | + |
| 77 | +for.body.lr.ph.i: |
| 78 | + store i32 0, ptr %p, align 4 |
| 79 | + br label %w.exit.loopexit |
| 80 | + |
| 81 | +w.exit.loopexit: |
| 82 | + br label %loop3.latch |
| 83 | + |
| 84 | +loop3.latch: |
| 85 | + %t5 = load ptr, ptr %p, align 8 |
| 86 | + %t6 = load ptr, ptr %t5, align 8, !tbaa !0 |
| 87 | + %t7 = load ptr, ptr %t6, align 8 |
| 88 | + br i1 false, label %loop2.latch, label %loop3 |
| 89 | + |
| 90 | +loop2.latch: |
| 91 | + br i1 false, label %loop2, label %loop.latch |
| 92 | + |
| 93 | +loop.latch: |
| 94 | + store i32 0, ptr %d, align 4, !tbaa !4 |
| 95 | + br label %loop |
| 96 | +} |
| 97 | + |
| 98 | +!0 = !{!1, !1, i64 0} |
| 99 | +!1 = !{!"any pointer", !2, i64 0} |
| 100 | +!2 = !{!"omnipotent char", !3, i64 0} |
| 101 | +!3 = !{!"Simple C/C++ TBAA"} |
| 102 | +!4 = !{!5, !5, i64 0} |
| 103 | +!5 = !{!"int", !2, i64 0} |
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