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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt -S -slp-vectorizer < %s | FileCheck %s |
| 3 | + |
| 4 | +declare void @use(double, double) |
| 5 | + |
| 6 | +; Create a situation where a previously scheduled instruction is encountered |
| 7 | +; again, and needs to be unscheduled. |
| 8 | +define void @test() { |
| 9 | +; CHECK-LABEL: @test( |
| 10 | +; CHECK-NEXT: for.body602: |
| 11 | +; CHECK-NEXT: [[MUL701:%.*]] = fmul double 0.000000e+00, 0.000000e+00 |
| 12 | +; CHECK-NEXT: [[MUL703:%.*]] = fmul double 0.000000e+00, 0.000000e+00 |
| 13 | +; CHECK-NEXT: [[I4:%.*]] = call double @llvm.fmuladd.f64(double [[MUL701]], double 0.000000e+00, double [[MUL703]]) |
| 14 | +; CHECK-NEXT: store double [[I4]], double* null, align 8 |
| 15 | +; CHECK-NEXT: [[I5:%.*]] = load double, double* null, align 8 |
| 16 | +; CHECK-NEXT: [[I6:%.*]] = load double, double* null, align 8 |
| 17 | +; CHECK-NEXT: [[MUL746:%.*]] = fmul double 0.000000e+00, [[I6]] |
| 18 | +; CHECK-NEXT: [[MUL747:%.*]] = fmul double 0.000000e+00, [[I5]] |
| 19 | +; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[MUL746]], i32 0 |
| 20 | +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[MUL701]], i32 1 |
| 21 | +; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> zeroinitializer, <2 x double> zeroinitializer, <2 x double> [[TMP1]]) |
| 22 | +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> poison, double [[MUL747]], i32 0 |
| 23 | +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x double> [[TMP3]], double [[MUL703]], i32 1 |
| 24 | +; CHECK-NEXT: [[TMP5:%.*]] = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> [[TMP2]], <2 x double> zeroinitializer, <2 x double> [[TMP4]]) |
| 25 | +; CHECK-NEXT: [[TMP6:%.*]] = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> [[TMP5]], <2 x double> zeroinitializer, <2 x double> zeroinitializer) |
| 26 | +; CHECK-NEXT: [[TMP7:%.*]] = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> zeroinitializer, <2 x double> [[TMP6]], <2 x double> zeroinitializer) |
| 27 | +; CHECK-NEXT: br label [[FOR_COND794_PREHEADER:%.*]] |
| 28 | +; CHECK: for.cond794.preheader: |
| 29 | +; CHECK-NEXT: [[TMP8:%.*]] = phi <2 x double> [ [[TMP7]], [[FOR_BODY602:%.*]] ] |
| 30 | +; CHECK-NEXT: ret void |
| 31 | +; |
| 32 | +for.body602: |
| 33 | + %mul701 = fmul double 0.000000e+00, 0.000000e+00 |
| 34 | + %mul703 = fmul double 0.000000e+00, 0.000000e+00 |
| 35 | + %i = call double @llvm.fmuladd.f64(double 0.000000e+00, double 0.000000e+00, double %mul701) |
| 36 | + %i1 = call double @llvm.fmuladd.f64(double %i, double 0.000000e+00, double %mul703) |
| 37 | + %i2 = call double @llvm.fmuladd.f64(double %i1, double 0.000000e+00, double 0.000000e+00) |
| 38 | + %i3 = call double @llvm.fmuladd.f64(double 0.000000e+00, double %i2, double 0.000000e+00) |
| 39 | + %i4 = call double @llvm.fmuladd.f64(double %mul701, double 0.000000e+00, double %mul703) |
| 40 | + store double %i4, double* null, align 8 |
| 41 | + %i5 = load double, double* null, align 8 |
| 42 | + %i6 = load double, double* null, align 8 |
| 43 | + %mul746 = fmul double 0.000000e+00, %i6 |
| 44 | + %mul747 = fmul double 0.000000e+00, %i5 |
| 45 | + %i7 = call double @llvm.fmuladd.f64(double 0.000000e+00, double 0.000000e+00, double %mul746) |
| 46 | + %i8 = call double @llvm.fmuladd.f64(double %i7, double 0.000000e+00, double %mul747) |
| 47 | + %i9 = call double @llvm.fmuladd.f64(double %i8, double 0.000000e+00, double 0.000000e+00) |
| 48 | + %i10 = call double @llvm.fmuladd.f64(double 0.000000e+00, double %i9, double 0.000000e+00) |
| 49 | + br label %for.cond794.preheader |
| 50 | + |
| 51 | +for.cond794.preheader: ; preds = %for.body602 |
| 52 | + %fullElectEnergy.1.lcssa = phi double [ %i10, %for.body602 ] |
| 53 | + %electEnergy.1.lcssa = phi double [ %i3, %for.body602 ] |
| 54 | + ret void |
| 55 | + |
| 56 | +} |
| 57 | + |
| 58 | +declare double @llvm.fmuladd.f64(double, double, double) |
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