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[AArch64][CostModel] Add cost model for experimental.vector.splice
This patch adds a new ShuffleKind SK_Splice and then handle the cost in getShuffleCost, as in experimental.vector.reverse. Differential Revision: https://reviews.llvm.org/D104630
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8 files changed

+312
-3
lines changed

8 files changed

+312
-3
lines changed

‎llvm/include/llvm/Analysis/TargetTransformInfo.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -858,8 +858,11 @@ class TargetTransformInfo {
858858
SK_ExtractSubvector, ///< ExtractSubvector Index indicates start offset.
859859
SK_PermuteTwoSrc, ///< Merge elements from two source vectors into one
860860
///< with any shuffle mask.
861-
SK_PermuteSingleSrc ///< Shuffle elements of single source vector with any
861+
SK_PermuteSingleSrc, ///< Shuffle elements of single source vector with any
862862
///< shuffle mask.
863+
SK_Splice ///< Concatenates elements from the first input vector
864+
///< with elements of the second input vector. Returning
865+
///< a vector of the same type as the input vectors.
863866
};
864867

865868
/// Kind of the reduction data.

‎llvm/include/llvm/CodeGen/BasicTTIImpl.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -825,6 +825,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
825825
case TTI::SK_Transpose:
826826
case TTI::SK_InsertSubvector:
827827
case TTI::SK_ExtractSubvector:
828+
case TTI::SK_Splice:
828829
break;
829830
}
830831
return Kind;
@@ -838,6 +839,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
838839
case TTI::SK_Broadcast:
839840
return getBroadcastShuffleOverhead(cast<FixedVectorType>(Tp));
840841
case TTI::SK_Select:
842+
case TTI::SK_Splice:
841843
case TTI::SK_Reverse:
842844
case TTI::SK_Transpose:
843845
case TTI::SK_PermuteSingleSrc:
@@ -1371,6 +1373,12 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
13711373
cast<VectorType>(Args[0]->getType()), None,
13721374
0, cast<VectorType>(RetTy));
13731375
}
1376+
case Intrinsic::experimental_vector_splice: {
1377+
unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
1378+
return thisT()->getShuffleCost(TTI::SK_Splice,
1379+
cast<VectorType>(Args[0]->getType()), None,
1380+
Index, cast<VectorType>(RetTy));
1381+
}
13741382
case Intrinsic::vector_reduce_add:
13751383
case Intrinsic::vector_reduce_mul:
13761384
case Intrinsic::vector_reduce_and:

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18508,6 +18508,10 @@ bool AArch64TargetLowering::isAllActivePredicate(SDValue N) const {
1850818508
return ::isAllActivePredicate(N);
1850918509
}
1851018510

18511+
EVT AArch64TargetLowering::getPromotedVTForPredicate(EVT VT) const {
18512+
return ::getPromotedVTForPredicate(VT);
18513+
}
18514+
1851118515
bool AArch64TargetLowering::SimplifyDemandedBitsForTargetNode(
1851218516
SDValue Op, const APInt &OriginalDemandedBits,
1851318517
const APInt &OriginalDemandedElts, KnownBits &Known, TargetLoweringOpt &TLO,

‎llvm/lib/Target/AArch64/AArch64ISelLowering.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -822,6 +822,7 @@ class AArch64TargetLowering : public TargetLowering {
822822
}
823823

824824
bool isAllActivePredicate(SDValue N) const;
825+
EVT getPromotedVTForPredicate(EVT VT) const;
825826

826827
private:
827828
/// Keep a pointer to the AArch64Subtarget around so that we can

‎llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

Lines changed: 52 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -839,6 +839,7 @@ InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
839839
{ ISD::TRUNCATE, MVT::nxv8i1, MVT::nxv8i16, 1 },
840840
{ ISD::TRUNCATE, MVT::nxv8i1, MVT::nxv8i32, 3 },
841841
{ ISD::TRUNCATE, MVT::nxv8i1, MVT::nxv8i64, 5 },
842+
{ ISD::TRUNCATE, MVT::nxv16i1, MVT::nxv16i8, 1 },
842843
{ ISD::TRUNCATE, MVT::nxv2i16, MVT::nxv2i32, 1 },
843844
{ ISD::TRUNCATE, MVT::nxv2i32, MVT::nxv2i64, 1 },
844845
{ ISD::TRUNCATE, MVT::nxv4i16, MVT::nxv4i32, 1 },
@@ -1897,6 +1898,55 @@ AArch64TTIImpl::getArithmeticReductionCost(unsigned Opcode, VectorType *ValTy,
18971898
CostKind);
18981899
}
18991900

1901+
InstructionCost AArch64TTIImpl::getSpliceCost(VectorType *Tp, int Index) {
1902+
static const CostTblEntry ShuffleTbl[] = {
1903+
{ TTI::SK_Splice, MVT::nxv16i8, 1 },
1904+
{ TTI::SK_Splice, MVT::nxv8i16, 1 },
1905+
{ TTI::SK_Splice, MVT::nxv4i32, 1 },
1906+
{ TTI::SK_Splice, MVT::nxv2i64, 1 },
1907+
{ TTI::SK_Splice, MVT::nxv2f16, 1 },
1908+
{ TTI::SK_Splice, MVT::nxv4f16, 1 },
1909+
{ TTI::SK_Splice, MVT::nxv8f16, 1 },
1910+
{ TTI::SK_Splice, MVT::nxv2bf16, 1 },
1911+
{ TTI::SK_Splice, MVT::nxv4bf16, 1 },
1912+
{ TTI::SK_Splice, MVT::nxv8bf16, 1 },
1913+
{ TTI::SK_Splice, MVT::nxv2f32, 1 },
1914+
{ TTI::SK_Splice, MVT::nxv4f32, 1 },
1915+
{ TTI::SK_Splice, MVT::nxv2f64, 1 },
1916+
};
1917+
1918+
std::pair<InstructionCost, MVT> LT = TLI->getTypeLegalizationCost(DL, Tp);
1919+
Type *LegalVTy = EVT(LT.second).getTypeForEVT(Tp->getContext());
1920+
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput;
1921+
EVT PromotedVT = LT.second.getScalarType() == MVT::i1
1922+
? TLI->getPromotedVTForPredicate(EVT(LT.second))
1923+
: LT.second;
1924+
Type *PromotedVTy = EVT(PromotedVT).getTypeForEVT(Tp->getContext());
1925+
InstructionCost LegalizationCost = 0;
1926+
if (Index < 0) {
1927+
LegalizationCost =
1928+
getCmpSelInstrCost(Instruction::ICmp, PromotedVTy, PromotedVTy,
1929+
CmpInst::BAD_ICMP_PREDICATE, CostKind) +
1930+
getCmpSelInstrCost(Instruction::Select, PromotedVTy, LegalVTy,
1931+
CmpInst::BAD_ICMP_PREDICATE, CostKind);
1932+
}
1933+
1934+
// Predicated splice are promoted when lowering. See AArch64ISelLowering.cpp
1935+
// Cost performed on a promoted type.
1936+
if (LT.second.getScalarType() == MVT::i1) {
1937+
LegalizationCost +=
1938+
getCastInstrCost(Instruction::ZExt, PromotedVTy, LegalVTy,
1939+
TTI::CastContextHint::None, CostKind) +
1940+
getCastInstrCost(Instruction::Trunc, LegalVTy, PromotedVTy,
1941+
TTI::CastContextHint::None, CostKind);
1942+
}
1943+
const auto *Entry =
1944+
CostTableLookup(ShuffleTbl, TTI::SK_Splice, PromotedVT.getSimpleVT());
1945+
assert(Entry && "Illegal Type for Splice");
1946+
LegalizationCost += Entry->Cost;
1947+
return LegalizationCost * LT.first;
1948+
}
1949+
19001950
InstructionCost AArch64TTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
19011951
VectorType *Tp,
19021952
ArrayRef<int> Mask, int Index,
@@ -1993,6 +2043,7 @@ InstructionCost AArch64TTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
19932043
if (const auto *Entry = CostTableLookup(ShuffleTbl, Kind, LT.second))
19942044
return LT.first * Entry->Cost;
19952045
}
1996-
2046+
if (Kind == TTI::SK_Splice && isa<ScalableVectorType>(Tp))
2047+
return getSpliceCost(Tp, Index);
19972048
return BaseT::getShuffleCost(Kind, Tp, Mask, Index, SubTp);
19982049
}

‎llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -166,6 +166,8 @@ class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
166166
bool IsPairwiseForm,
167167
TTI::TargetCostKind CostKind);
168168

169+
InstructionCost getSpliceCost(VectorType *Tp, int Index);
170+
169171
InstructionCost getArithmeticInstrCost(
170172
unsigned Opcode, Type *Ty,
171173
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,

‎llvm/test/Analysis/CostModel/AArch64/splice.ll

Lines changed: 94 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,94 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2+
; RUN: opt < %s -analyze -cost-model -S -mtriple=aarch64--linux-gnu | FileCheck %s
3+
4+
define void @vector_splice() #0 {
5+
; CHECK-LABEL: 'vector_splice'
6+
; CHECK-NEXT: Cost Model: Found an estimated cost of 90 for instruction: %splice.v16i8 = call <16 x i8> @llvm.experimental.vector.splice.v16i8(<16 x i8> zeroinitializer, <16 x i8> zeroinitializer, i32 1)
7+
; CHECK-NEXT: Cost Model: Found an estimated cost of 180 for instruction: %splice.v32i8 = call <32 x i8> @llvm.experimental.vector.splice.v32i8(<32 x i8> zeroinitializer, <32 x i8> zeroinitializer, i32 1)
8+
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %splice.v2i16 = call <2 x i16> @llvm.experimental.vector.splice.v2i16(<2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i32 1)
9+
; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %splice.v4i16 = call <4 x i16> @llvm.experimental.vector.splice.v4i16(<4 x i16> zeroinitializer, <4 x i16> zeroinitializer, i32 1)
10+
; CHECK-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %splice.v8i16 = call <8 x i16> @llvm.experimental.vector.splice.v8i16(<8 x i16> zeroinitializer, <8 x i16> zeroinitializer, i32 1)
11+
; CHECK-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %splice.v16i16 = call <16 x i16> @llvm.experimental.vector.splice.v16i16(<16 x i16> zeroinitializer, <16 x i16> zeroinitializer, i32 1)
12+
; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %splice.v4i32 = call <4 x i32> @llvm.experimental.vector.splice.v4i32(<4 x i32> zeroinitializer, <4 x i32> zeroinitializer, i32 1)
13+
; CHECK-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %splice.v8i32 = call <8 x i32> @llvm.experimental.vector.splice.v8i32(<8 x i32> zeroinitializer, <8 x i32> zeroinitializer, i32 1)
14+
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %splice.v2i64 = call <2 x i64> @llvm.experimental.vector.splice.v2i64(<2 x i64> zeroinitializer, <2 x i64> zeroinitializer, i32 1)
15+
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %splice.v4i64 = call <4 x i64> @llvm.experimental.vector.splice.v4i64(<4 x i64> zeroinitializer, <4 x i64> zeroinitializer, i32 1)
16+
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %splice.v2f16 = call <2 x half> @llvm.experimental.vector.splice.v2f16(<2 x half> zeroinitializer, <2 x half> zeroinitializer, i32 1)
17+
; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %splice.v4f16 = call <4 x half> @llvm.experimental.vector.splice.v4f16(<4 x half> zeroinitializer, <4 x half> zeroinitializer, i32 1)
18+
; CHECK-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %splice.v8f16 = call <8 x half> @llvm.experimental.vector.splice.v8f16(<8 x half> zeroinitializer, <8 x half> zeroinitializer, i32 1)
19+
; CHECK-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %splice.v16f16 = call <16 x half> @llvm.experimental.vector.splice.v16f16(<16 x half> zeroinitializer, <16 x half> zeroinitializer, i32 1)
20+
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %splice.v2f32 = call <2 x float> @llvm.experimental.vector.splice.v2f32(<2 x float> zeroinitializer, <2 x float> zeroinitializer, i32 1)
21+
; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %splice.v4f32 = call <4 x float> @llvm.experimental.vector.splice.v4f32(<4 x float> zeroinitializer, <4 x float> zeroinitializer, i32 1)
22+
; CHECK-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %splice.v8f32 = call <8 x float> @llvm.experimental.vector.splice.v8f32(<8 x float> zeroinitializer, <8 x float> zeroinitializer, i32 1)
23+
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %splice.v2f64 = call <2 x double> @llvm.experimental.vector.splice.v2f64(<2 x double> zeroinitializer, <2 x double> zeroinitializer, i32 1)
24+
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %splice.v4f64 = call <4 x double> @llvm.experimental.vector.splice.v4f64(<4 x double> zeroinitializer, <4 x double> zeroinitializer, i32 1)
25+
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %splice.v2bf16 = call <2 x bfloat> @llvm.experimental.vector.splice.v2bf16(<2 x bfloat> zeroinitializer, <2 x bfloat> zeroinitializer, i32 1)
26+
; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %splice.v4bf16 = call <4 x bfloat> @llvm.experimental.vector.splice.v4bf16(<4 x bfloat> zeroinitializer, <4 x bfloat> zeroinitializer, i32 1)
27+
; CHECK-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %splice.v8bf16 = call <8 x bfloat> @llvm.experimental.vector.splice.v8bf16(<8 x bfloat> zeroinitializer, <8 x bfloat> zeroinitializer, i32 1)
28+
; CHECK-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %splice.v16bf16 = call <16 x bfloat> @llvm.experimental.vector.splice.v16bf16(<16 x bfloat> zeroinitializer, <16 x bfloat> zeroinitializer, i32 1)
29+
; CHECK-NEXT: Cost Model: Found an estimated cost of 90 for instruction: %splice.v16i1 = call <16 x i1> @llvm.experimental.vector.splice.v16i1(<16 x i1> zeroinitializer, <16 x i1> zeroinitializer, i32 1)
30+
; CHECK-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %splice.v8i1 = call <8 x i1> @llvm.experimental.vector.splice.v8i1(<8 x i1> zeroinitializer, <8 x i1> zeroinitializer, i32 1)
31+
; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %splice.v4i1 = call <4 x i1> @llvm.experimental.vector.splice.v4i1(<4 x i1> zeroinitializer, <4 x i1> zeroinitializer, i32 1)
32+
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %splice.v2i1 = call <2 x i1> @llvm.experimental.vector.splice.v2i1(<2 x i1> zeroinitializer, <2 x i1> zeroinitializer, i32 1)
33+
;
34+
%splice.v16i8 = call <16 x i8> @llvm.experimental.vector.splice.v16i8(<16 x i8> zeroinitializer, <16 x i8> zeroinitializer, i32 1)
35+
%splice.v32i8 = call <32 x i8> @llvm.experimental.vector.splice.v32i8(<32 x i8> zeroinitializer, <32 x i8> zeroinitializer, i32 1)
36+
%splice.v2i16 = call <2 x i16> @llvm.experimental.vector.splice.v2i16(<2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i32 1)
37+
%splice.v4i16 = call <4 x i16> @llvm.experimental.vector.splice.v4i16(<4 x i16> zeroinitializer, <4 x i16> zeroinitializer, i32 1)
38+
%splice.v8i16 = call <8 x i16> @llvm.experimental.vector.splice.v8i16(<8 x i16> zeroinitializer, <8 x i16> zeroinitializer, i32 1)
39+
%splice.v16i16 = call <16 x i16> @llvm.experimental.vector.splice.v16i16(<16 x i16> zeroinitializer, <16 x i16> zeroinitializer, i32 1)
40+
%splice.v4i32 = call <4 x i32> @llvm.experimental.vector.splice.v4i32(<4 x i32> zeroinitializer, <4 x i32> zeroinitializer, i32 1)
41+
%splice.v8i32 = call <8 x i32> @llvm.experimental.vector.splice.v8i32(<8 x i32> zeroinitializer, <8 x i32> zeroinitializer, i32 1)
42+
%splice.v2i64 = call <2 x i64> @llvm.experimental.vector.splice.v2i64(<2 x i64> zeroinitializer, <2 x i64> zeroinitializer, i32 1)
43+
%splice.v4i64 = call <4 x i64> @llvm.experimental.vector.splice.v4i64(<4 x i64> zeroinitializer, <4 x i64> zeroinitializer, i32 1)
44+
%splice.v2f16 = call <2 x half> @llvm.experimental.vector.splice.v2f16(<2 x half> zeroinitializer, <2 x half> zeroinitializer, i32 1)
45+
%splice.v4f16 = call <4 x half> @llvm.experimental.vector.splice.v4f16(<4 x half> zeroinitializer, <4 x half> zeroinitializer, i32 1)
46+
%splice.v8f16 = call <8 x half> @llvm.experimental.vector.splice.v8f16(<8 x half> zeroinitializer, <8 x half> zeroinitializer, i32 1)
47+
%splice.v16f16 = call <16 x half> @llvm.experimental.vector.splice.v16f16(<16 x half> zeroinitializer, <16 x half> zeroinitializer, i32 1)
48+
%splice.v2f32 = call <2 x float> @llvm.experimental.vector.splice.v2f32(<2 x float> zeroinitializer, <2 x float> zeroinitializer, i32 1)
49+
%splice.v4f32 = call <4 x float> @llvm.experimental.vector.splice.v4f32(<4 x float> zeroinitializer, <4 x float> zeroinitializer, i32 1)
50+
%splice.v8f32 = call <8 x float> @llvm.experimental.vector.splice.v8f32(<8 x float> zeroinitializer, <8 x float> zeroinitializer, i32 1)
51+
%splice.v2f64 = call <2 x double> @llvm.experimental.vector.splice.v2f64(<2 x double> zeroinitializer, <2 x double> zeroinitializer, i32 1)
52+
%splice.v4f64 = call <4 x double> @llvm.experimental.vector.splice.v4f64(<4 x double> zeroinitializer, <4 x double> zeroinitializer, i32 1)
53+
%splice.v2bf16 = call <2 x bfloat> @llvm.experimental.vector.splice.v2bf16(<2 x bfloat> zeroinitializer, <2 x bfloat> zeroinitializer, i32 1)
54+
%splice.v4bf16 = call <4 x bfloat> @llvm.experimental.vector.splice.v4bf16(<4 x bfloat> zeroinitializer, <4 x bfloat> zeroinitializer, i32 1)
55+
%splice.v8bf16 = call <8 x bfloat> @llvm.experimental.vector.splice.v8bf16(<8 x bfloat> zeroinitializer, <8 x bfloat> zeroinitializer, i32 1)
56+
%splice.v16bf16 = call <16 x bfloat> @llvm.experimental.vector.splice.v16bf16(<16 x bfloat> zeroinitializer, <16 x bfloat> zeroinitializer, i32 1)
57+
%splice.v16i1 = call <16 x i1> @llvm.experimental.vector.splice.v16i1(<16 x i1> zeroinitializer, <16 x i1> zeroinitializer, i32 1)
58+
%splice.v8i1 = call <8 x i1> @llvm.experimental.vector.splice.v8i1(<8 x i1> zeroinitializer, <8 x i1> zeroinitializer, i32 1)
59+
%splice.v4i1 = call <4 x i1> @llvm.experimental.vector.splice.v4i1(<4 x i1> zeroinitializer, <4 x i1> zeroinitializer, i32 1)
60+
%splice.v2i1 = call <2 x i1> @llvm.experimental.vector.splice.v2i1(<2 x i1> zeroinitializer, <2 x i1> zeroinitializer, i32 1)
61+
ret void
62+
}
63+
64+
declare <2 x i1> @llvm.experimental.vector.splice.v2i1(<2 x i1>, <2 x i1>, i32)
65+
declare <4 x i1> @llvm.experimental.vector.splice.v4i1(<4 x i1>, <4 x i1>, i32)
66+
declare <8 x i1> @llvm.experimental.vector.splice.v8i1(<8 x i1>, <8 x i1>, i32)
67+
declare <16 x i1> @llvm.experimental.vector.splice.v16i1(<16 x i1>, <16 x i1>, i32)
68+
declare <2 x i8> @llvm.experimental.vector.splice.v2i8(<2 x i8>, <2 x i8>, i32)
69+
declare <16 x i8> @llvm.experimental.vector.splice.v16i8(<16 x i8>, <16 x i8>, i32)
70+
declare <32 x i8> @llvm.experimental.vector.splice.v32i8(<32 x i8>, <32 x i8>, i32)
71+
declare <2 x i16> @llvm.experimental.vector.splice.v2i16(<2 x i16>, <2 x i16>, i32)
72+
declare <4 x i16> @llvm.experimental.vector.splice.v4i16(<4 x i16>, <4 x i16>, i32)
73+
declare <8 x i16> @llvm.experimental.vector.splice.v8i16(<8 x i16>, <8 x i16>, i32)
74+
declare <16 x i16> @llvm.experimental.vector.splice.v16i16(<16 x i16>, <16 x i16>, i32)
75+
declare <4 x i32> @llvm.experimental.vector.splice.v4i32(<4 x i32>, <4 x i32>, i32)
76+
declare <8 x i32> @llvm.experimental.vector.splice.v8i32(<8 x i32>, <8 x i32>, i32)
77+
declare <2 x i64> @llvm.experimental.vector.splice.v2i64(<2 x i64>, <2 x i64>, i32)
78+
declare <4 x i64> @llvm.experimental.vector.splice.v4i64(<4 x i64>, <4 x i64>, i32)
79+
declare <2 x half> @llvm.experimental.vector.splice.v2f16(<2 x half>, <2 x half>, i32)
80+
declare <4 x half> @llvm.experimental.vector.splice.v4f16(<4 x half>, <4 x half>, i32)
81+
declare <8 x half> @llvm.experimental.vector.splice.v8f16(<8 x half>, <8 x half>, i32)
82+
declare <16 x half> @llvm.experimental.vector.splice.v16f16(<16 x half>, <16 x half>, i32)
83+
declare <2 x bfloat> @llvm.experimental.vector.splice.v2bf16(<2 x bfloat>, <2 x bfloat>, i32)
84+
declare <4 x bfloat> @llvm.experimental.vector.splice.v4bf16(<4 x bfloat>, <4 x bfloat>, i32)
85+
declare <8 x bfloat> @llvm.experimental.vector.splice.v8bf16(<8 x bfloat>, <8 x bfloat>, i32)
86+
declare <16 x bfloat> @llvm.experimental.vector.splice.v16bf16(<16 x bfloat>, <16 x bfloat>, i32)
87+
declare <2 x float> @llvm.experimental.vector.splice.v2f32(<2 x float>, <2 x float>, i32)
88+
declare <4 x float> @llvm.experimental.vector.splice.v4f32(<4 x float>, <4 x float>, i32)
89+
declare <8 x float> @llvm.experimental.vector.splice.v8f32(<8 x float>, <8 x float>, i32)
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declare <16 x float> @llvm.experimental.vector.splice.v16f32(<16 x float>, <16 x float>, i32)
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declare <2 x double> @llvm.experimental.vector.splice.v2f64(<2 x double>, <2 x double>, i32)
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declare <4 x double> @llvm.experimental.vector.splice.v4f64(<4 x double>, <4 x double>, i32)
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attributes #0 = { "target-features"="+bf16" }

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