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[llvm][InstCombine] Fold select to cmp for weak and inverted inequalities (llvm#143445)
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‎llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

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Original file line numberDiff line numberDiff line change
@@ -3631,6 +3631,28 @@ Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) {
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if (!LHS->getType()->isIntOrIntVectorTy())
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return nullptr;
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3634+
// If there is no -1, 0 or 1 at TV, then invert the select statement and try
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// to canonicalize to one of the forms above
3636+
if (!isa<Constant>(TV)) {
3637+
if (!isa<Constant>(FV))
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return nullptr;
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Pred = ICmpInst::getInverseCmpPredicate(Pred);
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std::swap(TV, FV);
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}
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if (ICmpInst::isNonStrictPredicate(Pred)) {
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if (Constant *C = dyn_cast<Constant>(RHS)) {
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auto FlippedPredAndConst =
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getFlippedStrictnessPredicateAndConstant(Pred, C);
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if (!FlippedPredAndConst)
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return nullptr;
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Pred = FlippedPredAndConst->first;
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RHS = FlippedPredAndConst->second;
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} else {
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return nullptr;
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}
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}
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// Try to swap operands and the predicate. We need to be careful when doing
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// so because two of the patterns have opposite predicates, so use the
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// constant inside select to determine if swapping operands would be

‎llvm/test/Transforms/InstCombine/select-to-cmp.ll

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@@ -0,0 +1,293 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes=instcombine -S < %s | FileCheck %s
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; Tests for select to scmp
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define i32 @scmp_x_0_inverted(i32 %x) {
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; CHECK-LABEL: define i32 @scmp_x_0_inverted(
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; CHECK-SAME: i32 [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 0)
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%2 = icmp ne i32 %x, 0
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%3 = zext i1 %2 to i32
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%4 = icmp sgt i32 %x, -1
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%5 = select i1 %4, i32 %3, i32 -1
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ret i32 %5
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}
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; y = -10
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define i32 @scmp_x_0_inverted_const_neg10(i32 %x) {
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; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_neg10(
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; CHECK-SAME: i32 [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 -10)
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%1 = icmp ne i32 %x, -10
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%2 = zext i1 %1 to i32
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%3 = icmp sgt i32 %x, -11
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%4 = select i1 %3, i32 %2, i32 -1
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ret i32 %4
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}
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; y = 7 (i8)
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define i8 @scmp_x_0_inverted_i8(i8 %x) {
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; CHECK-LABEL: define i8 @scmp_x_0_inverted_i8(
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; CHECK-SAME: i8 [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.scmp.i8.i8(i8 [[X]], i8 7)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%1 = icmp ne i8 %x, 7
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%2 = zext i1 %1 to i8
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%3 = icmp sgt i8 %x, 6
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%4 = select i1 %3, i8 %2, i8 -1
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ret i8 %4
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}
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; scmp using ints of two kinds- i32 and i64
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define i32 @scmp_x_0_inverted_i64_neq(i32 %x) {
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; CHECK-LABEL: define i32 @scmp_x_0_inverted_i64_neq(
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; CHECK-SAME: i32 [[X:%.*]]) {
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; CHECK-NEXT: [[SEL:%.*]] = call i64 @llvm.scmp.i64.i32(i32 [[X]], i32 0)
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; CHECK-NEXT: [[RET:%.*]] = trunc i64 [[SEL]] to i32
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%x64 = sext i32 %x to i64
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%cmp1 = icmp ne i64 %x64, 0
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%zext = zext i1 %cmp1 to i64
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%cmp2 = icmp sgt i64 %x64, -1
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%sel = select i1 %cmp2, i64 %zext, i64 -1
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%ret = trunc i64 %sel to i32
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ret i32 %ret
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}
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64+
; Same example as previous but with inequality
65+
define i32 @scmp_x_0_inverted_i64_sgt(i32 %x) {
66+
; CHECK-LABEL: define i32 @scmp_x_0_inverted_i64_sgt(
67+
; CHECK-SAME: i32 [[X:%.*]]) {
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; CHECK-NEXT: [[SEL:%.*]] = call i64 @llvm.scmp.i64.i32(i32 [[X]], i32 0)
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; CHECK-NEXT: [[RET:%.*]] = trunc i64 [[SEL]] to i32
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; CHECK-NEXT: ret i32 [[RET]]
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;
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%x64 = sext i32 %x to i64
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%cmp1 = icmp sgt i64 %x64, 0
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%zext = zext i1 %cmp1 to i64
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%cmp2 = icmp sgt i64 %x64, -1
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%sel = select i1 %cmp2, i64 %zext, i64 -1
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%ret = trunc i64 %sel to i32
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ret i32 %ret
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}
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; y = -1000
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define i32 @scmp_x_0_inverted_const_neg1000(i32 %x) {
83+
; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_neg1000(
84+
; CHECK-SAME: i32 [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 -1000)
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%1 = icmp sgt i32 %x, -1000
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%2 = zext i1 %1 to i32
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%3 = icmp sgt i32 %x, -1001
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%4 = select i1 %3, i32 %2, i32 -1
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ret i32 %4
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}
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; y = 1729
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define i32 @scmp_x_0_inverted_const_1729_sgt(i32 %x) {
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; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_1729_sgt(
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; CHECK-SAME: i32 [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 1729)
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%1 = icmp sgt i32 %x, 1729
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%2 = zext i1 %1 to i32
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%3 = icmp sgt i32 %x, 1728
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%4 = select i1 %3, i32 %2, i32 -1
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ret i32 %4
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}
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; ucmp with 10
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define i32 @ucmp_x_10_inverted(i32 %x) {
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; CHECK-LABEL: define i32 @ucmp_x_10_inverted(
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; CHECK-SAME: i32 [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ucmp.i32.i32(i32 [[X]], i32 10)
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%1 = icmp ne i32 %x, 10
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%2 = zext i1 %1 to i32
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%3 = icmp ugt i32 %x, 9
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%4 = select i1 %3, i32 %2, i32 -1
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ret i32 %4
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}
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; ucmp with -3, wraps around
124+
define i32 @ucmp_x_neg1_inverted(i32 %x) {
125+
; CHECK-LABEL: define i32 @ucmp_x_neg1_inverted(
126+
; CHECK-SAME: i32 [[X:%.*]]) {
127+
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ucmp.i32.i32(i32 [[X]], i32 -3)
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; CHECK-NEXT: ret i32 [[TMP1]]
129+
;
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%1 = icmp ne i32 %x, -3
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%2 = zext i1 %1 to i32
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%3 = icmp ugt i32 %x, -4
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%4 = select i1 %3, i32 %2, i32 -1
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ret i32 %4
135+
}
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; ucmp with -4, wraps around
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define i8 @ucmp_x_neg4_i8_ugt(i8 %x) {
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; CHECK-LABEL: define i8 @ucmp_x_neg4_i8_ugt(
140+
; CHECK-SAME: i8 [[X:%.*]]) {
141+
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ucmp.i8.i8(i8 [[X]], i8 -4)
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%1 = icmp ugt i8 %x, -4
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%2 = zext i1 %1 to i8
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%3 = icmp ugt i8 %x, -5
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%4 = select i1 %3, i8 %2, i8 -1
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ret i8 %4
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}
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; Vector tests
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; Test with splat vec
154+
define <4 x i32> @scmp_x_0_inverted_splat_vec(<4 x i32> %x) {
155+
; CHECK-LABEL: define <4 x i32> @scmp_x_0_inverted_splat_vec(
156+
; CHECK-SAME: <4 x i32> [[X:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.scmp.v4i32.v4i32(<4 x i32> [[X]], <4 x i32> zeroinitializer)
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%2 = icmp ne <4 x i32> %x, zeroinitializer
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%3 = zext <4 x i1> %2 to <4 x i32>
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%4 = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
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%5 = select <4 x i1> %4, <4 x i32> %3, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
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ret <4 x i32> %5
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}
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; Test with non-splat vector and different bitwidth
168+
define <4 x i32> @non_splat_vec_scmp_diff_bitwidth(<4 x i32> %x) {
169+
; CHECK-LABEL: define <4 x i32> @non_splat_vec_scmp_diff_bitwidth(
170+
; CHECK-SAME: <4 x i32> [[X:%.*]]) {
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; CHECK-NEXT: [[SEL:%.*]] = call <4 x i64> @llvm.scmp.v4i64.v4i32(<4 x i32> [[X]], <4 x i32> <i32 0, i32 1, i32 -1, i32 5>)
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; CHECK-NEXT: [[RET:%.*]] = trunc <4 x i64> [[SEL]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[RET]]
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;
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%x64 = sext <4 x i32> %x to <4 x i64>
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%cmp1 = icmp slt <4 x i64> %x64, <i64 0, i64 1, i64 -1, i64 5>
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%sext = sext <4 x i1> %cmp1 to <4 x i64>
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%cmp2 = icmp slt <4 x i64> %x64, <i64 1, i64 2, i64 0, i64 6>
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%sel = select <4 x i1> %cmp2, <4 x i64> %sext, <4 x i64> <i64 1, i64 1, i64 1, i64 1>
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%ret = trunc <4 x i64> %sel to <4 x i32>
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ret <4 x i32> %ret
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}
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; Negative examples
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; Not scmp due to wrong RHS of the predicate
187+
define i32 @scmp_ne_0(i32 %0) {
188+
; CHECK-LABEL: define i32 @scmp_ne_0(
189+
; CHECK-SAME: i32 [[TMP0:%.*]]) {
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP0]], 0
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; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
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; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[TMP0]], 1
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; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 -1
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; CHECK-NEXT: ret i32 [[TMP5]]
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;
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%2 = icmp ne i32 %0, 0
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%3 = zext i1 %2 to i32
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%4 = icmp sgt i32 %0, 1
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%5 = select i1 %4, i32 %3, i32 -1
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ret i32 %5
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}
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; y = 0 with unsigned compare but RHS wraps
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define i32 @ucmp_x_0_inverted(i32 %x) {
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; CHECK-LABEL: define i32 @ucmp_x_0_inverted(
206+
; CHECK-SAME: i32 [[X:%.*]]) {
207+
; CHECK-NEXT: ret i32 -1
208+
;
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%1 = icmp ne i32 %x, 0
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%2 = zext i1 %1 to i32
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%3 = icmp ugt i32 %x, -1
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%4 = select i1 %3, i32 %2, i32 -1
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ret i32 %4
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}
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; Don't fold with INT32_MIN
217+
define i32 @scmp_x_0_inverted_const_min(i32 %x) {
218+
; CHECK-LABEL: define i32 @scmp_x_0_inverted_const_min(
219+
; CHECK-SAME: i32 [[X:%.*]]) {
220+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X]], -2147483648
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; CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i32
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; CHECK-NEXT: ret i32 [[TMP2]]
223+
;
224+
%1 = icmp ne i32 %x, -2147483648
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%2 = zext i1 %1 to i32
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%3 = icmp sge i32 %x, -2147483648
227+
%4 = select i1 %3, i32 %2, i32 -1
228+
ret i32 %4
229+
}
230+
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; Unsigned cmp of zext of i32 with i64 -1 should always be -1
232+
define i32 @ucmp_x_0_inverted_i64_ugt(i32 %x) {
233+
; CHECK-LABEL: define i32 @ucmp_x_0_inverted_i64_ugt(
234+
; CHECK-SAME: i32 [[X:%.*]]) {
235+
; CHECK-NEXT: ret i32 -1
236+
;
237+
%x64 = zext i32 %x to i64
238+
%cmp1 = icmp ugt i64 %x64, 0
239+
%zext = zext i1 %cmp1 to i64
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%cmp2 = icmp ugt i64 %x64, -1
241+
%sel = select i1 %cmp2, i64 %zext, i64 -1
242+
%ret = trunc i64 %sel to i32
243+
ret i32 %ret
244+
}
245+
246+
; y = 4294967295 (UINT32_MAX), simply sign extend neq
247+
define i32 @ucmp_x_const_u32max(i32 %x) {
248+
; CHECK-LABEL: define i32 @ucmp_x_const_u32max(
249+
; CHECK-SAME: i32 [[X:%.*]]) {
250+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[X]], -1
251+
; CHECK-NEXT: [[TMP2:%.*]] = sext i1 [[TMP1]] to i32
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; CHECK-NEXT: ret i32 [[TMP2]]
253+
;
254+
%1 = icmp ugt i32 %x, 4294967295
255+
%2 = zext i1 %1 to i32
256+
%3 = icmp ugt i32 %x, 4294967294
257+
%4 = select i1 %3, i32 %2, i32 -1
258+
ret i32 %4
259+
}
260+
261+
; Don't fold with different signedness
262+
define i32 @different_signedness_neg(i32 %x) {
263+
; CHECK-LABEL: define i32 @different_signedness_neg(
264+
; CHECK-SAME: i32 [[X:%.*]]) {
265+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X]], -10
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; CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i32
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; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[X]], -11
268+
; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 -1
269+
; CHECK-NEXT: ret i32 [[TMP4]]
270+
;
271+
%1 = icmp ugt i32 %x, -10
272+
%2 = zext i1 %1 to i32
273+
%3 = icmp sgt i32 %x, -11
274+
%4 = select i1 %3, i32 %2, i32 -1
275+
ret i32 %4
276+
}
277+
278+
; Test with wrong false value
279+
define <4 x i32> @scmp_x_0_inverted_vec(<4 x i32> %x) {
280+
; CHECK-LABEL: define <4 x i32> @scmp_x_0_inverted_vec(
281+
; CHECK-SAME: <4 x i32> [[X:%.*]]) {
282+
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <4 x i32> [[X]], zeroinitializer
283+
; CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i1> [[TMP1]] to <4 x i32>
284+
; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt <4 x i32> [[X]], splat (i32 -1)
285+
; CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> [[TMP3]], <4 x i32> [[TMP2]], <4 x i32> <i32 -1, i32 -2, i32 -1, i32 -1>
286+
; CHECK-NEXT: ret <4 x i32> [[TMP4]]
287+
;
288+
%2 = icmp ne <4 x i32> %x, zeroinitializer
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%3 = zext <4 x i1> %2 to <4 x i32>
290+
%4 = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
291+
%5 = select <4 x i1> %4, <4 x i32> %3, <4 x i32> <i32 -1, i32 -2, i32 -1, i32 -1>
292+
ret <4 x i32> %5
293+
}

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