Skip to content

Commit a91dd3d

Browse files
committed
[VE] Add VGT/VSC/PFCHV instructions
Add VGT/VSC/PFCHV vector instructions and regression tests. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D89471
1 parent 410e5b1 commit a91dd3d

File tree

4 files changed

+263
-0
lines changed

4 files changed

+263
-0
lines changed

llvm/lib/Target/VE/VEInstrVec.td

Lines changed: 139 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -144,3 +144,142 @@ defm VSTU2D : VSTm<"vstu2d", 0xd2, V64>;
144144

145145
// Section 8.9.12 - VSTL2D (Vector Store Lower 2D)
146146
defm VSTL2D : VSTm<"vstl2d", 0xd3, V64>;
147+
148+
// Multiclass for VGT instructions
149+
let mayLoad = 1, hasSideEffects = 0, Uses = [VL] in
150+
multiclass VGTbm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
151+
dag dag_in, string disEnc = ""> {
152+
let DisableEncoding = disEnc in
153+
def "" : RVM<opc, (outs RC:$vx), dag_in,
154+
!strconcat(opcStr, " $vx, ", argStr)>;
155+
let Constraints = "$vx = $base", DisableEncoding = disEnc#"$base",
156+
isCodeGenOnly = 1 in
157+
def _v : RVM<opc, (outs RC:$vx), !con(dag_in, (ins RC:$base)),
158+
!strconcat(opcStr, " $vx, ", argStr)>;
159+
}
160+
multiclass VGTlm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
161+
dag dag_in> {
162+
defm "" : VGTbm<opcStr, argStr, opc, RC, dag_in>;
163+
let isCodeGenOnly = 1, VE_VLInUse = 1 in {
164+
defm l : VGTbm<opcStr, argStr, opc, RC, !con(dag_in, (ins I32:$vl)),
165+
"$vl,">;
166+
defm L : VGTbm<opcStr, argStr, opc, RC, !con(dag_in, (ins VLS:$vl)),
167+
"$vl,">;
168+
}
169+
}
170+
multiclass VGTmm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
171+
dag dag_in> {
172+
defm "" : VGTlm<opcStr, argStr, opc, RC, dag_in>;
173+
let m = ?, VE_VLWithMask = 1 in
174+
defm m : VGTlm<opcStr, argStr#", $m", opc, RC, !con(dag_in, (ins VM:$m))>;
175+
}
176+
let VE_VLIndex = 4 in
177+
multiclass VGTlhm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
178+
dag dag_in> {
179+
defm rr : VGTmm<opcStr, argStr#", $sy, $sz", opc, RC,
180+
!con(dag_in, (ins I64:$sy, I64:$sz))>;
181+
let cy = 0 in
182+
defm ir : VGTmm<opcStr, argStr#", $sy, $sz", opc, RC,
183+
!con(dag_in, (ins simm7:$sy, I64:$sz))>;
184+
let cz = 0 in
185+
defm rz : VGTmm<opcStr, argStr#", $sy, $sz", opc, RC,
186+
!con(dag_in, (ins I64:$sy, zero:$sz))>;
187+
let cy = 0, cz = 0 in
188+
defm iz : VGTmm<opcStr, argStr#", $sy, $sz", opc, RC,
189+
!con(dag_in, (ins simm7:$sy, zero:$sz))>;
190+
}
191+
multiclass VGTtgm<string opcStr, bits<8>opc, RegisterClass RC> {
192+
let vy = ? in defm v : VGTlhm<opcStr, "$vy", opc, RC, (ins V64:$vy)>;
193+
let cs = 1, sw = ? in defm s : VGTlhm<opcStr, "$sw", opc, RC, (ins I64:$sw)>;
194+
}
195+
multiclass VGTm<string opcStr, bits<8>opc, RegisterClass RC> {
196+
let vc = 1 in defm "" : VGTtgm<opcStr, opc, RC>;
197+
let vc = 0 in defm NC : VGTtgm<opcStr#".nc", opc, RC>;
198+
}
199+
200+
// Section 8.9.13 - VGT (Vector Gather)
201+
defm VGT : VGTm<"vgt", 0xa1, V64>;
202+
203+
// Section 8.9.14 - VGTU (Vector Gather Upper)
204+
defm VGTU : VGTm<"vgtu", 0xa2, V64>;
205+
206+
// Section 8.9.15 - VGTL (Vector Gather Lower)
207+
defm VGTLSX : VGTm<"vgtl.sx", 0xa3, V64>;
208+
let cx = 1 in defm VGTLZX : VGTm<"vgtl.zx", 0xa3, V64>;
209+
def : MnemonicAlias<"vgtl", "vgtl.zx">;
210+
def : MnemonicAlias<"vgtl.nc", "vgtl.zx.nc">;
211+
212+
// Multiclass for VSC instructions
213+
let mayStore = 1, hasSideEffects = 0, Uses = [VL] in
214+
multiclass VSCbm<string opcStr, string argStr, bits<8>opc, dag dag_in> {
215+
def "" : RVM<opc, (outs), dag_in, !strconcat(opcStr, argStr)>;
216+
let DisableEncoding = "$vl", isCodeGenOnly = 1, VE_VLInUse = 1 in {
217+
def l : RVM<opc, (outs), !con(dag_in, (ins I32:$vl)),
218+
!strconcat(opcStr, argStr)>;
219+
def L : RVM<opc, (outs), !con(dag_in, (ins VLS:$vl)),
220+
!strconcat(opcStr, argStr)>;
221+
}
222+
}
223+
multiclass VSCmm<string opcStr, string argStr, bits<8>opc, dag dag_in> {
224+
defm "" : VSCbm<opcStr, argStr, opc, dag_in>;
225+
let m = ?, VE_VLWithMask = 1 in
226+
defm m : VSCbm<opcStr, argStr#", $m", opc, !con(dag_in, (ins VM:$m))>;
227+
}
228+
let VE_VLIndex = 4 in
229+
multiclass VSClhm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
230+
dag dag_in> {
231+
defm rrv : VSCmm<opcStr, " $vx, "#argStr#", $sy, $sz", opc,
232+
!con(dag_in, (ins I64:$sy, I64:$sz, RC:$vx))>;
233+
let cy = 0 in
234+
defm irv : VSCmm<opcStr, " $vx, "#argStr#", $sy, $sz", opc,
235+
!con(dag_in, (ins simm7:$sy, I64:$sz, RC:$vx))>;
236+
let cz = 0 in
237+
defm rzv : VSCmm<opcStr, " $vx, "#argStr#", $sy, $sz", opc,
238+
!con(dag_in, (ins I64:$sy, zero:$sz, RC:$vx))>;
239+
let cy = 0, cz = 0 in
240+
defm izv : VSCmm<opcStr, " $vx, "#argStr#", $sy, $sz", opc,
241+
!con(dag_in, (ins simm7:$sy, zero:$sz, RC:$vx))>;
242+
}
243+
multiclass VSCtgm<string opcStr, bits<8>opc, RegisterClass RC> {
244+
let vy = ? in defm v : VSClhm<opcStr, "$vy", opc, RC, (ins V64:$vy)>;
245+
let cs = 1, sw = ? in defm s : VSClhm<opcStr, "$sw", opc, RC, (ins I64:$sw)>;
246+
}
247+
multiclass VSCm<string opcStr, bits<8>opc, RegisterClass RC> {
248+
let vc = 1, cx = 0 in defm "" : VSCtgm<opcStr, opc, RC>;
249+
let vc = 0, cx = 0 in defm NC : VSCtgm<opcStr#".nc", opc, RC>;
250+
let vc = 1, cx = 1 in defm OT : VSCtgm<opcStr#".ot", opc, RC>;
251+
let vc = 0, cx = 1 in defm NCOT : VSCtgm<opcStr#".nc.ot", opc, RC>;
252+
}
253+
254+
// Section 8.9.16 - VSC (Vector Scatter)
255+
defm VSC : VSCm<"vsc", 0xb1, V64>;
256+
257+
// Section 8.9.17 - VSCU (Vector Scatter Upper)
258+
defm VSCU : VSCm<"vscu", 0xb2, V64>;
259+
260+
// Section 8.9.18 - VSCL (Vector Scatter Lower)
261+
defm VSCL : VSCm<"vscl", 0xb3, V64>;
262+
263+
// Section 8.9.19 - PFCHV (Prefetch Vector)
264+
let Uses = [VL] in
265+
multiclass PFCHVbm<string opcStr, string argStr, bits<8>opc, dag dag_in> {
266+
def "" : RVM<opc, (outs), dag_in, !strconcat(opcStr, argStr)>;
267+
let DisableEncoding = "$vl", isCodeGenOnly = 1, VE_VLInUse = 1 in {
268+
def l : RVM<opc, (outs), !con(dag_in, (ins I32:$vl)),
269+
!strconcat(opcStr, argStr)>;
270+
def L : RVM<opc, (outs), !con(dag_in, (ins VLS:$vl)),
271+
!strconcat(opcStr, argStr)>;
272+
}
273+
}
274+
let VE_VLIndex = 2 in
275+
multiclass PFCHVm<string opcStr, bits<8>opc> {
276+
defm rr : PFCHVbm<opcStr, " $sy, $sz", opc, (ins I64:$sy, I64:$sz)>;
277+
let cy = 0 in
278+
defm ir : PFCHVbm<opcStr, " $sy, $sz", opc, (ins simm7:$sy, I64:$sz)>;
279+
let cz = 0 in
280+
defm rz : PFCHVbm<opcStr, " $sy, $sz", opc, (ins I64:$sy, zero:$sz)>;
281+
let cy = 0, cz = 0 in
282+
defm iz : PFCHVbm<opcStr, " $sy, $sz", opc, (ins simm7:$sy, zero:$sz)>;
283+
}
284+
let vc = 1, vx = 0 in defm PFCHV : PFCHVm<"pfchv", 0x80>;
285+
let vc = 0, vx = 0 in defm PFCHVNC : PFCHVm<"pfchv.nc", 0x80>;

llvm/test/MC/VE/PFCHV.s

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
# RUN: llvm-mc -triple=ve --show-encoding < %s \
2+
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3+
# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
4+
# RUN: | FileCheck %s --check-prefixes=CHECK-INST
5+
6+
# CHECK-INST: pfchv 32, 0
7+
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x20,0x40,0x80]
8+
pfchv 32, 0
9+
10+
# CHECK-INST: pfchv.nc %s11, 0
11+
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8b,0x00,0x80]
12+
pfchv.nc %s11, 0
13+
14+
# CHECK-INST: pfchv -4, %s13
15+
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x8d,0x7c,0x40,0x80]
16+
pfchv -4, %s13
17+
18+
# CHECK-INST: pfchv.nc %s10, %s60
19+
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0xbc,0x8a,0x00,0x80]
20+
pfchv.nc %s10, %s60

llvm/test/MC/VE/VGT.s

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
# RUN: llvm-mc -triple=ve --show-encoding < %s \
2+
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3+
# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
4+
# RUN: | FileCheck %s --check-prefixes=CHECK-INST
5+
6+
# CHECK-INST: vgt %v11, %v13, 23, %s12
7+
# CHECK-ENCODING: encoding: [0x00,0x00,0x0d,0x0b,0x8c,0x17,0x40,0xa1]
8+
vgt %v11, %v13, 23, %s12
9+
10+
# CHECK-INST: vgt.nc %vix, %s12, 63, 0
11+
# CHECK-ENCODING: encoding: [0x0c,0x00,0x00,0xff,0x00,0x3f,0x20,0xa1]
12+
vgt.nc %vix, %s12, 63, 0
13+
14+
# CHECK-INST: vgt %v63, %vix, -64, %s63
15+
# CHECK-ENCODING: encoding: [0x00,0x00,0xff,0x3f,0xbf,0x40,0x40,0xa1]
16+
vgt %v63, %vix, -64, %s63
17+
18+
# CHECK-INST: vgt.nc %v12, %v63, %s12, 0, %vm3
19+
# CHECK-ENCODING: encoding: [0x00,0x00,0x3f,0x0c,0x00,0x8c,0x03,0xa1]
20+
vgt.nc %v12, %v63, %s12, 0, %vm3
21+
22+
# CHECK-INST: vgtu %v11, %v13, 23, %s12
23+
# CHECK-ENCODING: encoding: [0x00,0x00,0x0d,0x0b,0x8c,0x17,0x40,0xa2]
24+
vgtu %v11, %v13, 23, %s12
25+
26+
# CHECK-INST: vgtu.nc %vix, %s12, 63, 0
27+
# CHECK-ENCODING: encoding: [0x0c,0x00,0x00,0xff,0x00,0x3f,0x20,0xa2]
28+
vgtu.nc %vix, %s12, 63, 0
29+
30+
# CHECK-INST: vgtu %v63, %vix, -64, %s63
31+
# CHECK-ENCODING: encoding: [0x00,0x00,0xff,0x3f,0xbf,0x40,0x40,0xa2]
32+
vgtu %v63, %vix, -64, %s63
33+
34+
# CHECK-INST: vgtu.nc %v12, %v63, %s12, 0, %vm3
35+
# CHECK-ENCODING: encoding: [0x00,0x00,0x3f,0x0c,0x00,0x8c,0x03,0xa2]
36+
vgtu.nc %v12, %v63, %s12, 0, %vm3
37+
38+
# CHECK-INST: vgtl.sx %v11, %v13, 23, %s12
39+
# CHECK-ENCODING: encoding: [0x00,0x00,0x0d,0x0b,0x8c,0x17,0x40,0xa3]
40+
vgtl.sx %v11, %v13, 23, %s12
41+
42+
# CHECK-INST: vgtl.zx.nc %vix, %s12, 63, 0
43+
# CHECK-ENCODING: encoding: [0x0c,0x00,0x00,0xff,0x00,0x3f,0xa0,0xa3]
44+
vgtl.nc %vix, %s12, 63, 0
45+
46+
# CHECK-INST: vgtl.zx %v63, %vix, -64, %s63
47+
# CHECK-ENCODING: encoding: [0x00,0x00,0xff,0x3f,0xbf,0x40,0xc0,0xa3]
48+
vgtl.zx %v63, %vix, -64, %s63
49+
50+
# CHECK-INST: vgtl.sx.nc %v12, %v63, %s12, 0, %vm3
51+
# CHECK-ENCODING: encoding: [0x00,0x00,0x3f,0x0c,0x00,0x8c,0x03,0xa3]
52+
vgtl.sx.nc %v12, %v63, %s12, 0, %vm3

llvm/test/MC/VE/VSC.s

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
# RUN: llvm-mc -triple=ve --show-encoding < %s \
2+
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3+
# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
4+
# RUN: | FileCheck %s --check-prefixes=CHECK-INST
5+
6+
# CHECK-INST: vsc %v11, %v13, 23, %s12
7+
# CHECK-ENCODING: encoding: [0x00,0x00,0x0d,0x0b,0x8c,0x17,0x40,0xb1]
8+
vsc %v11, %v13, 23, %s12
9+
10+
# CHECK-INST: vsc.nc %vix, %s12, 63, 0
11+
# CHECK-ENCODING: encoding: [0x0c,0x00,0x00,0xff,0x00,0x3f,0x20,0xb1]
12+
vsc.nc %vix, %s12, 63, 0
13+
14+
# CHECK-INST: vsc.ot %v63, %vix, -64, %s63
15+
# CHECK-ENCODING: encoding: [0x00,0x00,0xff,0x3f,0xbf,0x40,0xc0,0xb1]
16+
vsc.ot %v63, %vix, -64, %s63
17+
18+
# CHECK-INST: vsc.nc.ot %v12, %v63, %s12, 0, %vm3
19+
# CHECK-ENCODING: encoding: [0x00,0x00,0x3f,0x0c,0x00,0x8c,0x83,0xb1]
20+
vsc.nc.ot %v12, %v63, %s12, 0, %vm3
21+
22+
# CHECK-INST: vscu %v11, %v13, 23, %s12
23+
# CHECK-ENCODING: encoding: [0x00,0x00,0x0d,0x0b,0x8c,0x17,0x40,0xb2]
24+
vscu %v11, %v13, 23, %s12
25+
26+
# CHECK-INST: vscu.nc %vix, %s12, 63, 0
27+
# CHECK-ENCODING: encoding: [0x0c,0x00,0x00,0xff,0x00,0x3f,0x20,0xb2]
28+
vscu.nc %vix, %s12, 63, 0
29+
30+
# CHECK-INST: vscu.ot %v63, %vix, -64, %s63
31+
# CHECK-ENCODING: encoding: [0x00,0x00,0xff,0x3f,0xbf,0x40,0xc0,0xb2]
32+
vscu.ot %v63, %vix, -64, %s63
33+
34+
# CHECK-INST: vscu.nc.ot %v12, %v63, %s12, 0, %vm3
35+
# CHECK-ENCODING: encoding: [0x00,0x00,0x3f,0x0c,0x00,0x8c,0x83,0xb2]
36+
vscu.nc.ot %v12, %v63, %s12, 0, %vm3
37+
38+
# CHECK-INST: vscl %v11, %v13, 23, %s12
39+
# CHECK-ENCODING: encoding: [0x00,0x00,0x0d,0x0b,0x8c,0x17,0x40,0xb3]
40+
vscl %v11, %v13, 23, %s12
41+
42+
# CHECK-INST: vscl.ot %vix, %s12, 63, 0
43+
# CHECK-ENCODING: encoding: [0x0c,0x00,0x00,0xff,0x00,0x3f,0xe0,0xb3]
44+
vscl.ot %vix, %s12, 63, 0
45+
46+
# CHECK-INST: vscl.nc %v63, %vix, -64, %s63
47+
# CHECK-ENCODING: encoding: [0x00,0x00,0xff,0x3f,0xbf,0x40,0x00,0xb3]
48+
vscl.nc %v63, %vix, -64, %s63
49+
50+
# CHECK-INST: vscl.nc.ot %v12, %v63, %s12, 0, %vm3
51+
# CHECK-ENCODING: encoding: [0x00,0x00,0x3f,0x0c,0x00,0x8c,0x83,0xb3]
52+
vscl.nc.ot %v12, %v63, %s12, 0, %vm3

0 commit comments

Comments
 (0)