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[RISCV] Use __extendhfsf2/__truncsfhf2 for fp16 <-> fp32
`__gnu_h2f_ieee` and `__gnu_f2h_ieee` are introduce by ARM and set that as default name for fp16 and fp32 conversion in LLVM. However RISC-V GCC using default naming scheme for that, which is `__extendhfsf2` and `__truncsfhf2` for that, that cause runtime ABI incompatible issue. Although we didn't have formal runtime ABI spec to specify those naming convention yet, but I think it would be great to fix the incompatible issue first. And I've plan to create a runtime ABI spec undere psABI spec this year. Reviewed By: asb Differential Revision: https://reviews.llvm.org/D118207
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10 files changed

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10 files changed

+611
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‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1082,6 +1082,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
10821082
setTargetDAGCombine(ISD::SHL);
10831083
setTargetDAGCombine(ISD::STORE);
10841084
}
1085+
1086+
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
1087+
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
10851088
}
10861089

10871090
EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL,

‎llvm/test/CodeGen/RISCV/calling-conv-half.ll

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
2121
; RV32I-NEXT: mv s0, a0
2222
; RV32I-NEXT: slli a0, a1, 16
2323
; RV32I-NEXT: srli a0, a0, 16
24-
; RV32I-NEXT: call __gnu_h2f_ieee@plt
24+
; RV32I-NEXT: call __extendhfsf2@plt
2525
; RV32I-NEXT: call __fixsfsi@plt
2626
; RV32I-NEXT: add a0, s0, a0
2727
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -37,7 +37,7 @@ define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
3737
; RV64I-NEXT: mv s0, a0
3838
; RV64I-NEXT: slli a0, a1, 48
3939
; RV64I-NEXT: srli a0, a0, 48
40-
; RV64I-NEXT: call __gnu_h2f_ieee@plt
40+
; RV64I-NEXT: call __extendhfsf2@plt
4141
; RV64I-NEXT: call __fixsfdi@plt
4242
; RV64I-NEXT: addw a0, s0, a0
4343
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -52,7 +52,7 @@ define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
5252
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
5353
; RV32IF-NEXT: mv s0, a0
5454
; RV32IF-NEXT: mv a0, a1
55-
; RV32IF-NEXT: call __gnu_h2f_ieee@plt
55+
; RV32IF-NEXT: call __extendhfsf2@plt
5656
; RV32IF-NEXT: fmv.w.x ft0, a0
5757
; RV32IF-NEXT: fcvt.w.s a0, ft0, rtz
5858
; RV32IF-NEXT: add a0, s0, a0
@@ -68,7 +68,7 @@ define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
6868
; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
6969
; RV64IF-NEXT: mv s0, a0
7070
; RV64IF-NEXT: mv a0, a1
71-
; RV64IF-NEXT: call __gnu_h2f_ieee@plt
71+
; RV64IF-NEXT: call __extendhfsf2@plt
7272
; RV64IF-NEXT: fmv.w.x ft0, a0
7373
; RV64IF-NEXT: fcvt.l.s a0, ft0, rtz
7474
; RV64IF-NEXT: addw a0, s0, a0
@@ -84,7 +84,7 @@ define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
8484
; RV32-ILP32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
8585
; RV32-ILP32F-NEXT: mv s0, a0
8686
; RV32-ILP32F-NEXT: fmv.x.w a0, fa0
87-
; RV32-ILP32F-NEXT: call __gnu_h2f_ieee@plt
87+
; RV32-ILP32F-NEXT: call __extendhfsf2@plt
8888
; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz
8989
; RV32-ILP32F-NEXT: add a0, s0, a0
9090
; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -99,7 +99,7 @@ define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
9999
; RV64-LP64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
100100
; RV64-LP64F-NEXT: mv s0, a0
101101
; RV64-LP64F-NEXT: fmv.x.w a0, fa0
102-
; RV64-LP64F-NEXT: call __gnu_h2f_ieee@plt
102+
; RV64-LP64F-NEXT: call __extendhfsf2@plt
103103
; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz
104104
; RV64-LP64F-NEXT: addw a0, s0, a0
105105
; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -114,7 +114,7 @@ define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
114114
; RV32-ILP32ZFHMIN-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
115115
; RV32-ILP32ZFHMIN-NEXT: mv s0, a0
116116
; RV32-ILP32ZFHMIN-NEXT: fmv.x.w a0, fa0
117-
; RV32-ILP32ZFHMIN-NEXT: call __gnu_h2f_ieee@plt
117+
; RV32-ILP32ZFHMIN-NEXT: call __extendhfsf2@plt
118118
; RV32-ILP32ZFHMIN-NEXT: fcvt.w.s a0, fa0, rtz
119119
; RV32-ILP32ZFHMIN-NEXT: add a0, s0, a0
120120
; RV32-ILP32ZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -129,7 +129,7 @@ define i32 @callee_half_in_regs(i32 %a, half %b) nounwind {
129129
; RV64-LP64ZFHMIN-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
130130
; RV64-LP64ZFHMIN-NEXT: mv s0, a0
131131
; RV64-LP64ZFHMIN-NEXT: fmv.x.w a0, fa0
132-
; RV64-LP64ZFHMIN-NEXT: call __gnu_h2f_ieee@plt
132+
; RV64-LP64ZFHMIN-NEXT: call __extendhfsf2@plt
133133
; RV64-LP64ZFHMIN-NEXT: fcvt.l.s a0, fa0, rtz
134134
; RV64-LP64ZFHMIN-NEXT: addw a0, s0, a0
135135
; RV64-LP64ZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -247,7 +247,7 @@ define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
247247
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
248248
; RV32I-NEXT: lhu a0, 16(sp)
249249
; RV32I-NEXT: mv s0, a7
250-
; RV32I-NEXT: call __gnu_h2f_ieee@plt
250+
; RV32I-NEXT: call __extendhfsf2@plt
251251
; RV32I-NEXT: call __fixsfsi@plt
252252
; RV32I-NEXT: add a0, s0, a0
253253
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -262,7 +262,7 @@ define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
262262
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
263263
; RV64I-NEXT: lhu a0, 16(sp)
264264
; RV64I-NEXT: mv s0, a7
265-
; RV64I-NEXT: call __gnu_h2f_ieee@plt
265+
; RV64I-NEXT: call __extendhfsf2@plt
266266
; RV64I-NEXT: call __fixsfdi@plt
267267
; RV64I-NEXT: addw a0, s0, a0
268268
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -277,7 +277,7 @@ define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
277277
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
278278
; RV32IF-NEXT: lhu a0, 16(sp)
279279
; RV32IF-NEXT: mv s0, a7
280-
; RV32IF-NEXT: call __gnu_h2f_ieee@plt
280+
; RV32IF-NEXT: call __extendhfsf2@plt
281281
; RV32IF-NEXT: fmv.w.x ft0, a0
282282
; RV32IF-NEXT: fcvt.w.s a0, ft0, rtz
283283
; RV32IF-NEXT: add a0, s0, a0
@@ -293,7 +293,7 @@ define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
293293
; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
294294
; RV64IF-NEXT: lhu a0, 16(sp)
295295
; RV64IF-NEXT: mv s0, a7
296-
; RV64IF-NEXT: call __gnu_h2f_ieee@plt
296+
; RV64IF-NEXT: call __extendhfsf2@plt
297297
; RV64IF-NEXT: fmv.w.x ft0, a0
298298
; RV64IF-NEXT: fcvt.l.s a0, ft0, rtz
299299
; RV64IF-NEXT: addw a0, s0, a0
@@ -309,7 +309,7 @@ define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
309309
; RV32-ILP32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
310310
; RV32-ILP32F-NEXT: mv s0, a7
311311
; RV32-ILP32F-NEXT: fmv.x.w a0, fa0
312-
; RV32-ILP32F-NEXT: call __gnu_h2f_ieee@plt
312+
; RV32-ILP32F-NEXT: call __extendhfsf2@plt
313313
; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz
314314
; RV32-ILP32F-NEXT: add a0, s0, a0
315315
; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -324,7 +324,7 @@ define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
324324
; RV64-LP64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
325325
; RV64-LP64F-NEXT: mv s0, a7
326326
; RV64-LP64F-NEXT: fmv.x.w a0, fa0
327-
; RV64-LP64F-NEXT: call __gnu_h2f_ieee@plt
327+
; RV64-LP64F-NEXT: call __extendhfsf2@plt
328328
; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz
329329
; RV64-LP64F-NEXT: addw a0, s0, a0
330330
; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -339,7 +339,7 @@ define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
339339
; RV32-ILP32ZFHMIN-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
340340
; RV32-ILP32ZFHMIN-NEXT: mv s0, a7
341341
; RV32-ILP32ZFHMIN-NEXT: fmv.x.w a0, fa0
342-
; RV32-ILP32ZFHMIN-NEXT: call __gnu_h2f_ieee@plt
342+
; RV32-ILP32ZFHMIN-NEXT: call __extendhfsf2@plt
343343
; RV32-ILP32ZFHMIN-NEXT: fcvt.w.s a0, fa0, rtz
344344
; RV32-ILP32ZFHMIN-NEXT: add a0, s0, a0
345345
; RV32-ILP32ZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -354,7 +354,7 @@ define i32 @callee_half_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
354354
; RV64-LP64ZFHMIN-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
355355
; RV64-LP64ZFHMIN-NEXT: mv s0, a7
356356
; RV64-LP64ZFHMIN-NEXT: fmv.x.w a0, fa0
357-
; RV64-LP64ZFHMIN-NEXT: call __gnu_h2f_ieee@plt
357+
; RV64-LP64ZFHMIN-NEXT: call __extendhfsf2@plt
358358
; RV64-LP64ZFHMIN-NEXT: fcvt.l.s a0, fa0, rtz
359359
; RV64-LP64ZFHMIN-NEXT: addw a0, s0, a0
360360
; RV64-LP64ZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -586,7 +586,7 @@ define i32 @caller_half_ret() nounwind {
586586
; RV32I-NEXT: call callee_half_ret@plt
587587
; RV32I-NEXT: slli a0, a0, 16
588588
; RV32I-NEXT: srli a0, a0, 16
589-
; RV32I-NEXT: call __gnu_h2f_ieee@plt
589+
; RV32I-NEXT: call __extendhfsf2@plt
590590
; RV32I-NEXT: call __fixsfsi@plt
591591
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
592592
; RV32I-NEXT: addi sp, sp, 16
@@ -599,7 +599,7 @@ define i32 @caller_half_ret() nounwind {
599599
; RV64I-NEXT: call callee_half_ret@plt
600600
; RV64I-NEXT: slli a0, a0, 48
601601
; RV64I-NEXT: srli a0, a0, 48
602-
; RV64I-NEXT: call __gnu_h2f_ieee@plt
602+
; RV64I-NEXT: call __extendhfsf2@plt
603603
; RV64I-NEXT: call __fixsfdi@plt
604604
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
605605
; RV64I-NEXT: addi sp, sp, 16
@@ -610,7 +610,7 @@ define i32 @caller_half_ret() nounwind {
610610
; RV32IF-NEXT: addi sp, sp, -16
611611
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
612612
; RV32IF-NEXT: call callee_half_ret@plt
613-
; RV32IF-NEXT: call __gnu_h2f_ieee@plt
613+
; RV32IF-NEXT: call __extendhfsf2@plt
614614
; RV32IF-NEXT: fmv.w.x ft0, a0
615615
; RV32IF-NEXT: fcvt.w.s a0, ft0, rtz
616616
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -622,7 +622,7 @@ define i32 @caller_half_ret() nounwind {
622622
; RV64IF-NEXT: addi sp, sp, -16
623623
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
624624
; RV64IF-NEXT: call callee_half_ret@plt
625-
; RV64IF-NEXT: call __gnu_h2f_ieee@plt
625+
; RV64IF-NEXT: call __extendhfsf2@plt
626626
; RV64IF-NEXT: fmv.w.x ft0, a0
627627
; RV64IF-NEXT: fcvt.l.s a0, ft0, rtz
628628
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -635,7 +635,7 @@ define i32 @caller_half_ret() nounwind {
635635
; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
636636
; RV32-ILP32F-NEXT: call callee_half_ret@plt
637637
; RV32-ILP32F-NEXT: fmv.x.w a0, fa0
638-
; RV32-ILP32F-NEXT: call __gnu_h2f_ieee@plt
638+
; RV32-ILP32F-NEXT: call __extendhfsf2@plt
639639
; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz
640640
; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
641641
; RV32-ILP32F-NEXT: addi sp, sp, 16
@@ -647,7 +647,7 @@ define i32 @caller_half_ret() nounwind {
647647
; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
648648
; RV64-LP64F-NEXT: call callee_half_ret@plt
649649
; RV64-LP64F-NEXT: fmv.x.w a0, fa0
650-
; RV64-LP64F-NEXT: call __gnu_h2f_ieee@plt
650+
; RV64-LP64F-NEXT: call __extendhfsf2@plt
651651
; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz
652652
; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
653653
; RV64-LP64F-NEXT: addi sp, sp, 16
@@ -659,7 +659,7 @@ define i32 @caller_half_ret() nounwind {
659659
; RV32-ILP32ZFHMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
660660
; RV32-ILP32ZFHMIN-NEXT: call callee_half_ret@plt
661661
; RV32-ILP32ZFHMIN-NEXT: fmv.x.w a0, fa0
662-
; RV32-ILP32ZFHMIN-NEXT: call __gnu_h2f_ieee@plt
662+
; RV32-ILP32ZFHMIN-NEXT: call __extendhfsf2@plt
663663
; RV32-ILP32ZFHMIN-NEXT: fcvt.w.s a0, fa0, rtz
664664
; RV32-ILP32ZFHMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
665665
; RV32-ILP32ZFHMIN-NEXT: addi sp, sp, 16
@@ -671,7 +671,7 @@ define i32 @caller_half_ret() nounwind {
671671
; RV64-LP64ZFHMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
672672
; RV64-LP64ZFHMIN-NEXT: call callee_half_ret@plt
673673
; RV64-LP64ZFHMIN-NEXT: fmv.x.w a0, fa0
674-
; RV64-LP64ZFHMIN-NEXT: call __gnu_h2f_ieee@plt
674+
; RV64-LP64ZFHMIN-NEXT: call __extendhfsf2@plt
675675
; RV64-LP64ZFHMIN-NEXT: fcvt.l.s a0, fa0, rtz
676676
; RV64-LP64ZFHMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
677677
; RV64-LP64ZFHMIN-NEXT: addi sp, sp, 16

‎llvm/test/CodeGen/RISCV/copysign-casts.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ define double @fold_promote_d_h(double %a, half %b) nounwind {
133133
; RV32IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
134134
; RV32IFD-NEXT: fmv.d fs0, fa0
135135
; RV32IFD-NEXT: fmv.x.w a0, fa1
136-
; RV32IFD-NEXT: call __gnu_h2f_ieee@plt
136+
; RV32IFD-NEXT: call __extendhfsf2@plt
137137
; RV32IFD-NEXT: fcvt.d.s ft0, fa0
138138
; RV32IFD-NEXT: fsgnj.d fa0, fs0, ft0
139139
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
@@ -148,7 +148,7 @@ define double @fold_promote_d_h(double %a, half %b) nounwind {
148148
; RV64IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
149149
; RV64IFD-NEXT: fmv.d fs0, fa0
150150
; RV64IFD-NEXT: fmv.x.w a0, fa1
151-
; RV64IFD-NEXT: call __gnu_h2f_ieee@plt
151+
; RV64IFD-NEXT: call __extendhfsf2@plt
152152
; RV64IFD-NEXT: fcvt.d.s ft0, fa0
153153
; RV64IFD-NEXT: fsgnj.d fa0, fs0, ft0
154154
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
@@ -211,7 +211,7 @@ define float @fold_promote_f_h(float %a, half %b) nounwind {
211211
; RV32IF-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
212212
; RV32IF-NEXT: fmv.s fs0, fa0
213213
; RV32IF-NEXT: fmv.x.w a0, fa1
214-
; RV32IF-NEXT: call __gnu_h2f_ieee@plt
214+
; RV32IF-NEXT: call __extendhfsf2@plt
215215
; RV32IF-NEXT: fsgnj.s fa0, fs0, fa0
216216
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
217217
; RV32IF-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
@@ -225,7 +225,7 @@ define float @fold_promote_f_h(float %a, half %b) nounwind {
225225
; RV32IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
226226
; RV32IFD-NEXT: fmv.s fs0, fa0
227227
; RV32IFD-NEXT: fmv.x.w a0, fa1
228-
; RV32IFD-NEXT: call __gnu_h2f_ieee@plt
228+
; RV32IFD-NEXT: call __extendhfsf2@plt
229229
; RV32IFD-NEXT: fsgnj.s fa0, fs0, fa0
230230
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
231231
; RV32IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
@@ -239,7 +239,7 @@ define float @fold_promote_f_h(float %a, half %b) nounwind {
239239
; RV64IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
240240
; RV64IFD-NEXT: fmv.s fs0, fa0
241241
; RV64IFD-NEXT: fmv.x.w a0, fa1
242-
; RV64IFD-NEXT: call __gnu_h2f_ieee@plt
242+
; RV64IFD-NEXT: call __extendhfsf2@plt
243243
; RV64IFD-NEXT: fsgnj.s fa0, fs0, fa0
244244
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
245245
; RV64IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload

‎llvm/test/CodeGen/RISCV/fp16-promote.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ define float @test_fpextend_float(half* %p) nounwind {
1818
; CHECK-NEXT: addi sp, sp, -16
1919
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
2020
; CHECK-NEXT: lhu a0, 0(a0)
21-
; CHECK-NEXT: call __gnu_h2f_ieee@plt
21+
; CHECK-NEXT: call __extendhfsf2@plt
2222
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
2323
; CHECK-NEXT: addi sp, sp, 16
2424
; CHECK-NEXT: ret
@@ -33,7 +33,7 @@ define double @test_fpextend_double(half* %p) nounwind {
3333
; CHECK-NEXT: addi sp, sp, -16
3434
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
3535
; CHECK-NEXT: lhu a0, 0(a0)
36-
; CHECK-NEXT: call __gnu_h2f_ieee@plt
36+
; CHECK-NEXT: call __extendhfsf2@plt
3737
; CHECK-NEXT: fcvt.d.s fa0, fa0
3838
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
3939
; CHECK-NEXT: addi sp, sp, 16
@@ -50,7 +50,7 @@ define void @test_fptrunc_float(float %f, half* %p) nounwind {
5050
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
5151
; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
5252
; CHECK-NEXT: mv s0, a0
53-
; CHECK-NEXT: call __gnu_f2h_ieee@plt
53+
; CHECK-NEXT: call __truncsfhf2@plt
5454
; CHECK-NEXT: sh a0, 0(s0)
5555
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
5656
; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
@@ -90,12 +90,12 @@ define void @test_fadd(half* %p, half* %q) nounwind {
9090
; CHECK-NEXT: mv s0, a0
9191
; CHECK-NEXT: lhu s1, 0(a0)
9292
; CHECK-NEXT: lhu a0, 0(a1)
93-
; CHECK-NEXT: call __gnu_h2f_ieee@plt
93+
; CHECK-NEXT: call __extendhfsf2@plt
9494
; CHECK-NEXT: fmv.s fs0, fa0
9595
; CHECK-NEXT: mv a0, s1
96-
; CHECK-NEXT: call __gnu_h2f_ieee@plt
96+
; CHECK-NEXT: call __extendhfsf2@plt
9797
; CHECK-NEXT: fadd.s fa0, fa0, fs0
98-
; CHECK-NEXT: call __gnu_f2h_ieee@plt
98+
; CHECK-NEXT: call __truncsfhf2@plt
9999
; CHECK-NEXT: sh a0, 0(s0)
100100
; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
101101
; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
@@ -121,12 +121,12 @@ define void @test_fmul(half* %p, half* %q) nounwind {
121121
; CHECK-NEXT: mv s0, a0
122122
; CHECK-NEXT: lhu s1, 0(a0)
123123
; CHECK-NEXT: lhu a0, 0(a1)
124-
; CHECK-NEXT: call __gnu_h2f_ieee@plt
124+
; CHECK-NEXT: call __extendhfsf2@plt
125125
; CHECK-NEXT: fmv.s fs0, fa0
126126
; CHECK-NEXT: mv a0, s1
127-
; CHECK-NEXT: call __gnu_h2f_ieee@plt
127+
; CHECK-NEXT: call __extendhfsf2@plt
128128
; CHECK-NEXT: fmul.s fa0, fa0, fs0
129-
; CHECK-NEXT: call __gnu_f2h_ieee@plt
129+
; CHECK-NEXT: call __truncsfhf2@plt
130130
; CHECK-NEXT: sh a0, 0(s0)
131131
; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
132132
; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload

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