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1 parent 5253d91 commit aa3c877Copy full SHA for aa3c877
llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -1010,8 +1010,7 @@ bool AArch64InstructionSelector::selectCompareBranch(
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/// This needs to detect a splat-like operation, e.g. a G_BUILD_VECTOR.
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static Optional<int64_t> getVectorShiftImm(Register Reg,
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MachineRegisterInfo &MRI) {
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- const LLT Ty = MRI.getType(Reg);
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- assert(Ty.isVector() && "Expected a *vector* shift operand");
+ assert(MRI.getType(Reg).isVector() && "Expected a *vector* shift operand");
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MachineInstr *OpMI = MRI.getVRegDef(Reg);
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assert(OpMI && "Expected to find a vreg def for vector shift operand");
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if (OpMI->getOpcode() != TargetOpcode::G_BUILD_VECTOR)
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