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Simplify demanded bits of select sources where the condition is a constant vector
llvm-svn: 160835
1 parent 7cd0853 commit abc13af

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3 files changed

+53
-0
lines changed

3 files changed

+53
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lines changed

llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -899,5 +899,16 @@ Instruction *InstCombiner::visitSelectInst(SelectInst &SI) {
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return &SI;
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}
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if (VectorType* VecTy = dyn_cast<VectorType>(SI.getType())) {
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unsigned VWidth = VecTy->getNumElements();
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APInt UndefElts(VWidth, 0);
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APInt AllOnesEltMask(APInt::getAllOnesValue(VWidth));
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if (Value *V = SimplifyDemandedVectorElts(&SI, AllOnesEltMask, UndefElts)) {
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if (V != &SI)
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return ReplaceInstUsesWith(SI, V);
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return &SI;
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}
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}
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return 0;
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}

llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -989,6 +989,29 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
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}
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break;
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}
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case Instruction::Select: {
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APInt LeftDemanded(DemandedElts), RightDemanded(DemandedElts);
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if (ConstantVector* CV = dyn_cast<ConstantVector>(I->getOperand(0))) {
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for (unsigned i = 0; i < VWidth; i++) {
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if (CV->getAggregateElement(i)->isNullValue())
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LeftDemanded.clearBit(i);
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else
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RightDemanded.clearBit(i);
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}
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}
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TmpV = SimplifyDemandedVectorElts(I->getOperand(1), LeftDemanded,
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UndefElts, Depth+1);
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if (TmpV) { I->setOperand(1, TmpV); MadeChange = true; }
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TmpV = SimplifyDemandedVectorElts(I->getOperand(2), RightDemanded,
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UndefElts2, Depth+1);
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if (TmpV) { I->setOperand(2, TmpV); MadeChange = true; }
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// Output elements are undefined if both are undefined.
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UndefElts &= UndefElts2;
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break;
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}
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case Instruction::BitCast: {
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// Vector->vector casts only.
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VectorType *VTy = dyn_cast<VectorType>(I->getOperand(0)->getType());

llvm/test/Transforms/InstCombine/vec_demanded_elts.ll

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -190,4 +190,23 @@ define <2 x double> @test_fpext(float %f) {
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ret <2 x double> %ret
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}
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define <4 x float> @test_select(float %f, float %g) {
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; CHECK: @test_select
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; CHECK: %a0 = insertelement <4 x float> undef, float %f, i32 0
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; CHECK-NOT: insertelement
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; CHECK: %a3 = insertelement <4 x float> %a0, float 3.000000e+00, i32 3
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; CHECK-NOT: insertelement
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; CHECK: %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> <float undef, float 4.000000e+00, float 5.000000e+00, float undef>
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%a0 = insertelement <4 x float> undef, float %f, i32 0
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%a1 = insertelement <4 x float> %a0, float 1.000000e+00, i32 1
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%a2 = insertelement <4 x float> %a1, float 2.000000e+00, i32 2
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%a3 = insertelement <4 x float> %a2, float 3.000000e+00, i32 3
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%b0 = insertelement <4 x float> undef, float %g, i32 0
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%b1 = insertelement <4 x float> %b0, float 4.000000e+00, i32 1
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%b2 = insertelement <4 x float> %b1, float 5.000000e+00, i32 2
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%b3 = insertelement <4 x float> %b2, float 6.000000e+00, i32 3
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%ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> %b3
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ret <4 x float> %ret
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}
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