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Jinsong Ji
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[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support
Per RFC http://lists.llvm.org/pipermail/llvm-dev/2020-April/141295.html no one is making use of QPX/A2Q/BGQ/BGP CNK anymore. This patch remove the support of QPX/A2Q in llvm, BGQ/BGP in clang, CNK support in openmp/polly. Reviewed By: hfinkel Differential Revision: https://reviews.llvm.org/D83915
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clang/lib/Basic/Targets/PPC.cpp

Lines changed: 12 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -46,8 +46,6 @@ bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
4646
HasP8Crypto = true;
4747
} else if (Feature == "+direct-move") {
4848
HasDirectMove = true;
49-
} else if (Feature == "+qpx") {
50-
HasQPX = true;
5149
} else if (Feature == "+htm") {
5250
HasHTM = true;
5351
} else if (Feature == "+float128") {
@@ -99,7 +97,7 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
9997
}
10098

10199
// ABI options.
102-
if (ABI == "elfv1" || ABI == "elfv1-qpx")
100+
if (ABI == "elfv1")
103101
Builder.defineMacro("_CALL_ELF", "1");
104102
if (ABI == "elfv2")
105103
Builder.defineMacro("_CALL_ELF", "2");
@@ -159,22 +157,11 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
159157
Builder.defineMacro("_ARCH_PWR10");
160158
if (ArchDefs & ArchDefineA2)
161159
Builder.defineMacro("_ARCH_A2");
162-
if (ArchDefs & ArchDefineA2q) {
163-
Builder.defineMacro("_ARCH_A2Q");
164-
Builder.defineMacro("_ARCH_QP");
165-
}
166160
if (ArchDefs & ArchDefineE500)
167161
Builder.defineMacro("__NO_LWSYNC__");
168162
if (ArchDefs & ArchDefineFuture)
169163
Builder.defineMacro("_ARCH_PWR_FUTURE");
170164

171-
if (getTriple().getVendor() == llvm::Triple::BGQ) {
172-
Builder.defineMacro("__bg__");
173-
Builder.defineMacro("__THW_BLUEGENE__");
174-
Builder.defineMacro("__bgq__");
175-
Builder.defineMacro("__TOS_BGQ__");
176-
}
177-
178165
if (HasAltivec) {
179166
Builder.defineMacro("__VEC__", "10206");
180167
Builder.defineMacro("__ALTIVEC__");
@@ -277,7 +264,6 @@ bool PPCTargetInfo::initFeatureMap(
277264
.Case("ppc64le", true)
278265
.Default(false);
279266

280-
Features["qpx"] = (CPU == "a2q");
281267
Features["power9-vector"] = (CPU == "pwr9");
282268
Features["crypto"] = llvm::StringSwitch<bool>(CPU)
283269
.Case("ppc64le", true)
@@ -373,7 +359,6 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
373359
.Case("power8-vector", HasP8Vector)
374360
.Case("crypto", HasP8Crypto)
375361
.Case("direct-move", HasDirectMove)
376-
.Case("qpx", HasQPX)
377362
.Case("htm", HasHTM)
378363
.Case("bpermd", HasBPERMD)
379364
.Case("extdiv", HasExtDiv)
@@ -503,17 +488,17 @@ ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
503488
}
504489

505490
static constexpr llvm::StringLiteral ValidCPUNames[] = {
506-
{"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
507-
{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
508-
{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
509-
{"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"},
510-
{"g5"}, {"a2"}, {"a2q"}, {"e500"}, {"e500mc"},
511-
{"e5500"}, {"power3"}, {"pwr3"}, {"power4"}, {"pwr4"},
512-
{"power5"}, {"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"},
513-
{"pwr6"}, {"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"},
514-
{"power8"}, {"pwr8"}, {"power9"}, {"pwr9"}, {"power10"},
515-
{"pwr10"}, {"powerpc"}, {"ppc"}, {"powerpc64"}, {"ppc64"},
516-
{"powerpc64le"}, {"ppc64le"}, {"future"}};
491+
{"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
492+
{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
493+
{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
494+
{"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"},
495+
{"g5"}, {"a2"}, {"e500"}, {"e500mc"}, {"e5500"},
496+
{"power3"}, {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"},
497+
{"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"},
498+
{"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"},
499+
{"pwr8"}, {"power9"}, {"pwr9"}, {"power10"}, {"pwr10"},
500+
{"powerpc"}, {"ppc"}, {"powerpc64"}, {"ppc64"}, {"powerpc64le"},
501+
{"ppc64le"}, {"future"}};
517502

518503
bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
519504
return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);

clang/lib/Basic/Targets/PPC.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,6 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
4646
ArchDefinePwr10 = 1 << 14,
4747
ArchDefineFuture = 1 << 15,
4848
ArchDefineA2 = 1 << 16,
49-
ArchDefineA2q = 1 << 17,
5049
ArchDefineE500 = 1 << 18
5150
} ArchDefineTypes;
5251

@@ -63,7 +62,6 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
6362
bool HasP8Vector = false;
6463
bool HasP8Crypto = false;
6564
bool HasDirectMove = false;
66-
bool HasQPX = false;
6765
bool HasHTM = false;
6866
bool HasBPERMD = false;
6967
bool HasExtDiv = false;
@@ -118,7 +116,6 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
118116
.Case("970", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr |
119117
ArchDefinePpcsq)
120118
.Case("a2", ArchDefineA2)
121-
.Case("a2q", ArchDefineName | ArchDefineA2 | ArchDefineA2q)
122119
.Cases("power3", "pwr3", ArchDefinePpcgr)
123120
.Cases("power4", "pwr4",
124121
ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)

clang/lib/Driver/ToolChains/Arch/PPC.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,6 @@ std::string ppc::getPPCTargetCPU(const ArgList &Args) {
5757
.Case("970", "970")
5858
.Case("G5", "g5")
5959
.Case("a2", "a2")
60-
.Case("a2q", "a2q")
6160
.Case("e500", "e500")
6261
.Case("e500mc", "e500mc")
6362
.Case("e5500", "e5500")

clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1883,18 +1883,6 @@ void Clang::AddPPCTargetArgs(const ArgList &Args,
18831883
if (T.isOSBinFormatELF()) {
18841884
switch (getToolChain().getArch()) {
18851885
case llvm::Triple::ppc64: {
1886-
// When targeting a processor that supports QPX, or if QPX is
1887-
// specifically enabled, default to using the ABI that supports QPX (so
1888-
// long as it is not specifically disabled).
1889-
bool HasQPX = false;
1890-
if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ))
1891-
HasQPX = A->getValue() == StringRef("a2q");
1892-
HasQPX = Args.hasFlag(options::OPT_mqpx, options::OPT_mno_qpx, HasQPX);
1893-
if (HasQPX) {
1894-
ABIName = "elfv1-qpx";
1895-
break;
1896-
}
1897-
18981886
if (T.isMusl() || (T.isOSFreeBSD() && T.getOSMajorVersion() >= 13))
18991887
ABIName = "elfv2";
19001888
else

clang/test/Driver/clang-translation.c

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -167,12 +167,6 @@
167167
// PPCPWR8: "-cc1"
168168
// PPCPWR8: "-target-cpu" "pwr8"
169169

170-
// RUN: %clang -target powerpc64-unknown-linux-gnu \
171-
// RUN: -### -S %s -mcpu=a2q 2>&1 | FileCheck -check-prefix=PPCA2Q %s
172-
// PPCA2Q: clang
173-
// PPCA2Q: "-cc1"
174-
// PPCA2Q: "-target-cpu" "a2q"
175-
176170
// RUN: %clang -target powerpc64-unknown-linux-gnu \
177171
// RUN: -### -S %s -mcpu=630 2>&1 | FileCheck -check-prefix=PPC630 %s
178172
// PPC630: clang

clang/test/Driver/ppc-abi.c

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -5,14 +5,6 @@
55
// RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
66
// RUN: -mabi=elfv1 | FileCheck -check-prefix=CHECK-ELFv1 %s
77
// RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
8-
// RUN: -mabi=elfv1-qpx | FileCheck -check-prefix=CHECK-ELFv1-QPX %s
9-
// RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
10-
// RUN: -mcpu=a2q | FileCheck -check-prefix=CHECK-ELFv1-QPX %s
11-
// RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
12-
// RUN: -mcpu=a2 -mqpx | FileCheck -check-prefix=CHECK-ELFv1-QPX %s
13-
// RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
14-
// RUN: -mcpu=a2q -mno-qpx | FileCheck -check-prefix=CHECK-ELFv1 %s
15-
// RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
168
// RUN: -mabi=elfv2 | FileCheck -check-prefix=CHECK-ELFv2-BE %s
179

1810
// RUN: %clang -target powerpc64le-unknown-linux-gnu %s -### -o %t.o 2>&1 \
@@ -34,8 +26,6 @@
3426
// CHECK-ELFv1: "-target-abi" "elfv1"
3527
// CHECK-ELFv1-LE: "-mrelocation-model" "static"
3628
// CHECK-ELFv1-LE: "-target-abi" "elfv1"
37-
// CHECK-ELFv1-QPX: "-mrelocation-model" "static"
38-
// CHECK-ELFv1-QPX: "-target-abi" "elfv1-qpx"
3929
// CHECK-ELFv2: "-mrelocation-model" "static"
4030
// CHECK-ELFv2: "-target-abi" "elfv2"
4131
// CHECK-ELFv2-BE: "-mrelocation-model" "static"
@@ -48,14 +38,6 @@
4838
// RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
4939
// RUN: -mabi=elfv1 | FileCheck -check-prefix=CHECK-ELFv1-PIC %s
5040
// RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
51-
// RUN: -mabi=elfv1-qpx | FileCheck -check-prefix=CHECK-ELFv1-QPX-PIC %s
52-
// RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
53-
// RUN: -mcpu=a2q | FileCheck -check-prefix=CHECK-ELFv1-QPX-PIC %s
54-
// RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
55-
// RUN: -mcpu=a2 -mqpx | FileCheck -check-prefix=CHECK-ELFv1-QPX-PIC %s
56-
// RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
57-
// RUN: -mcpu=a2q -mno-qpx | FileCheck -check-prefix=CHECK-ELFv1-PIC %s
58-
// RUN: %clang -fPIC -target powerpc64-unknown-linux-gnu %s -### -o %t.o 2>&1 \
5941
// RUN: -mabi=elfv2 | FileCheck -check-prefix=CHECK-ELFv2-PIC %s
6042

6143
// RUN: %clang -fPIC -target powerpc64le-unknown-linux-gnu %s -### -o %t.o 2>&1 \
@@ -69,8 +51,6 @@
6951

7052
// CHECK-ELFv1-PIC: "-mrelocation-model" "pic" "-pic-level" "2"
7153
// CHECK-ELFv1-PIC: "-target-abi" "elfv1"
72-
// CHECK-ELFv1-QPX-PIC: "-mrelocation-model" "pic" "-pic-level" "2"
73-
// CHECK-ELFv1-QPX-PIC: "-target-abi" "elfv1-qpx"
7454
// CHECK-ELFv2-PIC: "-mrelocation-model" "pic" "-pic-level" "2"
7555
// CHECK-ELFv2-PIC: "-target-abi" "elfv2"
7656

clang/test/Misc/target-invalid-cpu-note.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@
7979
// PPC: error: unknown target CPU 'not-a-cpu'
8080
// PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
8181
// PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
82-
// PPC-SAME: 8548, 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4,
82+
// PPC-SAME: 8548, 970, g5, a2, e500, e500mc, e5500, power3, pwr3, power4,
8383
// PPC-SAME: pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x,
8484
// PPC-SAME: power7, pwr7, power8, pwr8, power9, pwr9, power10, pwr10, powerpc, ppc, powerpc64,
8585
// PPC-SAME: ppc64, powerpc64le, ppc64le, future

clang/test/Preprocessor/init-ppc64.c

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -408,21 +408,6 @@
408408
// PPC64LE:#define __ppc64__ 1
409409
// PPC64LE:#define __ppc__ 1
410410
//
411-
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none -target-cpu a2q -fno-signed-char < /dev/null | FileCheck -match-full-lines -check-prefix PPCA2Q %s
412-
//
413-
// PPCA2Q:#define _ARCH_A2 1
414-
// PPCA2Q:#define _ARCH_A2Q 1
415-
// PPCA2Q:#define _ARCH_PPC 1
416-
// PPCA2Q:#define _ARCH_PPC64 1
417-
// PPCA2Q:#define _ARCH_QP 1
418-
//
419-
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-bgq-linux -fno-signed-char < /dev/null | FileCheck -match-full-lines -check-prefix PPCBGQ %s
420-
//
421-
// PPCBGQ:#define __THW_BLUEGENE__ 1
422-
// PPCBGQ:#define __TOS_BGQ__ 1
423-
// PPCBGQ:#define __bg__ 1
424-
// PPCBGQ:#define __bgq__ 1
425-
//
426411
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none -target-cpu 630 -fno-signed-char < /dev/null | FileCheck -match-full-lines -check-prefix PPC630 %s
427412
//
428413
// PPC630:#define _ARCH_630 1
@@ -1069,7 +1054,6 @@
10691054

10701055
// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 -triple=powerpc64-unknown-linux-gnu < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-ELFv1 %s
10711056
// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 -triple=powerpc64-unknown-linux-gnu -target-abi elfv1 < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-ELFv1 %s
1072-
// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 -triple=powerpc64-unknown-linux-gnu -target-abi elfv1-qpx < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-ELFv1 %s
10731057
// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 -triple=powerpc64-unknown-linux-gnu -target-abi elfv2 < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-ELFv2 %s
10741058
// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 -triple=powerpc64le-unknown-linux-gnu < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-ELFv2 %s
10751059
// RUN: %clang_cc1 -E -dM -ffreestanding -fgnuc-version=4.2.1 -triple=powerpc64le-unknown-linux-gnu -target-abi elfv1 < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-ELFv1 %s

llvm/docs/LangRef.rst

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -4310,14 +4310,9 @@ PowerPC:
43104310
- ``r``: A 32 or 64-bit integer register.
43114311
- ``b``: A 32 or 64-bit integer register, excluding ``R0`` (that is:
43124312
``R1-R31``).
4313-
- ``f``: A 32 or 64-bit float register (``F0-F31``), or when QPX is enabled, a
4314-
128 or 256-bit QPX register (``Q0-Q31``; aliases the ``F`` registers).
4315-
- ``v``: For ``4 x f32`` or ``4 x f64`` types, when QPX is enabled, a
4316-
128 or 256-bit QPX register (``Q0-Q31``), otherwise a 128-bit
4317-
altivec vector register (``V0-V31``).
4318-
4319-
.. FIXME: is this a bug that v accepts QPX registers? I think this
4320-
is supposed to only use the altivec vector registers?
4313+
- ``f``: A 32 or 64-bit float register (``F0-F31``),
4314+
- ``v``: For ``4 x f32`` or ``4 x f64`` types, a 128-bit altivec vector
4315+
register (``V0-V31``).
43214316

43224317
- ``y``: Condition register (``CR0-CR7``).
43234318
- ``wc``: An individual CR bit in a CR register.

llvm/include/llvm/ADT/Triple.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -142,8 +142,6 @@ class Triple {
142142
Apple,
143143
PC,
144144
SCEI,
145-
BGP,
146-
BGQ,
147145
Freescale,
148146
IBM,
149147
ImaginationTechnologies,
@@ -179,7 +177,6 @@ class Triple {
179177
Minix,
180178
RTEMS,
181179
NaCl, // Native Client
182-
CNK, // BG/P Compute-Node Kernel
183180
AIX,
184181
CUDA, // NVIDIA CUDA
185182
NVCL, // NVIDIA OpenCL

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