[SystemZ] Add TPEI instruction and Associated Facility (llvm#89372)

This PR adds the TPEI (Test Pending External Interruption) instruction,
along with the facility that contains it. This is a millicoded system
instruction that is not used for code generation, so it will be used
exclusively by the Assembler and Disassembler.
Accordingly, this commit also adds tests for both.

Author: dominik-steenken

llvm/lib/Target/SystemZ/SystemZFeatures.td

@@ -246,14 +246,20 @@ def FeatureInsertReferenceBitsMultiple : SystemZFeature<
   "Assume that the insert-reference-bits-multiple facility is installed"
 >;
 
+def FeatureTestPendingExternalInterruption : SystemZFeature<
+  "test-pending-external-interruption", "TestPendingExternalInterruption", (all_of FeatureTestPendingExternalInterruption),
+  "Assume that the test-pending-external-interruption facility is installed"
+>;
+
 def Arch12NewFeatures : SystemZFeatureList<[
     FeatureMiscellaneousExtensions2,
     FeatureGuardedStorage,
     FeatureMessageSecurityAssist7,
     FeatureMessageSecurityAssist8,
     FeatureVectorEnhancements1,
     FeatureVectorPackedDecimal,
-    FeatureInsertReferenceBitsMultiple
+    FeatureInsertReferenceBitsMultiple,
+    FeatureTestPendingExternalInterruption
 ]>;
 
 //===----------------------------------------------------------------------===//

llvm/lib/Target/SystemZ/SystemZInstrSystem.td

@@ -541,6 +541,10 @@ let hasSideEffects = 1, Defs = [CC] in
 let hasSideEffects = 1, Defs = [CC] in
   def TPI : StoreInherentS<"tpi", 0xB236, null_frag, 0>;
 
+// Test pending external interruption.
+let hasSideEffects = 1, Defs = [CC], Predicates = [FeatureTestPendingExternalInterruption] in
+  def TPEI : UnaryRRE<"tpei", 0xB9A1, null_frag, GR64, GR64>;
+
 // Set address limit.
 let hasSideEffects = 1, Uses = [R1L] in
   def SAL : SideEffectInherentS<"sal", 0xB237, null_frag>;

llvm/lib/Target/SystemZ/SystemZScheduleZ14.td

@@ -1640,7 +1640,7 @@ def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
 def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
 def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
-def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
+def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
 def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
 
 }

llvm/lib/Target/SystemZ/SystemZScheduleZ15.td

@@ -1686,7 +1686,7 @@ def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
 def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
 def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
-def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
+def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
 def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
 
 }

llvm/lib/Target/SystemZ/SystemZScheduleZ16.td

@@ -1719,7 +1719,7 @@ def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
 def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
 def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
-def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
+def : InstRW<[WLat30, MCD], (instregex "TPE?I$")>;
 def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
 
 }

llvm/test/MC/Disassembler/SystemZ/insns-z14.txt

@@ -3251,3 +3251,11 @@
 # CHECK: wftcixb %v4, %v21, 1656
 0xe7 0x45 0x67 0x88 0x44 0x4a
 
+# CHECK: tpei %r0, %r15
+0xb9 0xa1 0x00 0x0f
+
+# CHECK: tpei %r15, %r0
+0xb9 0xa1 0x00 0xf0
+
+# CHECK: tpei %r4, %r10
+0xb9 0xa1 0x00 0x4a

llvm/test/MC/SystemZ/insn-bad-z13.s

@@ -3024,3 +3024,6 @@
 	wledb	%v0, %v0, -1, 0
 	wledb	%v0, %v0, 16, 0
 
+ #CHECK: error: instruction requires: test-pending-external-interrupt
+ #CHECK: tpei %r0, %r1
+	tpei	%r0, %r1

llvm/test/MC/SystemZ/insn-good-z14.s

@@ -2720,3 +2720,9 @@
 	wftcixb	%v31, %v0, 0
 	wftcixb	%v4, %v21, 0x678
 
+#CHECK: tpei %r0, %r15					# encoding: [0xb9,0xa1,0x00,0x0f]
+#CHECK: tpei %r15, %r0					# encoding: [0xb9,0xa1,0x00,0xf0]
+#CHECK: tpei %r4, %r10					# encoding: [0xb9,0xa1,0x00,0x4a]
+	tpei %r0, %r15
+	tpei %r15, %r0
+	tpei %r4, %r10