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[X86][AVX] Handle vperm2x128 shuffling of a subvector splat.
We already handle "vperm2x128 (ins ?, X, C1), (ins ?, X, C1), 0x31" for shuffling of the upper subvectors, but we weren't dealing with the case when we were splatting the upper subvector from a single source.
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3 files changed

+16
-11
lines changed

3 files changed

+16
-11
lines changed

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37324,6 +37324,14 @@ static SDValue combineTargetShuffle(SDValue N, SelectionDAG &DAG,
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SDValue Ins1 = peekThroughBitcasts(N.getOperand(1));
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unsigned Imm = N.getConstantOperandVal(2);
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37327+
// Handle subvector splat by tweaking values to match binary concat.
37328+
// vperm2x128 (ins ?, X, C1), undef, 0x11 ->
37329+
// vperm2x128 (ins ?, X, C1), (ins ?, X, C1), 0x31 -> concat X, X
37330+
if (Imm == 0x11 && Ins1.isUndef()) {
37331+
Imm = 0x31;
37332+
Ins1 = Ins0;
37333+
}
37334+
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if (!(Imm == 0x31 &&
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Ins0.getOpcode() == ISD::INSERT_SUBVECTOR &&
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Ins1.getOpcode() == ISD::INSERT_SUBVECTOR &&

llvm/test/CodeGen/X86/avx-vperm2x128.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -130,7 +130,6 @@ define <32 x i8> @shuffle_v32i8_2323_domain(<32 x i8> %a, <32 x i8> %b) nounwind
130130
; AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
131131
; AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0
132132
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
133-
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
134133
; AVX1-NEXT: retq
135134
;
136135
; AVX2-LABEL: shuffle_v32i8_2323_domain:

llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -3098,14 +3098,13 @@ entry:
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define <8 x i32> @add_v8i32_02468ACE_13579BDF(<8 x i32> %a, <8 x i32> %b) {
30993099
; AVX1-LABEL: add_v8i32_02468ACE_13579BDF:
31003100
; AVX1: # %bb.0: # %entry
3101-
; AVX1-NEXT: vphaddd %xmm1, %xmm0, %xmm2
3101+
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
3102+
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
3103+
; AVX1-NEXT: vphaddd %xmm2, %xmm3, %xmm2
31023104
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm2, %ymm2
3103-
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
3104-
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
31053105
; AVX1-NEXT: vphaddd %xmm1, %xmm0, %xmm0
31063106
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
3107-
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
3108-
; AVX1-NEXT: vshufpd {{.*#+}} ymm0 = ymm2[0],ymm0[0],ymm2[3],ymm0[3]
3107+
; AVX1-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[3],ymm2[3]
31093108
; AVX1-NEXT: retq
31103109
;
31113110
; AVX2OR512VL-LABEL: add_v8i32_02468ACE_13579BDF:
@@ -3123,14 +3122,13 @@ entry:
31233122
define <8 x i32> @add_v8i32_8ACE0246_9BDF1357(<8 x i32> %a, <8 x i32> %b) {
31243123
; AVX1-LABEL: add_v8i32_8ACE0246_9BDF1357:
31253124
; AVX1: # %bb.0: # %entry
3126-
; AVX1-NEXT: vphaddd %xmm1, %xmm0, %xmm2
3125+
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
3126+
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
3127+
; AVX1-NEXT: vphaddd %xmm2, %xmm3, %xmm2
31273128
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm2, %ymm2
3128-
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
3129-
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
31303129
; AVX1-NEXT: vphaddd %xmm1, %xmm0, %xmm0
31313130
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
3132-
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
3133-
; AVX1-NEXT: vshufpd {{.*#+}} ymm0 = ymm2[1],ymm0[1],ymm2[2],ymm0[2]
3131+
; AVX1-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[1],ymm2[1],ymm0[2],ymm2[2]
31343132
; AVX1-NEXT: retq
31353133
;
31363134
; AVX2OR512VL-LABEL: add_v8i32_8ACE0246_9BDF1357:

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