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Merge commit 'faed8f9e042a' from apple/main into swift/next
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‎llvm/test/Transforms/GVN/loadpre-context.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -gvn --basic-aa -S | FileCheck %s
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; load may be speculated, adress is not null using context search.
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; There is a critical edge.
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define i32 @loadpre_critical_edge(i32* align 8 dereferenceable_or_null(48) %arg, i32 %N) {
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; CHECK-LABEL: @loadpre_critical_edge(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[ARG:%.*]], null
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; CHECK-NEXT: br i1 [[CMP]], label [[NULL_EXIT:%.*]], label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[NEW_V:%.*]] = call i32 @foo(i32 [[IV]])
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; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[ARG]], align 4
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; CHECK-NEXT: [[SUM:%.*]] = add i32 [[NEW_V]], [[V]]
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; CHECK-NEXT: store i32 [[SUM]], i32* [[ARG]], align 4
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; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[SUM]]
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; CHECK: null_exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%cmp = icmp eq i32* %arg, null
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br i1 %cmp, label %null_exit, label %header
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header:
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%iv = phi i32 [0, %entry], [%iv.next, %header]
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%new_v = call i32 @foo(i32 %iv)
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%v = load i32, i32* %arg
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%sum = add i32 %new_v, %v
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store i32 %sum, i32* %arg
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%iv.next = add i32 %iv, 1
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%cond = icmp eq i32 %iv.next, %N
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br i1 %cond, label %exit, label %header
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exit:
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ret i32 %sum
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null_exit:
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ret i32 0
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}
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; load may be speculated, adress is not null using context search.
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define i32 @loadpre_basic(i32* align 8 dereferenceable_or_null(48) %arg, i32 %N) {
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; CHECK-LABEL: @loadpre_basic(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[ARG:%.*]], null
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; CHECK-NEXT: br i1 [[CMP]], label [[NULL_EXIT:%.*]], label [[PREHEADER:%.*]]
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; CHECK: preheader:
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[PREHEADER]] ], [ [[IV_NEXT:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[NEW_V:%.*]] = call i32 @foo(i32 [[IV]])
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; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[ARG]], align 4
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; CHECK-NEXT: [[SUM:%.*]] = add i32 [[NEW_V]], [[V]]
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; CHECK-NEXT: store i32 [[SUM]], i32* [[ARG]], align 4
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; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[SUM]]
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; CHECK: null_exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%cmp = icmp eq i32* %arg, null
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br i1 %cmp, label %null_exit, label %preheader
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preheader:
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br label %header
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header:
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%iv = phi i32 [0, %preheader], [%iv.next, %header]
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%new_v = call i32 @foo(i32 %iv)
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%v = load i32, i32* %arg
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%sum = add i32 %new_v, %v
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store i32 %sum, i32* %arg
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%iv.next = add i32 %iv, 1
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%cond = icmp eq i32 %iv.next, %N
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br i1 %cond, label %exit, label %header
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exit:
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ret i32 %sum
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null_exit:
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ret i32 0
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}
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; load cannot be speculated, adress is not null check does not dominate the loop.
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define i32 @loadpre_maybe_null(i32* align 8 dereferenceable_or_null(48) %arg, i32 %N, i1 %c) {
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; CHECK-LABEL: @loadpre_maybe_null(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[NULL_CHECK:%.*]], label [[PREHEADER:%.*]]
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; CHECK: null_check:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[ARG:%.*]], null
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; CHECK-NEXT: br i1 [[CMP]], label [[NULL_EXIT:%.*]], label [[PREHEADER]]
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; CHECK: preheader:
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; CHECK-NEXT: br label [[HEADER:%.*]]
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; CHECK: header:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[PREHEADER]] ], [ [[IV_NEXT:%.*]], [[HEADER]] ]
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; CHECK-NEXT: [[NEW_V:%.*]] = call i32 @foo(i32 [[IV]])
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; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[ARG]], align 4
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; CHECK-NEXT: [[SUM:%.*]] = add i32 [[NEW_V]], [[V]]
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; CHECK-NEXT: store i32 [[SUM]], i32* [[ARG]], align 4
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; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[HEADER]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 [[SUM]]
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; CHECK: null_exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br i1 %c, label %null_check, label %preheader
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null_check:
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%cmp = icmp eq i32* %arg, null
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br i1 %cmp, label %null_exit, label %preheader
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preheader:
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br label %header
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header:
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%iv = phi i32 [0, %preheader], [%iv.next, %header]
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%new_v = call i32 @foo(i32 %iv)
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%v = load i32, i32* %arg
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%sum = add i32 %new_v, %v
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store i32 %sum, i32* %arg
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%iv.next = add i32 %iv, 1
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%cond = icmp eq i32 %iv.next, %N
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br i1 %cond, label %exit, label %header
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exit:
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ret i32 %sum
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null_exit:
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ret i32 0
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}
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; Does not guarantee that returns.
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declare i32 @foo(i32) readnone

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