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[Verifier] Allow DW_OP_LLVM_entry_value in IR
A follow up patch will make the CoroSplit pass introduce such operations in the IR level when it is safe to do so. Depends on D149748 Differential Revision: https://reviews.llvm.org/D149778
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llvm/docs/LangRef.rst

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@@ -1364,6 +1364,8 @@ Currently, only the following parameter attributes are defined:
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a valid attribute for return values and can only be applied to one
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parameter.
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.. _swiftasync:
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``swiftasync``
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This indicates that the parameter is the asynchronous context parameter and
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triggers the creation of a target-specific extended frame record to store
@@ -6005,7 +6007,8 @@ The current supported opcode vocabulary is limited:
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instruction.
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Because ``DW_OP_LLVM_entry_value`` is defined in terms of registers, it is
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only allowed in MIR. The operation is introduced by:
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usually used in MIR, but it is also allowed in LLVM IR when targetting a
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:ref:`_swiftasync` argument. The operation is introduced by:
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- ``LiveDebugValues`` pass, which applies it to function parameters that
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are unmodified throughout the function. Support is limited to simple

llvm/lib/IR/Verifier.cpp

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@@ -6339,7 +6339,17 @@ void Verifier::verifyNotEntryValue(const DbgVariableIntrinsic &I) {
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if (!E || !E->isValid())
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return;
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CheckDI(!E->isEntryValue(), "Entry values are only allowed in MIR", &I);
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// We allow EntryValues for swift async arguments, as they have an
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// ABI-guarantee to be turned into a specific register.
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if (isa<ValueAsMetadata>(I.getRawLocation()))
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if (auto *ArgLoc = dyn_cast_or_null<Argument>(I.getVariableLocationOp(0));
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ArgLoc && ArgLoc->hasAttribute(Attribute::SwiftAsync))
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return;
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CheckDI(!E->isEntryValue(),
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"Entry values are only allowed in MIR unless they target a "
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"swiftasync Argument",
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&I);
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}
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void Verifier::verifyCompileUnits() {

llvm/test/Verifier/diexpression-entry-value-llvm-ir.ll

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@@ -1,14 +1,14 @@
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; RUN: llvm-as -disable-output <%s 2>&1| FileCheck %s
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; The DW_OP_LLVM_entry_value operation can only be used in MIR.
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; CHECK: Entry values are only allowed in MIR
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; CHECK: Entry values are only allowed in MIR unless they target a swiftasync Argument
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; CHECK: call void @llvm.dbg.value(metadata i32 %param, metadata !{{.*}}, metadata !DIExpression(DW_OP_LLVM_entry_value, 1))
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; CHECK-NOT: llvm.dbg.value
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; CHECK: warning: ignoring invalid debug info
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define void @foo(i32 %param) !dbg !4 {
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define void @foo(i32 %param, ptr swiftasync %ok_param) !dbg !4 {
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entry:
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call void @llvm.dbg.value(metadata i32 %param, metadata !8, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !9
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call void @llvm.dbg.value(metadata ptr %ok_param, metadata !8, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !9
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ret void
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}
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