[PowerPC] Fix the regression caused by commit 9c588f5

Add a TypeLegal check for MVT::i1 and add the test.

Author: QingShan Zhang

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

@@ -12762,8 +12762,9 @@ SDValue PPCTargetLowering::getSqrtInputTest(SDValue Op, SelectionDAG &DAG,
                                             const DenormalMode &Mode) const {
   // We only have VSX Vector Test for software Square Root.
   EVT VT = Op.getValueType();
-  if (VT != MVT::f64 &&
-      ((VT != MVT::v2f64 && VT != MVT::v4f32) || !Subtarget.hasVSX()))
+  if (!isTypeLegal(MVT::i1) ||
+      (VT != MVT::f64 &&
+       ((VT != MVT::v2f64 && VT != MVT::v4f32) || !Subtarget.hasVSX())))
     return SDValue();
 
   SDLoc DL(Op);

llvm/test/CodeGen/PowerPC/recipest.ll

@@ -821,6 +821,90 @@ define double @foo3_fmf(double %a) nounwind {
   ret double %r
 }
 
+define double @foo3_fmf_crbits_off(double %a) #2 {
+; CHECK-P7-LABEL: foo3_fmf_crbits_off:
+; CHECK-P7:       # %bb.0:
+; CHECK-P7-NEXT:    fabs 0, 1
+; CHECK-P7-NEXT:    addis 3, 2, .LCPI21_2@toc@ha
+; CHECK-P7-NEXT:    lfd 2, .LCPI21_2@toc@l(3)
+; CHECK-P7-NEXT:    fcmpu 0, 0, 2
+; CHECK-P7-NEXT:    blt 0, .LBB21_2
+; CHECK-P7-NEXT:  # %bb.1:
+; CHECK-P7-NEXT:    frsqrte 0, 1
+; CHECK-P7-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
+; CHECK-P7-NEXT:    addis 4, 2, .LCPI21_1@toc@ha
+; CHECK-P7-NEXT:    lfs 3, .LCPI21_0@toc@l(3)
+; CHECK-P7-NEXT:    lfs 4, .LCPI21_1@toc@l(4)
+; CHECK-P7-NEXT:    fmul 2, 1, 0
+; CHECK-P7-NEXT:    fmadd 2, 2, 0, 3
+; CHECK-P7-NEXT:    fmul 0, 0, 4
+; CHECK-P7-NEXT:    fmul 0, 0, 2
+; CHECK-P7-NEXT:    fmul 1, 1, 0
+; CHECK-P7-NEXT:    fmadd 0, 1, 0, 3
+; CHECK-P7-NEXT:    fmul 1, 1, 4
+; CHECK-P7-NEXT:    fmul 1, 1, 0
+; CHECK-P7-NEXT:    blr
+; CHECK-P7-NEXT:  .LBB21_2:
+; CHECK-P7-NEXT:    fsqrt 1, 1
+; CHECK-P7-NEXT:    blr
+;
+; CHECK-P8-LABEL: foo3_fmf_crbits_off:
+; CHECK-P8:       # %bb.0:
+; CHECK-P8-NEXT:    xsabsdp 0, 1
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI21_2@toc@ha
+; CHECK-P8-NEXT:    lfd 2, .LCPI21_2@toc@l(3)
+; CHECK-P8-NEXT:    xscmpudp 0, 0, 2
+; CHECK-P8-NEXT:    blt 0, .LBB21_2
+; CHECK-P8-NEXT:  # %bb.1:
+; CHECK-P8-NEXT:    xsrsqrtedp 0, 1
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
+; CHECK-P8-NEXT:    lfs 3, .LCPI21_0@toc@l(3)
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI21_1@toc@ha
+; CHECK-P8-NEXT:    lfs 4, .LCPI21_1@toc@l(3)
+; CHECK-P8-NEXT:    fmr 5, 3
+; CHECK-P8-NEXT:    xsmuldp 2, 1, 0
+; CHECK-P8-NEXT:    xsmaddadp 5, 2, 0
+; CHECK-P8-NEXT:    xsmuldp 0, 0, 4
+; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
+; CHECK-P8-NEXT:    xsmuldp 1, 1, 0
+; CHECK-P8-NEXT:    xsmaddadp 3, 1, 0
+; CHECK-P8-NEXT:    xsmuldp 0, 1, 4
+; CHECK-P8-NEXT:    xsmuldp 1, 0, 3
+; CHECK-P8-NEXT:    blr
+; CHECK-P8-NEXT:  .LBB21_2:
+; CHECK-P8-NEXT:    xssqrtdp 1, 1
+; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-LABEL: foo3_fmf_crbits_off:
+; CHECK-P9:       # %bb.0:
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI21_2@toc@ha
+; CHECK-P9-NEXT:    xsabsdp 0, 1
+; CHECK-P9-NEXT:    lfd 2, .LCPI21_2@toc@l(3)
+; CHECK-P9-NEXT:    xscmpudp 0, 0, 2
+; CHECK-P9-NEXT:    blt 0, .LBB21_2
+; CHECK-P9-NEXT:  # %bb.1:
+; CHECK-P9-NEXT:    xsrsqrtedp 0, 1
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
+; CHECK-P9-NEXT:    lfs 3, .LCPI21_0@toc@l(3)
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI21_1@toc@ha
+; CHECK-P9-NEXT:    xsmuldp 2, 1, 0
+; CHECK-P9-NEXT:    fmr 4, 3
+; CHECK-P9-NEXT:    xsmaddadp 4, 2, 0
+; CHECK-P9-NEXT:    lfs 2, .LCPI21_1@toc@l(3)
+; CHECK-P9-NEXT:    xsmuldp 0, 0, 2
+; CHECK-P9-NEXT:    xsmuldp 0, 0, 4
+; CHECK-P9-NEXT:    xsmuldp 1, 1, 0
+; CHECK-P9-NEXT:    xsmaddadp 3, 1, 0
+; CHECK-P9-NEXT:    xsmuldp 0, 1, 2
+; CHECK-P9-NEXT:    xsmuldp 1, 0, 3
+; CHECK-P9-NEXT:    blr
+; CHECK-P9-NEXT:  .LBB21_2:
+; CHECK-P9-NEXT:    xssqrtdp 1, 1
+; CHECK-P9-NEXT:    blr
+  %r = call reassoc ninf afn double @llvm.sqrt.f64(double %a)
+  ret double %r
+}
+
 define double @foo3_safe(double %a) nounwind {
 ; CHECK-P7-LABEL: foo3_safe:
 ; CHECK-P7:       # %bb.0:
@@ -844,67 +928,67 @@ define float @goo3_fmf(float %a) nounwind {
 ; CHECK-P7-LABEL: goo3_fmf:
 ; CHECK-P7:       # %bb.0:
 ; CHECK-P7-NEXT:    fabs 0, 1
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI22_2@toc@ha
-; CHECK-P7-NEXT:    lfs 2, .LCPI22_2@toc@l(3)
+; CHECK-P7-NEXT:    addis 3, 2, .LCPI23_2@toc@ha
+; CHECK-P7-NEXT:    lfs 2, .LCPI23_2@toc@l(3)
 ; CHECK-P7-NEXT:    fcmpu 0, 0, 2
-; CHECK-P7-NEXT:    blt 0, .LBB22_2
+; CHECK-P7-NEXT:    blt 0, .LBB23_2
 ; CHECK-P7-NEXT:  # %bb.1:
 ; CHECK-P7-NEXT:    frsqrtes 0, 1
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI22_0@toc@ha
-; CHECK-P7-NEXT:    addis 4, 2, .LCPI22_1@toc@ha
-; CHECK-P7-NEXT:    lfs 2, .LCPI22_0@toc@l(3)
-; CHECK-P7-NEXT:    lfs 3, .LCPI22_1@toc@l(4)
+; CHECK-P7-NEXT:    addis 3, 2, .LCPI23_0@toc@ha
+; CHECK-P7-NEXT:    addis 4, 2, .LCPI23_1@toc@ha
+; CHECK-P7-NEXT:    lfs 2, .LCPI23_0@toc@l(3)
+; CHECK-P7-NEXT:    lfs 3, .LCPI23_1@toc@l(4)
 ; CHECK-P7-NEXT:    fmuls 1, 1, 0
 ; CHECK-P7-NEXT:    fmadds 0, 1, 0, 2
 ; CHECK-P7-NEXT:    fmuls 1, 1, 3
 ; CHECK-P7-NEXT:    fmuls 1, 1, 0
 ; CHECK-P7-NEXT:    blr
-; CHECK-P7-NEXT:  .LBB22_2:
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI22_3@toc@ha
-; CHECK-P7-NEXT:    lfs 1, .LCPI22_3@toc@l(3)
+; CHECK-P7-NEXT:  .LBB23_2:
+; CHECK-P7-NEXT:    addis 3, 2, .LCPI23_3@toc@ha
+; CHECK-P7-NEXT:    lfs 1, .LCPI23_3@toc@l(3)
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: goo3_fmf:
 ; CHECK-P8:       # %bb.0:
 ; CHECK-P8-NEXT:    xsabsdp 0, 1
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI22_2@toc@ha
-; CHECK-P8-NEXT:    lfs 2, .LCPI22_2@toc@l(3)
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI23_2@toc@ha
+; CHECK-P8-NEXT:    lfs 2, .LCPI23_2@toc@l(3)
 ; CHECK-P8-NEXT:    fcmpu 0, 0, 2
 ; CHECK-P8-NEXT:    xxlxor 0, 0, 0
-; CHECK-P8-NEXT:    blt 0, .LBB22_2
+; CHECK-P8-NEXT:    blt 0, .LBB23_2
 ; CHECK-P8-NEXT:  # %bb.1:
 ; CHECK-P8-NEXT:    xsrsqrtesp 0, 1
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI22_0@toc@ha
-; CHECK-P8-NEXT:    addis 4, 2, .LCPI22_1@toc@ha
-; CHECK-P8-NEXT:    lfs 2, .LCPI22_0@toc@l(3)
-; CHECK-P8-NEXT:    lfs 3, .LCPI22_1@toc@l(4)
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI23_0@toc@ha
+; CHECK-P8-NEXT:    addis 4, 2, .LCPI23_1@toc@ha
+; CHECK-P8-NEXT:    lfs 2, .LCPI23_0@toc@l(3)
+; CHECK-P8-NEXT:    lfs 3, .LCPI23_1@toc@l(4)
 ; CHECK-P8-NEXT:    xsmulsp 1, 1, 0
 ; CHECK-P8-NEXT:    xsmaddasp 2, 1, 0
 ; CHECK-P8-NEXT:    xsmulsp 0, 1, 3
 ; CHECK-P8-NEXT:    xsmulsp 0, 0, 2
-; CHECK-P8-NEXT:  .LBB22_2:
+; CHECK-P8-NEXT:  .LBB23_2:
 ; CHECK-P8-NEXT:    fmr 1, 0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: goo3_fmf:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI22_2@toc@ha
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI23_2@toc@ha
 ; CHECK-P9-NEXT:    xsabsdp 0, 1
-; CHECK-P9-NEXT:    lfs 2, .LCPI22_2@toc@l(3)
+; CHECK-P9-NEXT:    lfs 2, .LCPI23_2@toc@l(3)
 ; CHECK-P9-NEXT:    fcmpu 0, 0, 2
 ; CHECK-P9-NEXT:    xxlxor 0, 0, 0
-; CHECK-P9-NEXT:    blt 0, .LBB22_2
+; CHECK-P9-NEXT:    blt 0, .LBB23_2
 ; CHECK-P9-NEXT:  # %bb.1:
 ; CHECK-P9-NEXT:    xsrsqrtesp 0, 1
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI22_0@toc@ha
-; CHECK-P9-NEXT:    lfs 2, .LCPI22_0@toc@l(3)
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI22_1@toc@ha
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI23_0@toc@ha
+; CHECK-P9-NEXT:    lfs 2, .LCPI23_0@toc@l(3)
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
 ; CHECK-P9-NEXT:    xsmulsp 1, 1, 0
 ; CHECK-P9-NEXT:    xsmaddasp 2, 1, 0
-; CHECK-P9-NEXT:    lfs 0, .LCPI22_1@toc@l(3)
+; CHECK-P9-NEXT:    lfs 0, .LCPI23_1@toc@l(3)
 ; CHECK-P9-NEXT:    xsmulsp 0, 1, 0
 ; CHECK-P9-NEXT:    xsmulsp 0, 0, 2
-; CHECK-P9-NEXT:  .LBB22_2:
+; CHECK-P9-NEXT:  .LBB23_2:
 ; CHECK-P9-NEXT:    fmr 1, 0
 ; CHECK-P9-NEXT:    blr
   %r = call reassoc ninf afn float @llvm.sqrt.f32(float %a)
@@ -934,12 +1018,12 @@ define <4 x float> @hoo3_fmf(<4 x float> %a) #1 {
 ; CHECK-P7-LABEL: hoo3_fmf:
 ; CHECK-P7:       # %bb.0:
 ; CHECK-P7-NEXT:    vspltisw 3, -1
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI24_0@toc@ha
+; CHECK-P7-NEXT:    addis 3, 2, .LCPI25_0@toc@ha
 ; CHECK-P7-NEXT:    vrsqrtefp 4, 2
-; CHECK-P7-NEXT:    addi 3, 3, .LCPI24_0@toc@l
+; CHECK-P7-NEXT:    addi 3, 3, .LCPI25_0@toc@l
 ; CHECK-P7-NEXT:    lvx 0, 0, 3
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI24_1@toc@ha
-; CHECK-P7-NEXT:    addi 3, 3, .LCPI24_1@toc@l
+; CHECK-P7-NEXT:    addis 3, 2, .LCPI25_1@toc@ha
+; CHECK-P7-NEXT:    addi 3, 3, .LCPI25_1@toc@l
 ; CHECK-P7-NEXT:    lvx 1, 0, 3
 ; CHECK-P7-NEXT:    vslw 3, 3, 3
 ; CHECK-P7-NEXT:    vmaddfp 5, 2, 4, 3
@@ -954,42 +1038,42 @@ define <4 x float> @hoo3_fmf(<4 x float> %a) #1 {
 ; CHECK-P8-LABEL: hoo3_fmf:
 ; CHECK-P8:       # %bb.0:
 ; CHECK-P8-NEXT:    xvtsqrtsp 0, 34
-; CHECK-P8-NEXT:    bc 12, 2, .LBB24_2
+; CHECK-P8-NEXT:    bc 12, 2, .LBB25_2
 ; CHECK-P8-NEXT:  # %bb.1:
 ; CHECK-P8-NEXT:    xvrsqrtesp 0, 34
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI24_0@toc@ha
-; CHECK-P8-NEXT:    addis 4, 2, .LCPI24_1@toc@ha
-; CHECK-P8-NEXT:    addi 3, 3, .LCPI24_0@toc@l
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI25_0@toc@ha
+; CHECK-P8-NEXT:    addis 4, 2, .LCPI25_1@toc@ha
+; CHECK-P8-NEXT:    addi 3, 3, .LCPI25_0@toc@l
 ; CHECK-P8-NEXT:    xvmulsp 1, 34, 0
 ; CHECK-P8-NEXT:    lvx 2, 0, 3
-; CHECK-P8-NEXT:    addi 3, 4, .LCPI24_1@toc@l
+; CHECK-P8-NEXT:    addi 3, 4, .LCPI25_1@toc@l
 ; CHECK-P8-NEXT:    lvx 3, 0, 3
 ; CHECK-P8-NEXT:    xvmaddasp 34, 1, 0
 ; CHECK-P8-NEXT:    xvmulsp 0, 1, 35
 ; CHECK-P8-NEXT:    xvmulsp 34, 0, 34
 ; CHECK-P8-NEXT:    blr
-; CHECK-P8-NEXT:  .LBB24_2:
+; CHECK-P8-NEXT:  .LBB25_2:
 ; CHECK-P8-NEXT:    xvsqrtsp 34, 34
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: hoo3_fmf:
 ; CHECK-P9:       # %bb.0:
 ; CHECK-P9-NEXT:    xvtsqrtsp 0, 34
-; CHECK-P9-NEXT:    bc 12, 2, .LBB24_2
+; CHECK-P9-NEXT:    bc 12, 2, .LBB25_2
 ; CHECK-P9-NEXT:  # %bb.1:
 ; CHECK-P9-NEXT:    xvrsqrtesp 0, 34
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI24_0@toc@ha
-; CHECK-P9-NEXT:    addi 3, 3, .LCPI24_0@toc@l
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI25_0@toc@ha
+; CHECK-P9-NEXT:    addi 3, 3, .LCPI25_0@toc@l
 ; CHECK-P9-NEXT:    lxvx 2, 0, 3
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI24_1@toc@ha
-; CHECK-P9-NEXT:    addi 3, 3, .LCPI24_1@toc@l
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI25_1@toc@ha
+; CHECK-P9-NEXT:    addi 3, 3, .LCPI25_1@toc@l
 ; CHECK-P9-NEXT:    xvmulsp 1, 34, 0
 ; CHECK-P9-NEXT:    xvmaddasp 2, 1, 0
 ; CHECK-P9-NEXT:    lxvx 0, 0, 3
 ; CHECK-P9-NEXT:    xvmulsp 0, 1, 0
 ; CHECK-P9-NEXT:    xvmulsp 34, 0, 2
 ; CHECK-P9-NEXT:    blr
-; CHECK-P9-NEXT:  .LBB24_2:
+; CHECK-P9-NEXT:  .LBB25_2:
 ; CHECK-P9-NEXT:    xvsqrtsp 34, 34
 ; CHECK-P9-NEXT:    blr
   %r = call reassoc ninf afn <4 x float> @llvm.sqrt.v4f32(<4 x float> %a)
@@ -1034,11 +1118,11 @@ define <2 x double> @hoo4_fmf(<2 x double> %a) #1 {
 ; CHECK-P7-LABEL: hoo4_fmf:
 ; CHECK-P7:       # %bb.0:
 ; CHECK-P7-NEXT:    ftsqrt 0, 1
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI26_0@toc@ha
-; CHECK-P7-NEXT:    addis 4, 2, .LCPI26_1@toc@ha
-; CHECK-P7-NEXT:    lfs 3, .LCPI26_0@toc@l(3)
-; CHECK-P7-NEXT:    lfs 0, .LCPI26_1@toc@l(4)
-; CHECK-P7-NEXT:    bc 12, 2, .LBB26_3
+; CHECK-P7-NEXT:    addis 3, 2, .LCPI27_0@toc@ha
+; CHECK-P7-NEXT:    addis 4, 2, .LCPI27_1@toc@ha
+; CHECK-P7-NEXT:    lfs 3, .LCPI27_0@toc@l(3)
+; CHECK-P7-NEXT:    lfs 0, .LCPI27_1@toc@l(4)
+; CHECK-P7-NEXT:    bc 12, 2, .LBB27_3
 ; CHECK-P7-NEXT:  # %bb.1:
 ; CHECK-P7-NEXT:    frsqrte 4, 1
 ; CHECK-P7-NEXT:    fmul 5, 1, 4
@@ -1050,15 +1134,15 @@ define <2 x double> @hoo4_fmf(<2 x double> %a) #1 {
 ; CHECK-P7-NEXT:    fmul 1, 1, 0
 ; CHECK-P7-NEXT:    fmul 1, 1, 4
 ; CHECK-P7-NEXT:    ftsqrt 0, 2
-; CHECK-P7-NEXT:    bc 4, 2, .LBB26_4
-; CHECK-P7-NEXT:  .LBB26_2:
+; CHECK-P7-NEXT:    bc 4, 2, .LBB27_4
+; CHECK-P7-NEXT:  .LBB27_2:
 ; CHECK-P7-NEXT:    fsqrt 2, 2
 ; CHECK-P7-NEXT:    blr
-; CHECK-P7-NEXT:  .LBB26_3:
+; CHECK-P7-NEXT:  .LBB27_3:
 ; CHECK-P7-NEXT:    fsqrt 1, 1
 ; CHECK-P7-NEXT:    ftsqrt 0, 2
-; CHECK-P7-NEXT:    bc 12, 2, .LBB26_2
-; CHECK-P7-NEXT:  .LBB26_4:
+; CHECK-P7-NEXT:    bc 12, 2, .LBB27_2
+; CHECK-P7-NEXT:  .LBB27_4:
 ; CHECK-P7-NEXT:    frsqrte 4, 2
 ; CHECK-P7-NEXT:    fmul 5, 2, 4
 ; CHECK-P7-NEXT:    fmadd 5, 5, 4, 3
@@ -1073,14 +1157,14 @@ define <2 x double> @hoo4_fmf(<2 x double> %a) #1 {
 ; CHECK-P8-LABEL: hoo4_fmf:
 ; CHECK-P8:       # %bb.0:
 ; CHECK-P8-NEXT:    xvtsqrtdp 0, 34
-; CHECK-P8-NEXT:    bc 12, 2, .LBB26_2
+; CHECK-P8-NEXT:    bc 12, 2, .LBB27_2
 ; CHECK-P8-NEXT:  # %bb.1:
 ; CHECK-P8-NEXT:    xvrsqrtedp 0, 34
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI26_0@toc@ha
-; CHECK-P8-NEXT:    addi 3, 3, .LCPI26_0@toc@l
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI27_0@toc@ha
+; CHECK-P8-NEXT:    addi 3, 3, .LCPI27_0@toc@l
 ; CHECK-P8-NEXT:    lxvd2x 1, 0, 3
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI26_1@toc@ha
-; CHECK-P8-NEXT:    addi 3, 3, .LCPI26_1@toc@l
+; CHECK-P8-NEXT:    addis 3, 2, .LCPI27_1@toc@ha
+; CHECK-P8-NEXT:    addi 3, 3, .LCPI27_1@toc@l
 ; CHECK-P8-NEXT:    lxvd2x 3, 0, 3
 ; CHECK-P8-NEXT:    xxswapd 1, 1
 ; CHECK-P8-NEXT:    xvmuldp 2, 34, 0
@@ -1094,21 +1178,21 @@ define <2 x double> @hoo4_fmf(<2 x double> %a) #1 {
 ; CHECK-P8-NEXT:    xvmuldp 0, 2, 3
 ; CHECK-P8-NEXT:    xvmuldp 34, 0, 1
 ; CHECK-P8-NEXT:    blr
-; CHECK-P8-NEXT:  .LBB26_2:
+; CHECK-P8-NEXT:  .LBB27_2:
 ; CHECK-P8-NEXT:    xvsqrtdp 34, 34
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: hoo4_fmf:
 ; CHECK-P9:       # %bb.0:
 ; CHECK-P9-NEXT:    xvtsqrtdp 0, 34
-; CHECK-P9-NEXT:    bc 12, 2, .LBB26_2
+; CHECK-P9-NEXT:    bc 12, 2, .LBB27_2
 ; CHECK-P9-NEXT:  # %bb.1:
 ; CHECK-P9-NEXT:    xvrsqrtedp 0, 34
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI26_0@toc@ha
-; CHECK-P9-NEXT:    addi 3, 3, .LCPI26_0@toc@l
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI27_0@toc@ha
+; CHECK-P9-NEXT:    addi 3, 3, .LCPI27_0@toc@l
 ; CHECK-P9-NEXT:    lxvx 2, 0, 3
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI26_1@toc@ha
-; CHECK-P9-NEXT:    addi 3, 3, .LCPI26_1@toc@l
+; CHECK-P9-NEXT:    addis 3, 2, .LCPI27_1@toc@ha
+; CHECK-P9-NEXT:    addi 3, 3, .LCPI27_1@toc@l
 ; CHECK-P9-NEXT:    xvmuldp 1, 34, 0
 ; CHECK-P9-NEXT:    xxlor 3, 2, 2
 ; CHECK-P9-NEXT:    xvmaddadp 3, 1, 0
@@ -1120,7 +1204,7 @@ define <2 x double> @hoo4_fmf(<2 x double> %a) #1 {
 ; CHECK-P9-NEXT:    xvmuldp 0, 3, 1
 ; CHECK-P9-NEXT:    xvmuldp 34, 0, 2
 ; CHECK-P9-NEXT:    blr
-; CHECK-P9-NEXT:  .LBB26_2:
+; CHECK-P9-NEXT:  .LBB27_2:
 ; CHECK-P9-NEXT:    xvsqrtdp 34, 34
 ; CHECK-P9-NEXT:    blr
   %r = call reassoc ninf afn <2 x double> @llvm.sqrt.v2f64(<2 x double> %a)
@@ -1215,3 +1299,4 @@ define fp128 @hoo5_safe(fp128 %a) #1 {
 
 attributes #0 = { nounwind "reciprocal-estimates"="sqrtf:0,sqrtd:0" }
 attributes #1 = { nounwind "denormal-fp-math"="preserve-sign,preserve-sign" }
+attributes #2 = { nounwind readnone "target-features"="-crbits" }