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[CodeGen] Use std::pair<MCRegister, Register> to match return from MRI.liveins(). NFC
MachineRegisterInfo::liveins returns std::pair<MCRegister, Register>. Don't convert to std::pair<unsigned, unsigned>.
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7 files changed

+7
-7
lines changed

7 files changed

+7
-7
lines changed

llvm/lib/CodeGen/MIRPrinter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -329,7 +329,7 @@ void MIRPrinter::convert(yaml::MachineFunction &MF,
329329
}
330330

331331
// Print the live ins.
332-
for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
332+
for (std::pair<MCRegister, Register> LI : RegInfo.liveins()) {
333333
yaml::MachineFunctionLiveIn LiveIn;
334334
printRegMIR(LI.first, LiveIn.Register, TRI);
335335
if (LI.second)

llvm/lib/CodeGen/RDFGraph.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -913,7 +913,7 @@ void DataFlowGraph::build(const Config &config) {
913913
// Collect function live-ins and entry block live-ins.
914914
MachineBasicBlock &EntryB = *EA.Addr->getCode();
915915
assert(EntryB.pred_empty() && "Function entry block has predecessors");
916-
for (std::pair<unsigned, unsigned> P : MRI.liveins())
916+
for (std::pair<MCRegister, Register> P : MRI.liveins())
917917
LiveIns.insert(RegisterRef(P.first));
918918
if (MRI.tracksLiveness()) {
919919
for (auto I : EntryB.liveins())

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -675,7 +675,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
675675

676676
DenseMap<unsigned, unsigned> LiveInMap;
677677
if (!FuncInfo->ArgDbgValues.empty())
678-
for (std::pair<unsigned, unsigned> LI : RegInfo->liveins())
678+
for (std::pair<MCRegister, Register> LI : RegInfo->liveins())
679679
if (LI.second)
680680
LiveInMap.insert(LI);
681681

llvm/lib/Target/AMDGPU/R600InstrInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1162,7 +1162,7 @@ int R600InstrInfo::getIndirectIndexBegin(const MachineFunction &MF) const {
11621162
}
11631163

11641164
const TargetRegisterClass *IndirectRC = getIndirectAddrRegClass();
1165-
for (std::pair<unsigned, unsigned> LI : MRI.liveins()) {
1165+
for (std::pair<MCRegister, Register> LI : MRI.liveins()) {
11661166
Register Reg = LI.first;
11671167
if (Reg.isVirtual() || !IndirectRC->contains(Reg))
11681168
continue;

llvm/lib/Target/Hexagon/HexagonBitTracker.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1287,7 +1287,7 @@ unsigned HexagonEvaluator::getNextPhysReg(unsigned PReg, unsigned Width) const {
12871287
}
12881288

12891289
unsigned HexagonEvaluator::getVirtRegFor(unsigned PReg) const {
1290-
for (std::pair<unsigned,unsigned> P : MRI.liveins())
1290+
for (std::pair<MCRegister, Register> P : MRI.liveins())
12911291
if (P.first == PReg)
12921292
return P.second;
12931293
return 0;

llvm/lib/Target/X86/X86ISelLoweringCall.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1903,7 +1903,7 @@ SDValue X86TargetLowering::LowerFormalArguments(
19031903
if (shouldDisableArgRegFromCSR(CallConv) ||
19041904
F.hasFnAttribute("no_caller_saved_registers")) {
19051905
MachineRegisterInfo &MRI = MF.getRegInfo();
1906-
for (std::pair<Register, Register> Pair : MRI.liveins())
1906+
for (std::pair<MCRegister, Register> Pair : MRI.liveins())
19071907
MRI.disableCalleeSavedRegister(Pair.first);
19081908
}
19091909

llvm/lib/Target/X86/X86VZeroUpper.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,7 @@ static bool isYmmOrZmmReg(unsigned Reg) {
136136
}
137137

138138
static bool checkFnHasLiveInYmmOrZmm(MachineRegisterInfo &MRI) {
139-
for (std::pair<unsigned, unsigned> LI : MRI.liveins())
139+
for (std::pair<MCRegister, Register> LI : MRI.liveins())
140140
if (isYmmOrZmmReg(LI.first))
141141
return true;
142142

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