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Merge pull request #3457 from adrian-prantl/79515454
GlobalISel/AArch64: don't optimize away redundant branches at -O0
2 parents 5160a19 + 696c7a5 commit ccd5c84

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11 files changed

+193
-48
lines changed

11 files changed

+193
-48
lines changed

‎llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -566,7 +566,7 @@ bool IRTranslator::translateBr(const User &U, MachineIRBuilder &MIRBuilder) {
566566

567567
if (BrInst.isUnconditional()) {
568568
// If the unconditional target is the layout successor, fallthrough.
569-
if (!CurMBB.isLayoutSuccessor(Succ0MBB))
569+
if (OptLevel == CodeGenOpt::None || !CurMBB.isLayoutSuccessor(Succ0MBB))
570570
MIRBuilder.buildBr(*Succ0MBB);
571571

572572
// Link successors.

‎llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

Lines changed: 2 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2158,17 +2158,8 @@ bool AArch64InstructionSelector::earlySelect(MachineInstr &I) {
21582158
I.eraseFromParent();
21592159
return true;
21602160
}
2161-
case TargetOpcode::G_BR: {
2162-
// If the branch jumps to the fallthrough block, don't bother emitting it.
2163-
// Only do this for -O0 for a good code size improvement, because when
2164-
// optimizations are enabled we want to leave this choice to
2165-
// MachineBlockPlacement.
2166-
bool EnableOpt = MF.getTarget().getOptLevel() != CodeGenOpt::None;
2167-
if (EnableOpt || !MBB.isLayoutSuccessor(I.getOperand(0).getMBB()))
2168-
return false;
2169-
I.eraseFromParent();
2170-
return true;
2171-
}
2161+
case TargetOpcode::G_BR:
2162+
return false;
21722163
case TargetOpcode::G_SHL:
21732164
return earlySelectSHL(I, MRI);
21742165
case TargetOpcode::G_CONSTANT: {

‎llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -385,6 +385,7 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
385385
; CHECK-LLSC-O0-NEXT: .cfi_def_cfa_offset 64
386386
; CHECK-LLSC-O0-NEXT: str x2, [sp, #48] // 8-byte Folded Spill
387387
; CHECK-LLSC-O0-NEXT: str x3, [sp, #56] // 8-byte Folded Spill
388+
; CHECK-LLSC-O0-NEXT: b .LBB4_1
388389
; CHECK-LLSC-O0-NEXT: .LBB4_1: // %atomicrmw.start
389390
; CHECK-LLSC-O0-NEXT: // =>This Inner Loop Header: Depth=1
390391
; CHECK-LLSC-O0-NEXT: ldr x11, [sp, #48] // 8-byte Folded Reload
@@ -425,7 +426,8 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
425426
; CHECK-LLSC-O0-NEXT: csel x10, x9, x8, eq
426427
; CHECK-LLSC-O0-NEXT: stxp w8, x9, x10, [x11]
427428
; CHECK-LLSC-O0-NEXT: cbnz w8, .LBB4_1
428-
; CHECK-LLSC-O0-NEXT: // %bb.2: // %atomicrmw.end
429+
; CHECK-LLSC-O0-NEXT: b .LBB4_2
430+
; CHECK-LLSC-O0-NEXT: .LBB4_2: // %atomicrmw.end
429431
; CHECK-LLSC-O0-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
430432
; CHECK-LLSC-O0-NEXT: ldr x8, [sp, #56] // 8-byte Folded Reload
431433
; CHECK-LLSC-O0-NEXT: str q0, [x8]
@@ -438,6 +440,7 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
438440
; CHECK-CAS-O0-NEXT: .cfi_def_cfa_offset 64
439441
; CHECK-CAS-O0-NEXT: str x2, [sp, #48] // 8-byte Folded Spill
440442
; CHECK-CAS-O0-NEXT: str x3, [sp, #56] // 8-byte Folded Spill
443+
; CHECK-CAS-O0-NEXT: b .LBB4_1
441444
; CHECK-CAS-O0-NEXT: .LBB4_1: // %atomicrmw.start
442445
; CHECK-CAS-O0-NEXT: // =>This Inner Loop Header: Depth=1
443446
; CHECK-CAS-O0-NEXT: ldr x11, [sp, #48] // 8-byte Folded Reload
@@ -478,7 +481,8 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
478481
; CHECK-CAS-O0-NEXT: csel x10, x9, x8, eq
479482
; CHECK-CAS-O0-NEXT: stxp w8, x9, x10, [x11]
480483
; CHECK-CAS-O0-NEXT: cbnz w8, .LBB4_1
481-
; CHECK-CAS-O0-NEXT: // %bb.2: // %atomicrmw.end
484+
; CHECK-CAS-O0-NEXT: b .LBB4_2
485+
; CHECK-CAS-O0-NEXT: .LBB4_2: // %atomicrmw.end
482486
; CHECK-CAS-O0-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
483487
; CHECK-CAS-O0-NEXT: ldr x8, [sp, #56] // 8-byte Folded Reload
484488
; CHECK-CAS-O0-NEXT: str q0, [x8]

‎llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll

Lines changed: 78 additions & 26 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -87,8 +87,6 @@ bb2:
8787
; CHECK: body:
8888
; CHECK: bb.{{[0-9]+}}.{{[a-zA-Z0-9.]+}}:
8989
; CHECK-NEXT: successors: %[[END:bb.[0-9]+]](0x80000000)
90-
; We don't emit a branch here, as we can fallthrough to the successor.
91-
; CHECK-NOT: G_BR
9290
; CHECK: [[END]].{{[a-zA-Z0-9.]+}}:
9391
; CHECK-NEXT: RET_ReallyLR
9492
define void @uncondbr_fallthrough() {
@@ -137,7 +135,6 @@ false:
137135
; CHECK: bb.{{[0-9]+.[a-zA-Z0-9.]+}}:
138136
; Make sure we have one successor
139137
; CHECK-NEXT: successors: %[[BB_L1:bb.[0-9]+]](0x80000000)
140-
; CHECK-NOT: G_BR
141138
;
142139
; Check basic block L1 has 2 successors: BBL1 and BBL2
143140
; CHECK: [[BB_L1]].{{[a-zA-Z0-9.]+}} (address-taken):

‎llvm/test/CodeGen/AArch64/unwind-preserved.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -365,7 +365,8 @@ define aarch64_vector_pcs <4 x i32> @invoke_callee_may_throw_neon(<4 x i32> %v)
365365
; GISEL-NEXT: bl may_throw_neon
366366
; GISEL-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
367367
; GISEL-NEXT: .Ltmp4:
368-
; GISEL-NEXT: // %bb.1: // %.Lcontinue
368+
; GISEL-NEXT: b .LBB1_1
369+
; GISEL-NEXT: .LBB1_1: // %.Lcontinue
369370
; GISEL-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
370371
; GISEL-NEXT: ldp x29, x30, [sp, #288] // 16-byte Folded Reload
371372
; GISEL-NEXT: ldp q9, q8, [sp, #256] // 32-byte Folded Reload

‎llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -55,8 +55,9 @@ define i32 @mod4_0_to_11(i32 %a) {
5555
; MIPS32-NEXT: jr $ra
5656
; MIPS32-NEXT: nop
5757
; MIPS32-NEXT: $BB0_6: # %sw.default
58-
; MIPS32-NEXT: .insn
59-
; MIPS32-NEXT: # %bb.7: # %sw.epilog
58+
; MIPS32-NEXT: j $BB0_7
59+
; MIPS32-NEXT: nop
60+
; MIPS32-NEXT: $BB0_7: # %sw.epilog
6061
; MIPS32-NEXT: lw $1, 8($sp) # 4-byte Folded Reload
6162
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
6263
; MIPS32-NEXT: ori $3, $zero, 8
@@ -158,8 +159,9 @@ define i32 @mod4_0_to_11(i32 %a) {
158159
; MIPS32_PIC-NEXT: jr $ra
159160
; MIPS32_PIC-NEXT: nop
160161
; MIPS32_PIC-NEXT: $BB0_6: # %sw.default
161-
; MIPS32_PIC-NEXT: .insn
162-
; MIPS32_PIC-NEXT: # %bb.7: # %sw.epilog
162+
; MIPS32_PIC-NEXT: b $BB0_7
163+
; MIPS32_PIC-NEXT: nop
164+
; MIPS32_PIC-NEXT: $BB0_7: # %sw.epilog
163165
; MIPS32_PIC-NEXT: lw $1, 16($sp) # 4-byte Folded Reload
164166
; MIPS32_PIC-NEXT: lw $2, 12($sp) # 4-byte Folded Reload
165167
; MIPS32_PIC-NEXT: ori $3, $zero, 8

‎llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,8 @@ define void @long_chain_ambiguous_i32_in_gpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, i32*
5757
; MIPS32-NEXT: lw $1, 40($sp) # 4-byte Folded Reload
5858
; MIPS32-NEXT: lw $1, 0($1)
5959
; MIPS32-NEXT: sw $1, 16($sp) # 4-byte Folded Spill
60+
; MIPS32-NEXT: j $BB0_9
61+
; MIPS32-NEXT: nop
6062
; MIPS32-NEXT: $BB0_9: # %b.PHI.1
6163
; MIPS32-NEXT: lw $1, 28($sp) # 4-byte Folded Reload
6264
; MIPS32-NEXT: lw $2, 16($sp) # 4-byte Folded Reload
@@ -93,6 +95,8 @@ define void @long_chain_ambiguous_i32_in_gpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, i32*
9395
; MIPS32-NEXT: lw $1, 36($sp) # 4-byte Folded Reload
9496
; MIPS32-NEXT: lw $1, 0($1)
9597
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
98+
; MIPS32-NEXT: j $BB0_16
99+
; MIPS32-NEXT: nop
96100
; MIPS32-NEXT: $BB0_16: # %b.PHI.2
97101
; MIPS32-NEXT: lw $1, 24($sp) # 4-byte Folded Reload
98102
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
@@ -244,6 +248,8 @@ define void @long_chain_i32_in_gpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, i32* %a, i32* %
244248
; MIPS32-NEXT: lw $1, 44($sp) # 4-byte Folded Reload
245249
; MIPS32-NEXT: lw $1, 0($1)
246250
; MIPS32-NEXT: sw $1, 20($sp) # 4-byte Folded Spill
251+
; MIPS32-NEXT: j $BB1_9
252+
; MIPS32-NEXT: nop
247253
; MIPS32-NEXT: $BB1_9: # %b.PHI.1
248254
; MIPS32-NEXT: lw $2, 52($sp) # 4-byte Folded Reload
249255
; MIPS32-NEXT: lw $1, 32($sp) # 4-byte Folded Reload
@@ -282,6 +288,8 @@ define void @long_chain_i32_in_gpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, i32* %a, i32* %
282288
; MIPS32-NEXT: lw $1, 40($sp) # 4-byte Folded Reload
283289
; MIPS32-NEXT: lw $1, 0($1)
284290
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
291+
; MIPS32-NEXT: j $BB1_16
292+
; MIPS32-NEXT: nop
285293
; MIPS32-NEXT: $BB1_16: # %b.PHI.2
286294
; MIPS32-NEXT: lw $1, 28($sp) # 4-byte Folded Reload
287295
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
@@ -432,6 +440,8 @@ define void @long_chain_ambiguous_float_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, flo
432440
; MIPS32-NEXT: lw $1, 40($sp) # 4-byte Folded Reload
433441
; MIPS32-NEXT: lw $1, 0($1)
434442
; MIPS32-NEXT: sw $1, 16($sp) # 4-byte Folded Spill
443+
; MIPS32-NEXT: j $BB2_9
444+
; MIPS32-NEXT: nop
435445
; MIPS32-NEXT: $BB2_9: # %b.PHI.1
436446
; MIPS32-NEXT: lw $1, 28($sp) # 4-byte Folded Reload
437447
; MIPS32-NEXT: lw $2, 16($sp) # 4-byte Folded Reload
@@ -468,6 +478,8 @@ define void @long_chain_ambiguous_float_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, flo
468478
; MIPS32-NEXT: lw $1, 36($sp) # 4-byte Folded Reload
469479
; MIPS32-NEXT: lw $1, 0($1)
470480
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
481+
; MIPS32-NEXT: j $BB2_16
482+
; MIPS32-NEXT: nop
471483
; MIPS32-NEXT: $BB2_16: # %b.PHI.2
472484
; MIPS32-NEXT: lw $1, 24($sp) # 4-byte Folded Reload
473485
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
@@ -620,6 +632,8 @@ define void @long_chain_float_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, float* %a, fl
620632
; MIPS32-NEXT: lw $1, 44($sp) # 4-byte Folded Reload
621633
; MIPS32-NEXT: lwc1 $f0, 0($1)
622634
; MIPS32-NEXT: swc1 $f0, 20($sp) # 4-byte Folded Spill
635+
; MIPS32-NEXT: j $BB3_9
636+
; MIPS32-NEXT: nop
623637
; MIPS32-NEXT: $BB3_9: # %b.PHI.1
624638
; MIPS32-NEXT: lwc1 $f0, 52($sp) # 4-byte Folded Reload
625639
; MIPS32-NEXT: lw $1, 32($sp) # 4-byte Folded Reload
@@ -658,6 +672,8 @@ define void @long_chain_float_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, float* %a, fl
658672
; MIPS32-NEXT: lw $1, 40($sp) # 4-byte Folded Reload
659673
; MIPS32-NEXT: lwc1 $f0, 0($1)
660674
; MIPS32-NEXT: swc1 $f0, 4($sp) # 4-byte Folded Spill
675+
; MIPS32-NEXT: j $BB3_16
676+
; MIPS32-NEXT: nop
661677
; MIPS32-NEXT: $BB3_16: # %b.PHI.2
662678
; MIPS32-NEXT: lw $1, 28($sp) # 4-byte Folded Reload
663679
; MIPS32-NEXT: lwc1 $f0, 4($sp) # 4-byte Folded Reload

‎llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,8 @@ define void @long_chain_ambiguous_i64_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, i64*
5757
; MIPS32-NEXT: lw $1, 64($sp) # 4-byte Folded Reload
5858
; MIPS32-NEXT: ldc1 $f0, 0($1)
5959
; MIPS32-NEXT: sdc1 $f0, 32($sp) # 8-byte Folded Spill
60+
; MIPS32-NEXT: j $BB0_9
61+
; MIPS32-NEXT: nop
6062
; MIPS32-NEXT: $BB0_9: # %b.PHI.1
6163
; MIPS32-NEXT: lw $1, 52($sp) # 4-byte Folded Reload
6264
; MIPS32-NEXT: ldc1 $f0, 32($sp) # 8-byte Folded Reload
@@ -93,6 +95,8 @@ define void @long_chain_ambiguous_i64_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, i64*
9395
; MIPS32-NEXT: lw $1, 60($sp) # 4-byte Folded Reload
9496
; MIPS32-NEXT: ldc1 $f0, 0($1)
9597
; MIPS32-NEXT: sdc1 $f0, 8($sp) # 8-byte Folded Spill
98+
; MIPS32-NEXT: j $BB0_16
99+
; MIPS32-NEXT: nop
96100
; MIPS32-NEXT: $BB0_16: # %b.PHI.2
97101
; MIPS32-NEXT: lw $1, 48($sp) # 4-byte Folded Reload
98102
; MIPS32-NEXT: ldc1 $f0, 8($sp) # 8-byte Folded Reload
@@ -250,6 +254,8 @@ define void @long_chain_i64_in_gpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, i64* %a, i64* %
250254
; MIPS32-NEXT: lw $1, 4($1)
251255
; MIPS32-NEXT: sw $2, 40($sp) # 4-byte Folded Spill
252256
; MIPS32-NEXT: sw $1, 44($sp) # 4-byte Folded Spill
257+
; MIPS32-NEXT: j $BB1_9
258+
; MIPS32-NEXT: nop
253259
; MIPS32-NEXT: $BB1_9: # %b.PHI.1
254260
; MIPS32-NEXT: lw $2, 76($sp) # 4-byte Folded Reload
255261
; MIPS32-NEXT: lw $1, 56($sp) # 4-byte Folded Reload
@@ -299,6 +305,8 @@ define void @long_chain_i64_in_gpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, i64* %a, i64* %
299305
; MIPS32-NEXT: lw $1, 4($1)
300306
; MIPS32-NEXT: sw $2, 8($sp) # 4-byte Folded Spill
301307
; MIPS32-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
308+
; MIPS32-NEXT: j $BB1_16
309+
; MIPS32-NEXT: nop
302310
; MIPS32-NEXT: $BB1_16: # %b.PHI.2
303311
; MIPS32-NEXT: lw $1, 52($sp) # 4-byte Folded Reload
304312
; MIPS32-NEXT: lw $3, 8($sp) # 4-byte Folded Reload
@@ -463,6 +471,8 @@ define void @long_chain_ambiguous_double_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, do
463471
; MIPS32-NEXT: lw $1, 64($sp) # 4-byte Folded Reload
464472
; MIPS32-NEXT: ldc1 $f0, 0($1)
465473
; MIPS32-NEXT: sdc1 $f0, 32($sp) # 8-byte Folded Spill
474+
; MIPS32-NEXT: j $BB2_9
475+
; MIPS32-NEXT: nop
466476
; MIPS32-NEXT: $BB2_9: # %b.PHI.1
467477
; MIPS32-NEXT: lw $1, 52($sp) # 4-byte Folded Reload
468478
; MIPS32-NEXT: ldc1 $f0, 32($sp) # 8-byte Folded Reload
@@ -499,6 +509,8 @@ define void @long_chain_ambiguous_double_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, do
499509
; MIPS32-NEXT: lw $1, 60($sp) # 4-byte Folded Reload
500510
; MIPS32-NEXT: ldc1 $f0, 0($1)
501511
; MIPS32-NEXT: sdc1 $f0, 8($sp) # 8-byte Folded Spill
512+
; MIPS32-NEXT: j $BB2_16
513+
; MIPS32-NEXT: nop
502514
; MIPS32-NEXT: $BB2_16: # %b.PHI.2
503515
; MIPS32-NEXT: lw $1, 48($sp) # 4-byte Folded Reload
504516
; MIPS32-NEXT: ldc1 $f0, 8($sp) # 8-byte Folded Reload
@@ -653,6 +665,8 @@ define void @long_chain_double_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, double* %a,
653665
; MIPS32-NEXT: lw $1, 72($sp) # 4-byte Folded Reload
654666
; MIPS32-NEXT: ldc1 $f0, 0($1)
655667
; MIPS32-NEXT: sdc1 $f0, 40($sp) # 8-byte Folded Spill
668+
; MIPS32-NEXT: j $BB3_9
669+
; MIPS32-NEXT: nop
656670
; MIPS32-NEXT: $BB3_9: # %b.PHI.1
657671
; MIPS32-NEXT: ldc1 $f0, 80($sp) # 8-byte Folded Reload
658672
; MIPS32-NEXT: lw $1, 60($sp) # 4-byte Folded Reload
@@ -691,6 +705,8 @@ define void @long_chain_double_in_fpr(i1 %cnd0, i1 %cnd1, i1 %cnd2, double* %a,
691705
; MIPS32-NEXT: lw $1, 68($sp) # 4-byte Folded Reload
692706
; MIPS32-NEXT: ldc1 $f0, 0($1)
693707
; MIPS32-NEXT: sdc1 $f0, 8($sp) # 8-byte Folded Spill
708+
; MIPS32-NEXT: j $BB3_16
709+
; MIPS32-NEXT: nop
694710
; MIPS32-NEXT: $BB3_16: # %b.PHI.2
695711
; MIPS32-NEXT: lw $1, 56($sp) # 4-byte Folded Reload
696712
; MIPS32-NEXT: ldc1 $f0, 8($sp) # 8-byte Folded Reload

‎llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,8 @@ define i1 @phi_i1(i1 %cnd, i1 %a, i1 %b) {
2222
; MIPS32-NEXT: $BB0_3: # %cond.false
2323
; MIPS32-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
2424
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
25+
; MIPS32-NEXT: j $BB0_4
26+
; MIPS32-NEXT: nop
2527
; MIPS32-NEXT: $BB0_4: # %cond.end
2628
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
2729
; MIPS32-NEXT: addiu $sp, $sp, 16
@@ -62,6 +64,8 @@ define i8 @phi_i8(i1 %cnd, i8 %a, i8 %b) {
6264
; MIPS32-NEXT: $BB1_3: # %cond.false
6365
; MIPS32-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
6466
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
67+
; MIPS32-NEXT: j $BB1_4
68+
; MIPS32-NEXT: nop
6569
; MIPS32-NEXT: $BB1_4: # %cond.end
6670
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
6771
; MIPS32-NEXT: addiu $sp, $sp, 16
@@ -102,6 +106,8 @@ define i16 @phi_i16(i1 %cnd, i16 %a, i16 %b) {
102106
; MIPS32-NEXT: $BB2_3: # %cond.false
103107
; MIPS32-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
104108
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
109+
; MIPS32-NEXT: j $BB2_4
110+
; MIPS32-NEXT: nop
105111
; MIPS32-NEXT: $BB2_4: # %cond.end
106112
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
107113
; MIPS32-NEXT: addiu $sp, $sp, 16
@@ -142,6 +148,8 @@ define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {
142148
; MIPS32-NEXT: $BB3_3: # %cond.false
143149
; MIPS32-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
144150
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
151+
; MIPS32-NEXT: j $BB3_4
152+
; MIPS32-NEXT: nop
145153
; MIPS32-NEXT: $BB3_4: # %cond.end
146154
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
147155
; MIPS32-NEXT: addiu $sp, $sp, 16
@@ -192,6 +200,8 @@ define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {
192200
; MIPS32-NEXT: lw $2, 16($sp) # 4-byte Folded Reload
193201
; MIPS32-NEXT: sw $2, 0($sp) # 4-byte Folded Spill
194202
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
203+
; MIPS32-NEXT: j $BB4_4
204+
; MIPS32-NEXT: nop
195205
; MIPS32-NEXT: $BB4_4: # %cond.end
196206
; MIPS32-NEXT: lw $2, 0($sp) # 4-byte Folded Reload
197207
; MIPS32-NEXT: lw $3, 4($sp) # 4-byte Folded Reload
@@ -236,6 +246,8 @@ define void @phi_ambiguous_i64_in_fpr(i1 %cnd, i64* %i64_ptr_a, i64* %i64_ptr_b,
236246
; MIPS32-NEXT: $BB5_3: # %cond.false
237247
; MIPS32-NEXT: ldc1 $f0, 24($sp) # 8-byte Folded Reload
238248
; MIPS32-NEXT: sdc1 $f0, 0($sp) # 8-byte Folded Spill
249+
; MIPS32-NEXT: j $BB5_4
250+
; MIPS32-NEXT: nop
239251
; MIPS32-NEXT: $BB5_4: # %cond.end
240252
; MIPS32-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
241253
; MIPS32-NEXT: ldc1 $f0, 0($sp) # 8-byte Folded Reload
@@ -281,6 +293,8 @@ define float @phi_float(i1 %cnd, float %a, float %b) {
281293
; MIPS32-NEXT: $BB6_3: # %cond.false
282294
; MIPS32-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
283295
; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
296+
; MIPS32-NEXT: j $BB6_4
297+
; MIPS32-NEXT: nop
284298
; MIPS32-NEXT: $BB6_4: # %cond.end
285299
; MIPS32-NEXT: lw $1, 4($sp) # 4-byte Folded Reload
286300
; MIPS32-NEXT: mtc1 $1, $f0
@@ -325,6 +339,8 @@ define void @phi_ambiguous_float_in_gpr(i1 %cnd, float* %f32_ptr_a, float* %f32_
325339
; MIPS32-NEXT: $BB7_3: # %cond.false
326340
; MIPS32-NEXT: lw $1, 12($sp) # 4-byte Folded Reload
327341
; MIPS32-NEXT: sw $1, 0($sp) # 4-byte Folded Spill
342+
; MIPS32-NEXT: j $BB7_4
343+
; MIPS32-NEXT: nop
328344
; MIPS32-NEXT: $BB7_4: # %cond.end
329345
; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
330346
; MIPS32-NEXT: lw $1, 0($sp) # 4-byte Folded Reload
@@ -372,6 +388,8 @@ define double @phi_double(double %a, double %b, i1 %cnd) {
372388
; MIPS32-NEXT: $BB8_3: # %cond.false
373389
; MIPS32-NEXT: ldc1 $f0, 16($sp) # 8-byte Folded Reload
374390
; MIPS32-NEXT: sdc1 $f0, 0($sp) # 8-byte Folded Spill
391+
; MIPS32-NEXT: j $BB8_4
392+
; MIPS32-NEXT: nop
375393
; MIPS32-NEXT: $BB8_4: # %cond.end
376394
; MIPS32-NEXT: ldc1 $f0, 0($sp) # 8-byte Folded Reload
377395
; MIPS32-NEXT: addiu $sp, $sp, 24

‎llvm/test/DebugInfo/AArch64/fallthrough-branch.ll

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
; RUN: llc -O0 -stop-before=livedebugvalues < %s | FileCheck %s
2+
3+
; ModuleID = '/tmp/t.o'
4+
source_filename = "/tmp/t.o"
5+
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
6+
target triple = "arm64-apple-macosx11.0.0"
7+
8+
define swiftcc void @"$s1t1f1bySb_tF"(i1 %0) !dbg !35 {
9+
%2 = alloca i1, align 8
10+
%3 = bitcast i1* %2 to i8*
11+
call void @llvm.memset.p0i8.i64(i8* align 8 %3, i8 0, i64 1, i1 false)
12+
store i1 %0, i1* %2, align 8, !dbg !37
13+
; CHECK: B %bb.1, debug-location !{{[0-9]+}}
14+
br i1 %0, label %4, label %5, !dbg !38
15+
16+
4: ; preds = %1
17+
; Check that at -O0 the branches and their debug locations are not eliminated.
18+
; CHECK: B %bb.3, debug-location !{{[0-9]+}}
19+
br label %6, !dbg !39
20+
21+
5: ; preds = %1
22+
; CHECK: B %bb.3, debug-location !{{[0-9]+}}
23+
br label %6, !dbg !40
24+
25+
6: ; preds = %4, %5
26+
ret void, !dbg !39
27+
}
28+
29+
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
30+
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #1
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attributes #1 = { argmemonly nofree nosync nounwind willreturn writeonly }
32+
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!llvm.module.flags = !{!6, !7, !14}
34+
!llvm.dbg.cu = !{!15, !27}
35+
36+
!6 = !{i32 7, !"Dwarf Version", i32 4}
37+
!7 = !{i32 2, !"Debug Info Version", i32 3}
38+
!14 = !{i32 1, !"Swift Version", i32 7}
39+
!15 = distinct !DICompileUnit(language: DW_LANG_Swift, file: !16, producer: "Swift", emissionKind: LineTablesOnly)
40+
!16 = !DIFile(filename: "t.swift", directory: "/tmp")
41+
!17 = !{}
42+
!27 = distinct !DICompileUnit(language: DW_LANG_ObjC, file: !16, emissionKind: LineTablesOnly)
43+
!35 = distinct !DISubprogram(name: "f", linkageName: "$s1t1f1bySb_tF", scope: !15, file: !16, line: 1, type: !36, scopeLine: 1, spFlags: DISPFlagDefinition, unit: !15, retainedNodes: !17)
44+
!36 = !DISubroutineType(types: null)
45+
!37 = !DILocation(line: 0, scope: !35)
46+
!38 = !DILocation(line: 2, column: 9, scope: !35)
47+
!39 = !DILocation(line: 3, column: 1, scope: !35)
48+
!40 = !DILocation(line: 2, column: 18, scope: !35)

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