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[NFC][ARM[ParallelDSP] Rename/remove/change types
Remove forward declaration, fold a couple of typedefs and change one to be more useful. llvm-svn: 367665
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llvm/lib/Target/ARM/ARMParallelDSP.cpp

Lines changed: 8 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -43,25 +43,22 @@ DisableParallelDSP("disable-arm-parallel-dsp", cl::Hidden, cl::init(false),
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cl::desc("Disable the ARM Parallel DSP pass"));
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namespace {
46-
struct OpChain;
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struct MulCandidate;
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class Reduction;
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50-
using MulCandList = SmallVector<std::unique_ptr<MulCandidate>, 8>;
51-
using ReductionList = SmallVector<Reduction, 8>;
52-
using MemInstList = SmallVector<LoadInst*, 8>;
53-
using PMACPair = std::pair<MulCandidate*,MulCandidate*>;
54-
using PMACPairList = SmallVector<PMACPair, 8>;
49+
using MulCandList = SmallVector<std::unique_ptr<MulCandidate>, 8>;
50+
using MemInstList = SmallVectorImpl<LoadInst*>;
51+
using MulPairList = SmallVector<std::pair<MulCandidate*, MulCandidate*>, 8>;
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// 'MulCandidate' holds the multiplication instructions that are candidates
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// for parallel execution.
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struct MulCandidate {
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Instruction *Root;
60-
MemInstList VecLd; // Container for loads to widen.
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Value* LHS;
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Value* RHS;
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bool Exchange = false;
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bool ReadOnly = true;
61+
SmallVector<LoadInst*, 2> VecLd; // Container for loads to widen.
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MulCandidate(Instruction *I, Value *lhs, Value *rhs) :
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Root(I), LHS(lhs), RHS(rhs) { }
@@ -81,7 +78,7 @@ namespace {
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Instruction *Root = nullptr;
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Value *Acc = nullptr;
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MulCandList Muls;
84-
PMACPairList MulPairs;
81+
MulPairList MulPairs;
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SmallPtrSet<Instruction*, 4> Adds;
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public:
@@ -135,7 +132,7 @@ namespace {
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/// Return the MulCandidate, rooted at mul instructions, that have been
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/// paired for parallel execution.
138-
PMACPairList &getMulPairs() { return MulPairs; }
135+
MulPairList &getMulPairs() { return MulPairs; }
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/// To finalise, replace the uses of the root with the intrinsic call.
141138
void UpdateRoot(Instruction *SMLAD) {
@@ -175,8 +172,7 @@ namespace {
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bool RecordMemoryOps(BasicBlock *BB);
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void InsertParallelMACs(Reduction &Reduction);
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bool AreSequentialLoads(LoadInst *Ld0, LoadInst *Ld1, MemInstList &VecMem);
178-
LoadInst* CreateWideLoad(SmallVectorImpl<LoadInst*> &Loads,
179-
IntegerType *LoadTy);
175+
LoadInst* CreateWideLoad(MemInstList &Loads, IntegerType *LoadTy);
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bool CreateParallelPairs(Reduction &R);
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/// Try to match and generate: SMLAD, SMLADX - Signed Multiply Accumulate
@@ -349,7 +345,6 @@ bool ARMParallelDSP::RecordMemoryOps(BasicBlock *BB) {
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InstSet &WritesBefore = RAWDeps[Dominated];
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for (auto Before : WritesBefore) {
352-
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// We can't move the second load backward, past a write, to merge
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// with the first load.
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if (DT->dominates(Dominator, Before))
@@ -648,7 +643,7 @@ void ARMParallelDSP::InsertParallelMACs(Reduction &R) {
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R.UpdateRoot(cast<Instruction>(Acc));
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}
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651-
LoadInst* ARMParallelDSP::CreateWideLoad(SmallVectorImpl<LoadInst*> &Loads,
646+
LoadInst* ARMParallelDSP::CreateWideLoad(MemInstList &Loads,
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IntegerType *LoadTy) {
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assert(Loads.size() == 2 && "currently only support widening two loads");
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