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Hexagon: Set isPredicatedNew flag on predicate new instructions.
llvm-svn: 179388
1 parent bea8327 commit ce1be11

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2 files changed

+21
-22
lines changed

2 files changed

+21
-22
lines changed

‎llvm/lib/Target/Hexagon/HexagonInstrInfo.td

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -97,8 +97,7 @@ let isExtendable = 1, opExtendable = 2, isExtentSigned = 1, opExtentBits = 8 in
9797
//===----------------------------------------------------------------------===//
9898
multiclass ALU32_Pbase<string mnemonic, bit isNot,
9999
bit isPredNew> {
100-
101-
let PNewValue = !if(isPredNew, "new", "") in
100+
let isPredicatedNew = isPredNew in
102101
def NAME : ALU32_rr<(outs IntRegs:$dst),
103102
(ins PredRegs:$src1, IntRegs:$src2, IntRegs: $src3),
104103
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew,".new) $dst = ",
@@ -144,7 +143,7 @@ defm SUB_rr : ALU32_base<"sub", "SUB", sub>, ImmRegRel, PredNewRel;
144143
// ALU32/ALU (ADD with register-immediate form)
145144
//===----------------------------------------------------------------------===//
146145
multiclass ALU32ri_Pbase<string mnemonic, bit isNot, bit isPredNew> {
147-
let PNewValue = !if(isPredNew, "new", "") in
146+
let isPredicatedNew = isPredNew in
148147
def NAME : ALU32_ri<(outs IntRegs:$dst),
149148
(ins PredRegs:$src1, IntRegs:$src2, s8Ext: $src3),
150149
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew,".new) $dst = ",
@@ -228,7 +227,7 @@ multiclass TFR_Pred<bit PredNot> {
228227
!if(PredNot, "if (!$src1", "if ($src1")#") $dst = $src2",
229228
[]>;
230229
// Predicate new
231-
let PNewValue = "new" in
230+
let isPredicatedNew = 1 in
232231
def _cdn#NAME : ALU32_rr<(outs IntRegs:$dst),
233232
(ins PredRegs:$src1, IntRegs:$src2),
234233
!if(PredNot, "if (!$src1", "if ($src1")#".new) $dst = $src2",
@@ -277,7 +276,7 @@ multiclass TFR64_Pred<bit PredNot> {
277276
let isPredicatedFalse = PredNot in {
278277
def _c#NAME : T_TFR64_Pred<PredNot, 0>;
279278

280-
let PNewValue = "new" in
279+
let isPredicatedNew = 1 in
281280
def _cdn#NAME : T_TFR64_Pred<PredNot, 1>; // Predicate new
282281
}
283282
}
@@ -316,7 +315,7 @@ multiclass TFRI_Pred<bit PredNot> {
316315
[]>;
317316

318317
// Predicate new
319-
let PNewValue = "new" in
318+
let isPredicatedNew = 1 in
320319
def _cdn#NAME : ALU32_rr<(outs IntRegs:$dst),
321320
(ins PredRegs:$src1, s12Ext:$src2),
322321
!if(PredNot, "if (!$src1", "if ($src1")#".new) $dst = #$src2",
@@ -892,7 +891,7 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1, isPredicated = 1,
892891
// Load -- MEMri operand
893892
multiclass LD_MEMri_Pbase<string mnemonic, RegisterClass RC,
894893
bit isNot, bit isPredNew> {
895-
let PNewValue = !if(isPredNew, "new", "") in
894+
let isPredicatedNew = isPredNew in
896895
def NAME : LDInst2<(outs RC:$dst),
897896
(ins PredRegs:$src1, MEMri:$addr),
898897
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -958,7 +957,7 @@ def : Pat < (i64 (load ADDRriS11_3:$addr)),
958957
// Load - Base with Immediate offset addressing mode
959958
multiclass LD_Idxd_Pbase<string mnemonic, RegisterClass RC, Operand predImmOp,
960959
bit isNot, bit isPredNew> {
961-
let PNewValue = !if(isPredNew, "new", "") in
960+
let isPredicatedNew = isPredNew in
962961
def NAME : LDInst2<(outs RC:$dst),
963962
(ins PredRegs:$src1, IntRegs:$src2, predImmOp:$src3),
964963
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -1038,7 +1037,7 @@ def : Pat < (i64 (load (add IntRegs:$src1, s11_3ExtPred:$offset))),
10381037

10391038
multiclass LD_PostInc_Pbase<string mnemonic, RegisterClass RC, Operand ImmOp,
10401039
bit isNot, bit isPredNew> {
1041-
let PNewValue = !if(isPredNew, "new", "") in
1040+
let isPredicatedNew = isPredNew in
10421041
def NAME : LDInst2PI<(outs RC:$dst, IntRegs:$dst2),
10431042
(ins PredRegs:$src1, IntRegs:$src2, ImmOp:$offset),
10441043
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -1366,7 +1365,7 @@ def SUBri_acc : MInst_acc<(outs IntRegs: $dst), (ins IntRegs:$src1,
13661365

13671366
multiclass ST_PostInc_Pbase<string mnemonic, RegisterClass RC, Operand ImmOp,
13681367
bit isNot, bit isPredNew> {
1369-
let PNewValue = !if(isPredNew, "new", "") in
1368+
let isPredicatedNew = isPredNew in
13701369
def NAME : STInst2PI<(outs IntRegs:$dst),
13711370
(ins PredRegs:$src1, IntRegs:$src2, ImmOp:$offset, RC:$src3),
13721371
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -1431,7 +1430,7 @@ def : Pat<(post_store (i64 DoubleRegs:$src1), IntRegs:$src2,
14311430
//===----------------------------------------------------------------------===//
14321431
multiclass ST_MEMri_Pbase<string mnemonic, RegisterClass RC, bit isNot,
14331432
bit isPredNew> {
1434-
let PNewValue = !if(isPredNew, "new", "") in
1433+
let isPredicatedNew = isPredNew in
14351434
def NAME : STInst2<(outs),
14361435
(ins PredRegs:$src1, MEMri:$addr, RC: $src2),
14371436
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -1497,7 +1496,7 @@ def : Pat<(store (i64 DoubleRegs:$src1), ADDRriS11_3:$addr),
14971496
//===----------------------------------------------------------------------===//
14981497
multiclass ST_Idxd_Pbase<string mnemonic, RegisterClass RC, Operand predImmOp,
14991498
bit isNot, bit isPredNew> {
1500-
let PNewValue = !if(isPredNew, "new", "") in
1499+
let isPredicatedNew = isPredNew in
15011500
def NAME : STInst2<(outs),
15021501
(ins PredRegs:$src1, IntRegs:$src2, predImmOp:$src3, RC: $src4),
15031502
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",

‎llvm/lib/Target/Hexagon/HexagonInstrInfoV4.td

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -307,7 +307,7 @@ def LDriw_abs_set_V4 : LDInst2<(outs IntRegs:$dst1, IntRegs:$dst2),
307307
// addressing mode
308308
multiclass ld_idxd_shl_pbase<string mnemonic, RegisterClass RC, bit isNot,
309309
bit isPredNew> {
310-
let PNewValue = !if(isPredNew, "new", "") in
310+
let isPredicatedNew = isPredNew in
311311
def NAME : LDInst2<(outs RC:$dst),
312312
(ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$offset),
313313
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -598,7 +598,7 @@ def STriw_abs_set_V4 : STInst2<(outs IntRegs:$dst1),
598598
// mode
599599
multiclass ST_Idxd_shl_Pbase<string mnemonic, RegisterClass RC, bit isNot,
600600
bit isPredNew> {
601-
let PNewValue = !if(isPredNew, "new", "") in
601+
let isPredicatedNew = isPredNew in
602602
def NAME : STInst2<(outs),
603603
(ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$src4,
604604
RC:$src5),
@@ -637,7 +637,7 @@ multiclass ST_Idxd_shl<string mnemonic, string CextOp, RegisterClass RC> {
637637
// addressing mode.
638638
multiclass ST_Idxd_shl_Pbase_nv<string mnemonic, RegisterClass RC, bit isNot,
639639
bit isPredNew> {
640-
let PNewValue = !if(isPredNew, "new", "") in
640+
let isPredicatedNew = isPredNew in
641641
def NAME#_nv_V4 : NVInst_V4<(outs),
642642
(ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$src4,
643643
RC:$src5),
@@ -741,7 +741,7 @@ def STrid_shl_V4 : STInst<(outs),
741741
//===----------------------------------------------------------------------===//
742742
multiclass ST_Imm_Pbase<string mnemonic, Operand OffsetOp, bit isNot,
743743
bit isPredNew> {
744-
let PNewValue = !if(isPredNew, "new", "") in
744+
let isPredicatedNew = isPredNew in
745745
def NAME : STInst2<(outs),
746746
(ins PredRegs:$src1, IntRegs:$src2, OffsetOp:$src3, s6Ext:$src4),
747747
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -907,7 +907,7 @@ def STriw_shl_V4 : STInst<(outs),
907907
//
908908
multiclass ST_Idxd_Pbase_nv<string mnemonic, RegisterClass RC,
909909
Operand predImmOp, bit isNot, bit isPredNew> {
910-
let PNewValue = !if(isPredNew, "new", "") in
910+
let isPredicatedNew = isPredNew in
911911
def NAME#_nv_V4 : NVInst_V4<(outs),
912912
(ins PredRegs:$src1, IntRegs:$src2, predImmOp:$src3, RC: $src4),
913913
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -960,7 +960,7 @@ let addrMode = BaseImmOffset, validSubTargets = HasV4SubT in {
960960
// and MEMri operand.
961961
multiclass ST_MEMri_Pbase_nv<string mnemonic, RegisterClass RC, bit isNot,
962962
bit isPredNew> {
963-
let PNewValue = !if(isPredNew, "new", "") in
963+
let isPredicatedNew = isPredNew in
964964
def NAME#_nv_V4 : NVInst_V4<(outs),
965965
(ins PredRegs:$src1, MEMri:$addr, RC: $src2),
966966
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -1022,7 +1022,7 @@ def STrib_shl_nv_V4 : NVInst_V4<(outs),
10221022

10231023
multiclass ST_PostInc_Pbase_nv<string mnemonic, RegisterClass RC, Operand ImmOp,
10241024
bit isNot, bit isPredNew> {
1025-
let PNewValue = !if(isPredNew, "new", "") in
1025+
let isPredicatedNew = isPredNew in
10261026
def NAME#_nv_V4 : NVInstPI_V4<(outs IntRegs:$dst),
10271027
(ins PredRegs:$src1, IntRegs:$src2, ImmOp:$offset, RC:$src3),
10281028
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -2769,7 +2769,7 @@ let isReturn = 1, isTerminator = 1,
27692769

27702770
multiclass ST_Abs_Predbase<string mnemonic, RegisterClass RC, bit isNot,
27712771
bit isPredNew> {
2772-
let PNewValue = !if(isPredNew, "new", "") in
2772+
let isPredicatedNew = isPredNew in
27732773
def NAME#_V4 : STInst2<(outs),
27742774
(ins PredRegs:$src1, globaladdressExt:$absaddr, RC: $src2),
27752775
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -2805,7 +2805,7 @@ multiclass ST_Abs<string mnemonic, string CextOp, RegisterClass RC> {
28052805

28062806
multiclass ST_Abs_Predbase_nv<string mnemonic, RegisterClass RC, bit isNot,
28072807
bit isPredNew> {
2808-
let PNewValue = !if(isPredNew, "new", "") in
2808+
let isPredicatedNew = isPredNew in
28092809
def NAME#_nv_V4 : NVInst_V4<(outs),
28102810
(ins PredRegs:$src1, globaladdressExt:$absaddr, RC: $src2),
28112811
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -2974,7 +2974,7 @@ def : Pat<(store (i32 IntRegs:$src1), (HexagonCONST32_GP tglobaladdr:$global)),
29742974
//===----------------------------------------------------------------------===//
29752975
multiclass LD_Abs_Predbase<string mnemonic, RegisterClass RC, bit isNot,
29762976
bit isPredNew> {
2977-
let PNewValue = !if(isPredNew, "new", "") in
2977+
let isPredicatedNew = isPredNew in
29782978
def NAME : LDInst2<(outs RC:$dst),
29792979
(ins PredRegs:$src1, globaladdressExt:$absaddr),
29802980
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",

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