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[NFC][AMDGPU] Improve cost model tests coverage.
1 parent 9c8d8fc commit cf362ff

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17 files changed

+2268
-271
lines changed

17 files changed

+2268
-271
lines changed

llvm/test/Analysis/CostModel/AMDGPU/add-sub.ll

Lines changed: 92 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,10 @@ define amdgpu_kernel void @add_i32() #0 {
1212
; ALL-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = add <3 x i32> undef, undef
1313
; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = add <4 x i32> undef, undef
1414
; ALL-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v5i32 = add <5 x i32> undef, undef
15+
; ALL-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v6i32 = add <6 x i32> undef, undef
16+
; ALL-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v7i32 = add <7 x i32> undef, undef
17+
; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i32 = add <8 x i32> undef, undef
18+
; ALL-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v32i32 = add <32 x i32> undef, undef
1519
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
1620
;
1721
; ALL-SIZE-LABEL: 'add_i32'
@@ -20,13 +24,21 @@ define amdgpu_kernel void @add_i32() #0 {
2024
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v3i32 = add <3 x i32> undef, undef
2125
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i32 = add <4 x i32> undef, undef
2226
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v5i32 = add <5 x i32> undef, undef
27+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v6i32 = add <6 x i32> undef, undef
28+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v7i32 = add <7 x i32> undef, undef
29+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v8i32 = add <8 x i32> undef, undef
30+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v32i32 = add <32 x i32> undef, undef
2331
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
2432
;
2533
%i32 = add i32 undef, undef
2634
%v2i32 = add <2 x i32> undef, undef
2735
%v3i32 = add <3 x i32> undef, undef
2836
%v4i32 = add <4 x i32> undef, undef
2937
%v5i32 = add <5 x i32> undef, undef
38+
%v6i32 = add <6 x i32> undef, undef
39+
%v7i32 = add <7 x i32> undef, undef
40+
%v8i32 = add <8 x i32> undef, undef
41+
%v32i32 = add <32 x i32> undef, undef
3042
ret void
3143
}
3244

@@ -36,6 +48,10 @@ define amdgpu_kernel void @add_i64() #0 {
3648
; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = add <2 x i64> undef, undef
3749
; ALL-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = add <3 x i64> undef, undef
3850
; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = add <4 x i64> undef, undef
51+
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v5i64 = add <5 x i64> undef, undef
52+
; ALL-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v6i64 = add <6 x i64> undef, undef
53+
; ALL-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v7i64 = add <7 x i64> undef, undef
54+
; ALL-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v8i64 = add <8 x i64> undef, undef
3955
; ALL-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v16i64 = add <16 x i64> undef, undef
4056
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
4157
;
@@ -44,13 +60,21 @@ define amdgpu_kernel void @add_i64() #0 {
4460
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v2i64 = add <2 x i64> undef, undef
4561
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %v3i64 = add <3 x i64> undef, undef
4662
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v4i64 = add <4 x i64> undef, undef
63+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %v5i64 = add <5 x i64> undef, undef
64+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %v6i64 = add <6 x i64> undef, undef
65+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %v7i64 = add <7 x i64> undef, undef
66+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %v8i64 = add <8 x i64> undef, undef
4767
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %v16i64 = add <16 x i64> undef, undef
4868
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
4969
;
5070
%i64 = add i64 undef, undef
5171
%v2i64 = add <2 x i64> undef, undef
5272
%v3i64 = add <3 x i64> undef, undef
5373
%v4i64 = add <4 x i64> undef, undef
74+
%v5i64 = add <5 x i64> undef, undef
75+
%v6i64 = add <6 x i64> undef, undef
76+
%v7i64 = add <7 x i64> undef, undef
77+
%v8i64 = add <8 x i64> undef, undef
5478
%v16i64 = add <16 x i64> undef, undef
5579
ret void
5680
}
@@ -59,61 +83,124 @@ define amdgpu_kernel void @add_i16() #0 {
5983
; FAST16-LABEL: 'add_i16'
6084
; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef
6185
; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = add <2 x i16> undef, undef
86+
; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = add <3 x i16> undef, undef
87+
; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = add <4 x i16> undef, undef
88+
; FAST16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v5i16 = add <5 x i16> undef, undef
89+
; FAST16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v6i16 = add <6 x i16> undef, undef
6290
; FAST16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
6391
;
6492
; SLOW16-LABEL: 'add_i16'
6593
; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef
6694
; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = add <2 x i16> undef, undef
95+
; SLOW16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = add <3 x i16> undef, undef
96+
; SLOW16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = add <4 x i16> undef, undef
97+
; SLOW16-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v5i16 = add <5 x i16> undef, undef
98+
; SLOW16-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v6i16 = add <6 x i16> undef, undef
6799
; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
68100
;
69101
; FAST16-SIZE-LABEL: 'add_i16'
70102
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef
71103
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = add <2 x i16> undef, undef
104+
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = add <3 x i16> undef, undef
105+
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = add <4 x i16> undef, undef
106+
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v5i16 = add <5 x i16> undef, undef
107+
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v6i16 = add <6 x i16> undef, undef
72108
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
73109
;
74110
; SLOW16-SIZE-LABEL: 'add_i16'
75111
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = add i16 undef, undef
76112
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = add <2 x i16> undef, undef
113+
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = add <3 x i16> undef, undef
114+
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = add <4 x i16> undef, undef
115+
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v5i16 = add <5 x i16> undef, undef
116+
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v6i16 = add <6 x i16> undef, undef
77117
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
78118
;
79119
%i16 = add i16 undef, undef
80120
%v2i16 = add <2 x i16> undef, undef
121+
%v3i16 = add <3 x i16> undef, undef
122+
%v4i16 = add <4 x i16> undef, undef
123+
%v5i16 = add <5 x i16> undef, undef
124+
%v6i16 = add <6 x i16> undef, undef
125+
ret void
126+
}
127+
128+
define amdgpu_kernel void @add_i8() #0 {
129+
; ALL-LABEL: 'add_i8'
130+
; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = add i8 undef, undef
131+
; ALL-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = add <2 x i8> undef, undef
132+
; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = add <3 x i8> undef, undef
133+
; ALL-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = add <4 x i8> undef, undef
134+
; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v5i8 = add <5 x i8> undef, undef
135+
; ALL-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v6i8 = add <6 x i8> undef, undef
136+
; ALL-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
137+
;
138+
; ALL-SIZE-LABEL: 'add_i8'
139+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = add i8 undef, undef
140+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i8 = add <2 x i8> undef, undef
141+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i8 = add <3 x i8> undef, undef
142+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i8 = add <4 x i8> undef, undef
143+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v5i8 = add <5 x i8> undef, undef
144+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %v6i8 = add <6 x i8> undef, undef
145+
; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
146+
;
147+
%i8 = add i8 undef, undef
148+
%v2i8 = add <2 x i8> undef, undef
149+
%v3i8 = add <3 x i8> undef, undef
150+
%v4i8 = add <4 x i8> undef, undef
151+
%v5i8 = add <5 x i8> undef, undef
152+
%v6i8 = add <6 x i8> undef, undef
81153
ret void
82154
}
83155

84156
define amdgpu_kernel void @sub() #0 {
85157
; FAST16-LABEL: 'sub'
158+
; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = sub i16 undef, undef
159+
; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
86160
; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef
87161
; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef
88-
; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
89162
; FAST16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = sub <2 x i16> undef, undef
163+
; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = sub <3 x i16> undef, undef
164+
; FAST16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = sub <4 x i16> undef, undef
90165
; FAST16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
91166
;
92167
; SLOW16-LABEL: 'sub'
168+
; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = sub i16 undef, undef
169+
; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
93170
; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef
94171
; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef
95-
; SLOW16-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
96172
; SLOW16-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = sub <2 x i16> undef, undef
173+
; SLOW16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = sub <3 x i16> undef, undef
174+
; SLOW16-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = sub <4 x i16> undef, undef
97175
; SLOW16-NEXT: Cost Model: Found an estimated cost of 10 for instruction: ret void
98176
;
99177
; FAST16-SIZE-LABEL: 'sub'
178+
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = sub i16 undef, undef
179+
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
100180
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef
101181
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef
102-
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
103182
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i16 = sub <2 x i16> undef, undef
183+
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v3i16 = sub <3 x i16> undef, undef
184+
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v4i16 = sub <4 x i16> undef, undef
104185
; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
105186
;
106187
; SLOW16-SIZE-LABEL: 'sub'
188+
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i8 = sub i16 undef, undef
189+
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
107190
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i32 = sub i32 undef, undef
108191
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %i64 = sub i64 undef, undef
109-
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i16 = sub i16 undef, undef
110192
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i16 = sub <2 x i16> undef, undef
193+
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v3i16 = sub <3 x i16> undef, undef
194+
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %v4i16 = sub <4 x i16> undef, undef
111195
; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
112196
;
197+
%i8 = sub i16 undef, undef
198+
%i16 = sub i16 undef, undef
113199
%i32 = sub i32 undef, undef
114200
%i64 = sub i64 undef, undef
115-
%i16 = sub i16 undef, undef
116201
%v2i16 = sub <2 x i16> undef, undef
202+
%v3i16 = sub <3 x i16> undef, undef
203+
%v4i16 = sub <4 x i16> undef, undef
117204
ret void
118205
}
119206

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