|
| 1 | +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| 2 | +# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX6 %s |
| 3 | +# RUN: llc -march=amdgcn -mcpu=gfx906 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9-DL %s |
| 4 | +# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX10 %s |
| 5 | + |
| 6 | +--- |
| 7 | + |
| 8 | +name: fma_f32 |
| 9 | +legalized: true |
| 10 | +regBankSelected: true |
| 11 | + |
| 12 | +body: | |
| 13 | + bb.0: |
| 14 | + liveins: $vgpr0, $vgpr1, $vgpr2 |
| 15 | +
|
| 16 | + ; GFX6-LABEL: name: fma_f32 |
| 17 | + ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 18 | + ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 19 | + ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 20 | + ; GFX6: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 21 | + ; GFX6: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 22 | + ; GFX9-DL-LABEL: name: fma_f32 |
| 23 | + ; GFX9-DL: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 24 | + ; GFX9-DL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 25 | + ; GFX9-DL: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 26 | + ; GFX9-DL: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 27 | + ; GFX9-DL: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 28 | + ; GFX10-LABEL: name: fma_f32 |
| 29 | + ; GFX10: $vcc_hi = IMPLICIT_DEF |
| 30 | + ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 31 | + ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 32 | + ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 33 | + ; GFX10: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 34 | + ; GFX10: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 35 | + %0:vgpr(s32) = COPY $vgpr0 |
| 36 | + %1:vgpr(s32) = COPY $vgpr1 |
| 37 | + %2:vgpr(s32) = COPY $vgpr2 |
| 38 | + %3:vgpr(s32) = G_FMA %0, %1, %2 |
| 39 | + S_ENDPGM 0, implicit %3 |
| 40 | +
|
| 41 | +... |
| 42 | + |
| 43 | +--- |
| 44 | + |
| 45 | +name: fma_f32_fneg_src0 |
| 46 | +legalized: true |
| 47 | +regBankSelected: true |
| 48 | + |
| 49 | +body: | |
| 50 | + bb.0: |
| 51 | + liveins: $vgpr0, $vgpr1, $vgpr2 |
| 52 | +
|
| 53 | + ; GFX6-LABEL: name: fma_f32_fneg_src0 |
| 54 | + ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 55 | + ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 56 | + ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 57 | + ; GFX6: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 1, [[COPY]], 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 58 | + ; GFX6: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 59 | + ; GFX9-DL-LABEL: name: fma_f32_fneg_src0 |
| 60 | + ; GFX9-DL: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 61 | + ; GFX9-DL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 62 | + ; GFX9-DL: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 63 | + ; GFX9-DL: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 1, [[COPY]], 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 64 | + ; GFX9-DL: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 65 | + ; GFX10-LABEL: name: fma_f32_fneg_src0 |
| 66 | + ; GFX10: $vcc_hi = IMPLICIT_DEF |
| 67 | + ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 68 | + ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 69 | + ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 70 | + ; GFX10: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 1, [[COPY]], 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 71 | + ; GFX10: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 72 | + %0:vgpr(s32) = COPY $vgpr0 |
| 73 | + %1:vgpr(s32) = COPY $vgpr1 |
| 74 | + %2:vgpr(s32) = COPY $vgpr2 |
| 75 | + %3:vgpr(s32) = G_FNEG %0 |
| 76 | + %4:vgpr(s32) = G_FMA %3, %1, %2 |
| 77 | + S_ENDPGM 0, implicit %4 |
| 78 | +
|
| 79 | +... |
| 80 | + |
| 81 | +--- |
| 82 | + |
| 83 | +name: fma_f32_fneg_src1 |
| 84 | +legalized: true |
| 85 | +regBankSelected: true |
| 86 | + |
| 87 | +body: | |
| 88 | + bb.0: |
| 89 | + liveins: $vgpr0, $vgpr1, $vgpr2 |
| 90 | +
|
| 91 | + ; GFX6-LABEL: name: fma_f32_fneg_src1 |
| 92 | + ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 93 | + ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 94 | + ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 95 | + ; GFX6: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 1, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 96 | + ; GFX6: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 97 | + ; GFX9-DL-LABEL: name: fma_f32_fneg_src1 |
| 98 | + ; GFX9-DL: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 99 | + ; GFX9-DL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 100 | + ; GFX9-DL: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 101 | + ; GFX9-DL: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 1, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 102 | + ; GFX9-DL: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 103 | + ; GFX10-LABEL: name: fma_f32_fneg_src1 |
| 104 | + ; GFX10: $vcc_hi = IMPLICIT_DEF |
| 105 | + ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 106 | + ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 107 | + ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 108 | + ; GFX10: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 1, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $exec |
| 109 | + ; GFX10: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 110 | + %0:vgpr(s32) = COPY $vgpr0 |
| 111 | + %1:vgpr(s32) = COPY $vgpr1 |
| 112 | + %2:vgpr(s32) = COPY $vgpr2 |
| 113 | + %3:vgpr(s32) = G_FNEG %1 |
| 114 | + %4:vgpr(s32) = G_FMA %0, %3, %2 |
| 115 | + S_ENDPGM 0, implicit %4 |
| 116 | +
|
| 117 | +... |
| 118 | + |
| 119 | +--- |
| 120 | + |
| 121 | +name: fma_f32_fneg_src2 |
| 122 | +legalized: true |
| 123 | +regBankSelected: true |
| 124 | + |
| 125 | +body: | |
| 126 | + bb.0: |
| 127 | + liveins: $vgpr0, $vgpr1, $vgpr2 |
| 128 | +
|
| 129 | + ; GFX6-LABEL: name: fma_f32_fneg_src2 |
| 130 | + ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 131 | + ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 132 | + ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 133 | + ; GFX6: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 1, [[COPY2]], 0, 0, implicit $exec |
| 134 | + ; GFX6: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 135 | + ; GFX9-DL-LABEL: name: fma_f32_fneg_src2 |
| 136 | + ; GFX9-DL: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 137 | + ; GFX9-DL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 138 | + ; GFX9-DL: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 139 | + ; GFX9-DL: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 1, [[COPY2]], 0, 0, implicit $exec |
| 140 | + ; GFX9-DL: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 141 | + ; GFX10-LABEL: name: fma_f32_fneg_src2 |
| 142 | + ; GFX10: $vcc_hi = IMPLICIT_DEF |
| 143 | + ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 144 | + ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 145 | + ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 146 | + ; GFX10: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 1, [[COPY2]], 0, 0, implicit $exec |
| 147 | + ; GFX10: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 148 | + %0:vgpr(s32) = COPY $vgpr0 |
| 149 | + %1:vgpr(s32) = COPY $vgpr1 |
| 150 | + %2:vgpr(s32) = COPY $vgpr2 |
| 151 | + %3:vgpr(s32) = G_FNEG %2 |
| 152 | + %4:vgpr(s32) = G_FMA %0, %1, %3 |
| 153 | + S_ENDPGM 0, implicit %4 |
| 154 | +
|
| 155 | +... |
| 156 | + |
| 157 | +--- |
| 158 | + |
| 159 | +name: fma_f32_fabs_src2 |
| 160 | +legalized: true |
| 161 | +regBankSelected: true |
| 162 | + |
| 163 | +body: | |
| 164 | + bb.0: |
| 165 | + liveins: $vgpr0, $vgpr1, $vgpr2 |
| 166 | +
|
| 167 | + ; GFX6-LABEL: name: fma_f32_fabs_src2 |
| 168 | + ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 169 | + ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 170 | + ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 171 | + ; GFX6: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 2, [[COPY2]], 0, 0, implicit $exec |
| 172 | + ; GFX6: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 173 | + ; GFX9-DL-LABEL: name: fma_f32_fabs_src2 |
| 174 | + ; GFX9-DL: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 175 | + ; GFX9-DL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 176 | + ; GFX9-DL: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 177 | + ; GFX9-DL: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 2, [[COPY2]], 0, 0, implicit $exec |
| 178 | + ; GFX9-DL: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 179 | + ; GFX10-LABEL: name: fma_f32_fabs_src2 |
| 180 | + ; GFX10: $vcc_hi = IMPLICIT_DEF |
| 181 | + ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 182 | + ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 183 | + ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 184 | + ; GFX10: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 2, [[COPY2]], 0, 0, implicit $exec |
| 185 | + ; GFX10: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 186 | + %0:vgpr(s32) = COPY $vgpr0 |
| 187 | + %1:vgpr(s32) = COPY $vgpr1 |
| 188 | + %2:vgpr(s32) = COPY $vgpr2 |
| 189 | + %3:vgpr(s32) = G_FABS %2 |
| 190 | + %4:vgpr(s32) = G_FMA %0, %1, %3 |
| 191 | + S_ENDPGM 0, implicit %4 |
| 192 | +
|
| 193 | +... |
| 194 | + |
| 195 | +--- |
| 196 | + |
| 197 | +name: fma_f32_copy_fneg_src2 |
| 198 | +legalized: true |
| 199 | +regBankSelected: true |
| 200 | + |
| 201 | +body: | |
| 202 | + bb.0: |
| 203 | + liveins: $vgpr0, $vgpr1, $vgpr2 |
| 204 | +
|
| 205 | + ; GFX6-LABEL: name: fma_f32_copy_fneg_src2 |
| 206 | + ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 207 | + ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 208 | + ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 209 | + ; GFX6: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648 |
| 210 | + ; GFX6: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY2]], implicit $exec |
| 211 | + ; GFX6: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 0, [[V_XOR_B32_e32_]], 0, 0, implicit $exec |
| 212 | + ; GFX6: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 213 | + ; GFX9-DL-LABEL: name: fma_f32_copy_fneg_src2 |
| 214 | + ; GFX9-DL: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 215 | + ; GFX9-DL: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 216 | + ; GFX9-DL: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 217 | + ; GFX9-DL: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648 |
| 218 | + ; GFX9-DL: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY2]], implicit $exec |
| 219 | + ; GFX9-DL: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 0, [[V_XOR_B32_e32_]], 0, 0, implicit $exec |
| 220 | + ; GFX9-DL: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 221 | + ; GFX10-LABEL: name: fma_f32_copy_fneg_src2 |
| 222 | + ; GFX10: $vcc_hi = IMPLICIT_DEF |
| 223 | + ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| 224 | + ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 |
| 225 | + ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 |
| 226 | + ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648 |
| 227 | + ; GFX10: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY2]], implicit $exec |
| 228 | + ; GFX10: [[V_FMA_F32_:%[0-9]+]]:vgpr_32 = V_FMA_F32 0, [[COPY]], 0, [[COPY1]], 0, [[V_XOR_B32_e32_]], 0, 0, implicit $exec |
| 229 | + ; GFX10: S_ENDPGM 0, implicit [[V_FMA_F32_]] |
| 230 | + %0:vgpr(s32) = COPY $vgpr0 |
| 231 | + %1:vgpr(s32) = COPY $vgpr1 |
| 232 | + %2:vgpr(s32) = COPY $vgpr2 |
| 233 | + %3:vgpr(s32) = G_FNEG %2 |
| 234 | + %4:vgpr(s32) = COPY %3 |
| 235 | + %5:vgpr(s32) = G_FMA %0, %1, %4 |
| 236 | + S_ENDPGM 0, implicit %5 |
| 237 | +
|
| 238 | +... |
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